[llvm] [JITLink][AArch32] Add TableGen Backend for Instr Encodings (PR #76996)

[Stefan Gränitz via llvm-commits]

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@@ -212,20 +212,6 @@ template <> struct FixupInfo<Arm_Call> : public FixupInfoArmBranch {
   static constexpr uint32_t BitBlx = 0x10000000;
 };
 
-struct FixupInfoArmMov : public FixupInfoArm {
-  static constexpr uint32_t OpcodeMask = 0x0ff00000;
-  static constexpr uint32_t ImmMask = 0x000f0fff;
-  static constexpr uint32_t RegMask = 0x0000f000;
-};
-
-template <> struct FixupInfo<Arm_MovtAbs> : public FixupInfoArmMov {
-  static constexpr uint32_t Opcode = 0x03400000;
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weliveindetail wrote:

Can we keep the `struct` definitions themselves here and pick members like `Opcode` with macros from `JITLinkAAch32.inc`? Guarding sections of an .inc file and allowing macros to transform data is [a typical concept with TableGen](https://llvm.org/docs/TableGen/BackEnds.html#llvm-backends). We even have one example in JITLink already: https://github.com/llvm/llvm-project/blob/release/17.x/llvm/lib/ExecutionEngine/JITLink/COFFDirectiveParser.cpp

https://github.com/llvm/llvm-project/pull/76996