[llvm] [AMDGPU] Add CodeGen support for GFX12 s_mul_u64 (PR #75825)

[Jay Foad via llvm-commits]

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@@ -419,6 +427,32 @@ void AMDGPUPostLegalizerCombinerImpl::applyCombineSignExtendInReg(
   MI.eraseFromParent();
 }
 
+bool AMDGPUPostLegalizerCombinerImpl::matchCombine_s_mul_u64(
+    MachineInstr &MI, unsigned &NewOpcode) const {
+  Register Src0 = MI.getOperand(1).getReg();
+  Register Src1 = MI.getOperand(2).getReg();
+  if (MRI.getType(Src0) != LLT::scalar(64))
+    return false;
+
+  if (KB->getKnownBits(Src0).countMinLeadingZeros() >= 32 &&
+      KB->getKnownBits(Src1).countMinLeadingZeros() >= 32) {
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jayfoad wrote:

Done.

https://github.com/llvm/llvm-project/pull/75825