[llvm] [AMDGPU] Add mark last scratch load pass (PR #75512)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 4 04:20:51 PST 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff f5efa74961560070a1e6f127214bcf6b570fef98 c8c985cf5d819ffe41c1254f49a6602a08d082b1 -- llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp llvm/lib/Target/AMDGPU/AMDGPU.h llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp llvm/lib/Target/AMDGPU/SIFrameLowering.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp llvm/lib/Target/AMDGPU/SIRegisterInfo.h
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 774dbf761e..af7369b35b 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -1659,8 +1659,7 @@ void SIRegisterInfo::buildSpillLoadStore(
     }
 
     int64_t CPol = AMDGPU::isGFX12Plus(ST) && LastUse ? AMDGPU::CPol::TH_LU : 0;
-    MIB.addImm(Offset + RegOffset)
-       .addImm(CPol);
+    MIB.addImm(Offset + RegOffset).addImm(CPol);
     if (!IsFlat)
       MIB.addImm(0); // swz
     MIB.addMemOperand(NewMMO);

``````````

</details>


https://github.com/llvm/llvm-project/pull/75512


More information about the llvm-commits mailing list