[llvm] [LoongArch] Emit function call code sequence as `PCADDU18I+JIRL` in medium code model (PR #76555)

[via llvm-commits]

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@@ -1479,28 +1548,30 @@ let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isCodeGenOnly = 0,
     isAsmParserOnly = 1 in {
 def PseudoLA_GOT : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
                           "la.got", "$dst, $src">;
+def PseudoLA_TLS_IE : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
+                             "la.tls.ie", "$dst, $src">;
+def PseudoLA_TLS_LD : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
+                             "la.tls.ld", "$dst, $src">;
+def PseudoLA_TLS_GD : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
+                             "la.tls.gd", "$dst, $src">;
+let Defs = [R20], Size = 20 in {
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wangleiat wrote:

> Would it be possible to let the register allocator choose the temp? Right now as `$t8` is temporary it's fine though.

It should be possible, and it may require defining some nodes to achieve it. There will be more changes in the `TargetLowering` part, which can be left for subsequent tasks.

https://github.com/llvm/llvm-project/pull/76555