[llvm] [VP][RISCV] Introduce llvm.vp.minimum/maximum intrinsics (PR #74840)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 3 12:50:18 PST 2024
================
@@ -6605,6 +6617,13 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
!Subtarget.hasVInstructionsF16()))
return SplitVPOp(Op, DAG);
return lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(Op, DAG, Subtarget);
+ case ISD::VP_FMAXIMUM:
+ case ISD::VP_FMINIMUM:
+ if (Op.getValueType() == MVT::nxv32f16 &&
+ (Subtarget.hasVInstructionsF16Minimal() &&
+ !Subtarget.hasVInstructionsF16()))
+ return SplitVPOp(Op, DAG);
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topperc wrote:
Is this if tested. I didn't see any nxv32f16 test cases.
https://github.com/llvm/llvm-project/pull/74840
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