[llvm] f64d1c8 - [RISCV] Add test cases for folding disjoint Or into a scalar load address. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 3 12:18:11 PST 2024
Author: Craig Topper
Date: 2024-01-03T12:17:57-08:00
New Revision: f64d1c810a2b8d89c3760cefb957da499c087404
URL: https://github.com/llvm/llvm-project/commit/f64d1c810a2b8d89c3760cefb957da499c087404
DIFF: https://github.com/llvm/llvm-project/commit/f64d1c810a2b8d89c3760cefb957da499c087404.diff
LOG: [RISCV] Add test cases for folding disjoint Or into a scalar load address. NFC
After 47a1704ac94c8aeb1aa7e0fc438ff99d36b632c6 we are able to
reassociate a disjoint Or used as a GEP index to get the constant
closer to a load to fold it. This is show by the first test.
We are not able to do this if the GEP created a shift left to scale
the index as the second test shows.
To make this work, we need to preserve the disjoint flag when pulling
the Or through the shift.
Added:
Modified:
llvm/test/CodeGen/RISCV/mem.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/mem.ll b/llvm/test/CodeGen/RISCV/mem.ll
index 3718ce80142d49..8f65973d4fde9b 100644
--- a/llvm/test/CodeGen/RISCV/mem.ll
+++ b/llvm/test/CodeGen/RISCV/mem.ll
@@ -338,3 +338,29 @@ bb:
}
declare void @snork(ptr)
+
+define i8 @disjoint_or_lb(ptr %a, i32 %off) nounwind {
+; RV32I-LABEL: disjoint_or_lb:
+; RV32I: # %bb.0:
+; RV32I-NEXT: add a0, a0, a1
+; RV32I-NEXT: lbu a0, 3(a0)
+; RV32I-NEXT: ret
+ %b = or disjoint i32 %off, 3
+ %1 = getelementptr i8, ptr %a, i32 %b
+ %2 = load i8, ptr %1
+ ret i8 %2
+}
+
+define i32 @disjoint_or_lw(ptr %a, i32 %off) nounwind {
+; RV32I-LABEL: disjoint_or_lw:
+; RV32I: # %bb.0:
+; RV32I-NEXT: slli a1, a1, 2
+; RV32I-NEXT: ori a1, a1, 12
+; RV32I-NEXT: add a0, a0, a1
+; RV32I-NEXT: lw a0, 0(a0)
+; RV32I-NEXT: ret
+ %b = or disjoint i32 %off, 3
+ %1 = getelementptr i32, ptr %a, i32 %b
+ %2 = load i32, ptr %1
+ ret i32 %2
+}
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