[llvm] [X86]Support lowering for APX Promoted SHA/MOVDIR/CRC32/INVPCID instructions (PR #76786)
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 3 02:29:28 PST 2024
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@@ -695,14 +695,14 @@ def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
Requires<[Not64BitMode, HasINVPCID]>;
def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
"invpcid\t{$src2, $src1|$src1, $src2}", []>, T8, PD,
- Requires<[In64BitMode, HasINVPCID]>;
+ Requires<[In64BitMode, HasINVPCID, NoEGPR]>;
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KanRobert wrote:
No pattern here. You only need assembler predicate `In64BitMode`
https://github.com/llvm/llvm-project/pull/76786
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