[llvm] [X86]Support lowering for APX Promoted SHA/MOVDIR/CRC32/INVPCID instructions (PR #76786)

[Phoebe Wang via llvm-commits]

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@@ -3047,19 +3047,19 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
     default:
       llvm_unreachable("Unexpected intrinsic.");
     case Intrinsic::x86_sse42_crc32_32_8:
-      Opc = X86::CRC32r32r8;
+      Opc = Subtarget->hasEGPR() ? X86::CRC32r32r8_EVEX : X86::CRC32r32r8;
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phoebewang wrote:

Not sure if we need to change for others. If there is, better to define a macro like
```
#define GET_EGPR_IF_ENABLED(OPC) Subtarget->hasEGPR() ? OPC##_EVEX : OPC;
```

https://github.com/llvm/llvm-project/pull/76786