[llvm] [X86][MC] Support encoding/decoding for APX variant INC/DEC/ADCX/ADOX instructions (PR #76721)

[Shengchen Kan via llvm-commits]

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@@ -1119,14 +1206,34 @@ defm MULX64 : MulX<Xi64, WriteMULX64>, REX_W;
 // We don't have patterns for these as there is no advantage over ADC for
 // most code.
 let Form = MRMSrcReg in {
-def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
-def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
-def ADOX32rr : BinOpRRF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
-def ADOX64rr : BinOpRRF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
+  def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
+  def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
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KanRobert wrote:

https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/X86InstrUtils.td#L1006

It means `EFLAGS` is input.

https://github.com/llvm/llvm-project/pull/76721