[llvm] 8ae73fe - [PowerPC] Precommit test for #72845. NFC.

Kai Luo via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 2 19:04:01 PST 2024


Author: Kai Luo
Date: 2024-01-03T03:03:48Z
New Revision: 8ae73fea3a2cbb072bf3e577dc49deb25b56e760

URL: https://github.com/llvm/llvm-project/commit/8ae73fea3a2cbb072bf3e577dc49deb25b56e760
DIFF: https://github.com/llvm/llvm-project/commit/8ae73fea3a2cbb072bf3e577dc49deb25b56e760.diff

LOG: [PowerPC] Precommit test for #72845. NFC.

Added: 
    llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll b/llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll
new file mode 100644
index 00000000000000..6f3e9f78b31756
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s | FileCheck %s
+
+define noundef signext i32 @ham(ptr nocapture noundef %arg) #0 {
+; CHECK-LABEL: ham:
+; CHECK:       # %bb.0: # %bb
+; CHECK-NEXT:    lwz 4, 0(3)
+; CHECK-NEXT:    cmpwi 4, 750
+; CHECK-NEXT:    addi 5, 4, 1
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    bc 12, 0, L..BB0_1
+; CHECK-NEXT:    b L..BB0_2
+; CHECK-NEXT:  L..BB0_1: # %bb
+; CHECK-NEXT:    addi 4, 5, 0
+; CHECK-NEXT:  L..BB0_2: # %bb
+; CHECK-NEXT:    stw 4, 0(3)
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    blr
+bb:
+  %load = load i32, ptr %arg, align 4
+  %icmp = icmp slt i32 %load, 750
+  %add = add nsw i32 %load, 1
+  %select = select i1 %icmp, i32 %add, i32 1
+  store i32 %select, ptr %arg, align 4
+  ret i32 0
+}
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr8" "target-features"="+altivec,+bpermd,+crbits,+crypto,+direct-move,+extdiv,+htm,+isa-v206-instructions,+isa-v207-instructions,+power8-vector,+quadword-atomics,+vsx,-aix-small-local-exec-tls,-isa-v30-instructions,-isel,-power9-vector,-privileged,-rop-protect,-spe" }


        


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