[llvm] c664a51 - [M68k][NFC] Clarify the displacement size in the code comment

[Min-Yih Hsu via llvm-commits]

Author: Min-Yih Hsu
Date: 2023-12-30T17:13:10-08:00
New Revision: c664a51d3439174e2973194fcabd973af658bf63

URL: https://github.com/llvm/llvm-project/commit/c664a51d3439174e2973194fcabd973af658bf63
DIFF: https://github.com/llvm/llvm-project/commit/c664a51d3439174e2973194fcabd973af658bf63.diff

LOG: [M68k][NFC] Clarify the displacement size in the code comment

Specifically, 'f', 'g', 'q', 'k', and 'l' addressing modes.

NFC.

Added: 
    

Modified: 
    llvm/lib/Target/M68k/M68kInstrFormats.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/M68k/M68kInstrFormats.td b/llvm/lib/Target/M68k/M68kInstrFormats.td
index 38d3127ac6a6da..99bac7a599390c 100644
--- a/llvm/lib/Target/M68k/M68kInstrFormats.td
+++ b/llvm/lib/Target/M68k/M68kInstrFormats.td
@@ -17,22 +17,22 @@
 ///  03   M68000    (An)                     j       address register indirect
 ///  04   M68000    (An)+                    o       address register indirect with postincrement
 ///  05   M68000    -(An)                    e       address register indirect with predecrement
-///  06   M68000    (i,An)                   p       address register indirect with displacement
-///  10   M68000    (i,An,Xn.L)              f       address register indirect with index and scale = 1
-///  07   M68000    (i,An,Xn.W)              F       address register indirect with index and scale = 1
-///  12   M68020    (i,An,Xn.L,SCALE)        g       address register indirect with index
-///  11   M68020    (i,An,Xn.W,SCALE)        G       address register indirect with index
+///  06   M68000    (d16,An)                 p       address register indirect with displacement
+///  10   M68000    (d8,An,Xn.L)             f       address register indirect with index and scale = 1
+///  07   M68000    (d8,An,Xn.W)             F       address register indirect with index and scale = 1
+///  12   M68020    (d8,An,Xn.L,SCALE)       g       address register indirect with index
+///  11   M68020    (d8,An,Xn.W,SCALE)       G       address register indirect with index
 ///  14   M68020    ([bd,An],Xn.L,SCALE,od)  u       memory indirect postindexed mode
 ///  13   M68020    ([bd,An],Xn.W,SCALE,od)  U       memory indirect postindexed mode
 ///  16   M68020    ([bd,An,Xn.L,SCALE],od)  v       memory indirect preindexed mode
 ///  15   M68020    ([bd,An,Xn.W,SCALE],od)  V       memory indirect preindexed mode
 ///  20   M68000    abs.L                    b       absolute long address
 ///  17   M68000    abs.W                    B       absolute short address
-///  21   M68000    (i,PC)                   q       program counter with displacement
-///  23   M68000    (i,PC,Xn.L)              k       program counter with index and scale = 1
-///  22   M68000    (i,PC,Xn.W)              K       program counter with index and scale = 1
-///  25   M68020    (i,PC,Xn.L,SCALE)        l       program counter with index
-///  24   M68020    (i,PC,Xn.W,SCALE)        L       program counter with index
+///  21   M68000    (d16,PC)                 q       program counter with displacement
+///  23   M68000    (d8,PC,Xn.L)             k       program counter with index and scale = 1
+///  22   M68000    (d8,PC,Xn.W)             K       program counter with index and scale = 1
+///  25   M68020    (d8,PC,Xn.L,SCALE)       l       program counter with index
+///  24   M68020    (d8,PC,Xn.W,SCALE)       L       program counter with index
 ///  27   M68020    ([bd,PC],Xn.L,SCALE,od)  x       program counter memory indirect postindexed mode
 ///  26   M68020    ([bd,PC],Xn.W,SCALE,od)  X       program counter memory indirect postindexed mode
 ///  31   M68020    ([bd,PC,Xn.L,SCALE],od)  y       program counter memory indirect preindexed mode