[llvm] 589a24b - [llvm-exegesis] Make preprocessor directives consistent
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 29 18:59:33 PST 2023
Author: Aiden Grossman
Date: 2023-12-29T18:59:26-08:00
New Revision: 589a24b0b75d2def0b6ebf64953d367c725102d3
URL: https://github.com/llvm/llvm-project/commit/589a24b0b75d2def0b6ebf64953d367c725102d3
DIFF: https://github.com/llvm/llvm-project/commit/589a24b0b75d2def0b6ebf64953d367c725102d3.diff
LOG: [llvm-exegesis] Make preprocessor directives consistent
This patch switches out the `and` keyword for && in preprocessor
directives recently added to fix some buildbot failures to be consistent
with the rest of the code base.
Added:
Modified:
llvm/tools/llvm-exegesis/lib/X86/Target.cpp
Removed:
################################################################################
diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
index 4bca50911b48d3..0ab74b8e00da11 100644
--- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -963,7 +963,7 @@ static void restoreSyscallRegisters(std::vector<MCInst> &GeneratedCode,
static std::vector<MCInst> loadImmediateSegmentRegister(unsigned Reg,
const APInt &Value) {
-#if defined(__x86_64__) and defined(__linux__)
+#if defined(__x86_64__) && defined(__linux__)
assert(Value.getBitWidth() <= 64 && "Value must fit in the register.");
std::vector<MCInst> loadSegmentRegisterCode;
// Preserve the syscall registers here as we don't
@@ -990,7 +990,7 @@ static std::vector<MCInst> loadImmediateSegmentRegister(unsigned Reg,
#else
llvm_unreachable("Loading immediate segment registers is only supported with "
"x86-64 llvm-exegesis");
-#endif // defined(__x86_64__) and defined(__linux__)
+#endif // defined(__x86_64__) && defined(__linux__)
}
std::vector<MCInst> ExegesisX86Target::setRegTo(const MCSubtargetInfo &STI,
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