[llvm] d3ddb93 - [X86] Fix typo about the internal name of instructions
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 28 20:19:10 PST 2023
Author: Shengchen Kan
Date: 2023-12-29T12:18:34+08:00
New Revision: d3ddb93d0463abf56d04dad3d37f84562ac7de72
URL: https://github.com/llvm/llvm-project/commit/d3ddb93d0463abf56d04dad3d37f84562ac7de72
DIFF: https://github.com/llvm/llvm-project/commit/d3ddb93d0463abf56d04dad3d37f84562ac7de72.diff
LOG: [X86] Fix typo about the internal name of instructions
64ri -> 64ri32
Added:
Modified:
llvm/lib/Target/X86/X86InstrArithmetic.td
llvm/test/TableGen/x86-fold-tables.inc
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index e14d2773f67597..40baed6371719c 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -455,7 +455,7 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
def NAME#8ri_NF_ND : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
def NAME#16ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
def NAME#32ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
- def NAME#64ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+ def NAME#64ri32_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
}
let Predicates = [In64BitMode] in {
def NAME#16ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM>, NF, PD;
@@ -464,7 +464,7 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
def NAME#8ri_NF : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
def NAME#16ri_NF : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM>, NF, PD;
def NAME#32ri_NF : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM>, NF;
- def NAME#64ri_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
+ def NAME#64ri32_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
def NAME#16ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
def NAME#32ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
def NAME#64ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 4e2ba21861d219..7f7146806e27f7 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -32,9 +32,9 @@ static const X86FoldTableEntry Table2Addr[] = {
{X86::ADD32rr, X86::ADD32mr, TB_NO_REVERSE},
{X86::ADD32rr_NF, X86::ADD32mr_NF, TB_NO_REVERSE},
{X86::ADD64ri32, X86::ADD64mi32, TB_NO_REVERSE},
+ {X86::ADD64ri32_NF, X86::ADD64mi32_NF, TB_NO_REVERSE},
{X86::ADD64ri8, X86::ADD64mi8, TB_NO_REVERSE},
{X86::ADD64ri8_NF, X86::ADD64mi8_NF, TB_NO_REVERSE},
- {X86::ADD64ri_NF, X86::ADD64mi32_NF, TB_NO_REVERSE},
{X86::ADD64rr, X86::ADD64mr, TB_NO_REVERSE},
{X86::ADD64rr_NF, X86::ADD64mr_NF, TB_NO_REVERSE},
{X86::ADD8ri, X86::ADD8mi, TB_NO_REVERSE},
@@ -55,9 +55,9 @@ static const X86FoldTableEntry Table2Addr[] = {
{X86::AND32rr, X86::AND32mr, TB_NO_REVERSE},
{X86::AND32rr_NF, X86::AND32mr_NF, TB_NO_REVERSE},
{X86::AND64ri32, X86::AND64mi32, TB_NO_REVERSE},
+ {X86::AND64ri32_NF, X86::AND64mi32_NF, TB_NO_REVERSE},
{X86::AND64ri8, X86::AND64mi8, TB_NO_REVERSE},
{X86::AND64ri8_NF, X86::AND64mi8_NF, TB_NO_REVERSE},
- {X86::AND64ri_NF, X86::AND64mi32_NF, TB_NO_REVERSE},
{X86::AND64rr, X86::AND64mr, TB_NO_REVERSE},
{X86::AND64rr_NF, X86::AND64mr_NF, TB_NO_REVERSE},
{X86::AND8ri, X86::AND8mi, TB_NO_REVERSE},
@@ -107,9 +107,9 @@ static const X86FoldTableEntry Table2Addr[] = {
{X86::OR32rr, X86::OR32mr, TB_NO_REVERSE},
{X86::OR32rr_NF, X86::OR32mr_NF, TB_NO_REVERSE},
{X86::OR64ri32, X86::OR64mi32, TB_NO_REVERSE},
+ {X86::OR64ri32_NF, X86::OR64mi32_NF, TB_NO_REVERSE},
{X86::OR64ri8, X86::OR64mi8, TB_NO_REVERSE},
{X86::OR64ri8_NF, X86::OR64mi8_NF, TB_NO_REVERSE},
- {X86::OR64ri_NF, X86::OR64mi32_NF, TB_NO_REVERSE},
{X86::OR64rr, X86::OR64mr, TB_NO_REVERSE},
{X86::OR64rr_NF, X86::OR64mr_NF, TB_NO_REVERSE},
{X86::OR8ri, X86::OR8mi, TB_NO_REVERSE},
@@ -238,9 +238,9 @@ static const X86FoldTableEntry Table2Addr[] = {
{X86::SUB32rr, X86::SUB32mr, TB_NO_REVERSE},
{X86::SUB32rr_NF, X86::SUB32mr_NF, TB_NO_REVERSE},
{X86::SUB64ri32, X86::SUB64mi32, TB_NO_REVERSE},
+ {X86::SUB64ri32_NF, X86::SUB64mi32_NF, TB_NO_REVERSE},
{X86::SUB64ri8, X86::SUB64mi8, TB_NO_REVERSE},
{X86::SUB64ri8_NF, X86::SUB64mi8_NF, TB_NO_REVERSE},
- {X86::SUB64ri_NF, X86::SUB64mi32_NF, TB_NO_REVERSE},
{X86::SUB64rr, X86::SUB64mr, TB_NO_REVERSE},
{X86::SUB64rr_NF, X86::SUB64mr_NF, TB_NO_REVERSE},
{X86::SUB8ri, X86::SUB8mi, TB_NO_REVERSE},
@@ -261,9 +261,9 @@ static const X86FoldTableEntry Table2Addr[] = {
{X86::XOR32rr, X86::XOR32mr, TB_NO_REVERSE},
{X86::XOR32rr_NF, X86::XOR32mr_NF, TB_NO_REVERSE},
{X86::XOR64ri32, X86::XOR64mi32, TB_NO_REVERSE},
+ {X86::XOR64ri32_NF, X86::XOR64mi32_NF, TB_NO_REVERSE},
{X86::XOR64ri8, X86::XOR64mi8, TB_NO_REVERSE},
{X86::XOR64ri8_NF, X86::XOR64mi8_NF, TB_NO_REVERSE},
- {X86::XOR64ri_NF, X86::XOR64mi32_NF, TB_NO_REVERSE},
{X86::XOR64rr, X86::XOR64mr, TB_NO_REVERSE},
{X86::XOR64rr_NF, X86::XOR64mr_NF, TB_NO_REVERSE},
{X86::XOR8ri, X86::XOR8mi, TB_NO_REVERSE},
@@ -491,9 +491,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::ADD32rr_ND, X86::ADD32mr_ND, 0},
{X86::ADD32rr_NF_ND, X86::ADD32mr_NF_ND, 0},
{X86::ADD64ri32_ND, X86::ADD64mi32_ND, 0},
+ {X86::ADD64ri32_NF_ND, X86::ADD64mi32_NF_ND, 0},
{X86::ADD64ri8_ND, X86::ADD64mi8_ND, 0},
{X86::ADD64ri8_NF_ND, X86::ADD64mi8_NF_ND, 0},
- {X86::ADD64ri_NF_ND, X86::ADD64mi32_NF_ND, 0},
{X86::ADD64rr_ND, X86::ADD64mr_ND, 0},
{X86::ADD64rr_NF_ND, X86::ADD64mr_NF_ND, 0},
{X86::ADD8ri_ND, X86::ADD8mi_ND, 0},
@@ -515,9 +515,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::AND32rr_ND, X86::AND32mr_ND, 0},
{X86::AND32rr_NF_ND, X86::AND32mr_NF_ND, 0},
{X86::AND64ri32_ND, X86::AND64mi32_ND, 0},
+ {X86::AND64ri32_NF_ND, X86::AND64mi32_NF_ND, 0},
{X86::AND64ri8_ND, X86::AND64mi8_ND, 0},
{X86::AND64ri8_NF_ND, X86::AND64mi8_NF_ND, 0},
- {X86::AND64ri_NF_ND, X86::AND64mi32_NF_ND, 0},
{X86::AND64rr_ND, X86::AND64mr_ND, 0},
{X86::AND64rr_NF_ND, X86::AND64mr_NF_ND, 0},
{X86::AND8ri_ND, X86::AND8mi_ND, 0},
@@ -694,9 +694,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::OR32rr_ND, X86::OR32mr_ND, 0},
{X86::OR32rr_NF_ND, X86::OR32mr_NF_ND, 0},
{X86::OR64ri32_ND, X86::OR64mi32_ND, 0},
+ {X86::OR64ri32_NF_ND, X86::OR64mi32_NF_ND, 0},
{X86::OR64ri8_ND, X86::OR64mi8_ND, 0},
{X86::OR64ri8_NF_ND, X86::OR64mi8_NF_ND, 0},
- {X86::OR64ri_NF_ND, X86::OR64mi32_NF_ND, 0},
{X86::OR64rr_ND, X86::OR64mr_ND, 0},
{X86::OR64rr_NF_ND, X86::OR64mr_NF_ND, 0},
{X86::OR8ri_ND, X86::OR8mi_ND, 0},
@@ -789,9 +789,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::SUB32rr_ND, X86::SUB32mr_ND, 0},
{X86::SUB32rr_NF_ND, X86::SUB32mr_NF_ND, 0},
{X86::SUB64ri32_ND, X86::SUB64mi32_ND, 0},
+ {X86::SUB64ri32_NF_ND, X86::SUB64mi32_NF_ND, 0},
{X86::SUB64ri8_ND, X86::SUB64mi8_ND, 0},
{X86::SUB64ri8_NF_ND, X86::SUB64mi8_NF_ND, 0},
- {X86::SUB64ri_NF_ND, X86::SUB64mi32_NF_ND, 0},
{X86::SUB64rr_ND, X86::SUB64mr_ND, 0},
{X86::SUB64rr_NF_ND, X86::SUB64mr_NF_ND, 0},
{X86::SUB8ri_ND, X86::SUB8mi_ND, 0},
@@ -1508,9 +1508,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::XOR32rr_ND, X86::XOR32mr_ND, 0},
{X86::XOR32rr_NF_ND, X86::XOR32mr_NF_ND, 0},
{X86::XOR64ri32_ND, X86::XOR64mi32_ND, 0},
+ {X86::XOR64ri32_NF_ND, X86::XOR64mi32_NF_ND, 0},
{X86::XOR64ri8_ND, X86::XOR64mi8_ND, 0},
{X86::XOR64ri8_NF_ND, X86::XOR64mi8_NF_ND, 0},
- {X86::XOR64ri_NF_ND, X86::XOR64mi32_NF_ND, 0},
{X86::XOR64rr_ND, X86::XOR64mr_ND, 0},
{X86::XOR64rr_NF_ND, X86::XOR64mr_NF_ND, 0},
{X86::XOR8ri_ND, X86::XOR8mi_ND, 0},
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