[llvm] [RISCV] fold trunc_vl (srl_vl (vwaddu X, Y), splat 1) -> vaaddu X, Y (PR #76550)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 28 18:53:01 PST 2023
topperc wrote:
I don't think this is the right way to do this. We should make ISD::AVGFLOORU Custom for RISC-V and let DAGCombiner create an ISD::AVGFLOORU node that we can custom lower to a new RISCVISD::VAADDU_VL opcode.
https://github.com/llvm/llvm-project/pull/76550
More information about the llvm-commits
mailing list