[llvm] [RISCV] Collect function features in AsmPrinter before emission (#76231) (PR #76437)

[Kito Cheng via llvm-commits]

================
@@ -363,13 +370,23 @@ bool RISCVAsmPrinter::emitDirectiveOptionArch() {
   return false;
 }
 
+bool RISCVAsmPrinter::doInitialization(Module &M) {
+
+  CommonSTI->setFeatureBits(TM.getMCSubtargetInfo()->getFeatureBits());
+  return AsmPrinter::doInitialization(M);
+}
+
 bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   STI = &MF.getSubtarget<RISCVSubtarget>();
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
   bool EmittedOptionArch = emitDirectiveOptionArch();
 
+  // Collect flags from this function.
+  CommonSTI->setFeatureBits(CommonSTI->getFeatureBits() |
----------------
kito-cheng wrote:

`f` and `zfinx` are most obviously case in standard RISC-V extension, but may not common in real world, the most common case I could imagine is the multi-version function with different vendor extensions, and those vendor extension are using overlapped encoding.

One example is T-head Vector and standard vector extension (IIRC they didn't upstream to LLVM yet but they has planned).

```c
void foo_thead __attribute__((target="arch=+theadvector")) ()
{
}
void foo_v __attribute__((target="arch=+v")) ()
{
}

void bar(){
  if (thead_vector_ext_ok ())
    foo_thead ()
  if (std_vec_ext_ok ())
    foo_v ()
}
```

https://github.com/llvm/llvm-project/pull/76437