[llvm] [TLI] Add mappings to SLEEF/ArmPL libcall variants taking linear argu… (PR #76060)

[Alexandros Lamprineas via llvm-commits]

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@@ -504,7 +504,8 @@ void VPWidenCallRecipe::execute(VPTransformState &State) {
   for (unsigned Part = 0; Part < State.UF; ++Part) {
     SmallVector<Type *, 2> TysForDecl;
     // Add return type if intrinsic is overloaded on it.
-    if (isVectorIntrinsicWithOverloadTypeAtArg(VectorIntrinsicID, -1)) {
+    if (isVectorIntrinsicWithOverloadTypeAtArg(VectorIntrinsicID, -1) &&
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labrinea wrote:

This fix has been moved to a separate PR as suggested: #76274

https://github.com/llvm/llvm-project/pull/76060