[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR/NEG/NOT instructions (PR #76319)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 27 04:44:52 PST 2023


https://github.com/KanRobert updated https://github.com/llvm/llvm-project/pull/76319

>From f0e17f0b90f0413dd0b7b3741ad23380ee31347d Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Fri, 22 Dec 2023 22:16:45 +0800
Subject: [PATCH 1/7] [X86][MC] Support encoding/decoding for APX variant
 ADD/SUB/ADC/SBB/OR/XOR instructions

Four variants: promoted legacy, ND (new data destination), NF (no flags update) and NF_ND (NF + ND).
---
 .../Support/X86DisassemblerDecoderCommon.h    |   9 +-
 .../lib/Target/X86/AsmParser/X86AsmParser.cpp |   7 +
 .../X86/Disassembler/X86Disassembler.cpp      |   6 +-
 .../X86/Disassembler/X86DisassemblerDecoder.h |   1 +
 .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h |  13 +-
 .../X86/MCTargetDesc/X86InstPrinterCommon.cpp |   3 +
 .../X86/MCTargetDesc/X86MCCodeEmitter.cpp     |  43 +-
 llvm/lib/Target/X86/X86InstrArithmetic.td     | 455 +++++++++++++++---
 llvm/lib/Target/X86/X86InstrFormats.td        |   2 +
 llvm/lib/Target/X86/X86InstrPredicates.td     |   2 +
 llvm/lib/Target/X86/X86InstrUtils.td          |  15 +
 llvm/test/MC/Disassembler/X86/apx/adc.txt     | 210 ++++++++
 llvm/test/MC/Disassembler/X86/apx/add.txt     | 418 ++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/and.txt     | 418 ++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/or.txt      | 418 ++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/sbb.txt     | 210 ++++++++
 llvm/test/MC/Disassembler/X86/apx/sub.txt     | 418 ++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/xor.txt     | 418 ++++++++++++++++
 llvm/test/MC/X86/apx/adc-att.s                | 161 +++++++
 llvm/test/MC/X86/apx/adc-intel.s              | 158 ++++++
 llvm/test/MC/X86/apx/add-att.s                | 317 ++++++++++++
 llvm/test/MC/X86/apx/add-intel.s              | 314 ++++++++++++
 llvm/test/MC/X86/apx/and-att.s                | 317 ++++++++++++
 llvm/test/MC/X86/apx/and-intel.s              | 314 ++++++++++++
 llvm/test/MC/X86/apx/or-att.s                 | 317 ++++++++++++
 llvm/test/MC/X86/apx/or-intel.s               | 314 ++++++++++++
 llvm/test/MC/X86/apx/sbb-att.s                | 161 +++++++
 llvm/test/MC/X86/apx/sbb-intel.s              | 158 ++++++
 llvm/test/MC/X86/apx/sub-att.s                | 317 ++++++++++++
 llvm/test/MC/X86/apx/sub-intel.s              | 314 ++++++++++++
 llvm/test/MC/X86/apx/xor-att.s                | 317 ++++++++++++
 llvm/test/MC/X86/apx/xor-intel.s              | 314 ++++++++++++
 llvm/test/TableGen/x86-fold-tables.inc        | 255 ++++++++++
 llvm/utils/TableGen/X86DisassemblerTables.cpp |  21 +-
 llvm/utils/TableGen/X86FoldTablesEmitter.cpp  |  18 +-
 llvm/utils/TableGen/X86RecognizableInstr.cpp  |  37 +-
 llvm/utils/TableGen/X86RecognizableInstr.h    |   4 +-
 37 files changed, 7107 insertions(+), 87 deletions(-)
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/adc.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/add.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/and.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/or.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/sbb.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/sub.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/xor.txt
 create mode 100644 llvm/test/MC/X86/apx/adc-att.s
 create mode 100644 llvm/test/MC/X86/apx/adc-intel.s
 create mode 100644 llvm/test/MC/X86/apx/add-att.s
 create mode 100644 llvm/test/MC/X86/apx/add-intel.s
 create mode 100644 llvm/test/MC/X86/apx/and-att.s
 create mode 100644 llvm/test/MC/X86/apx/and-intel.s
 create mode 100644 llvm/test/MC/X86/apx/or-att.s
 create mode 100644 llvm/test/MC/X86/apx/or-intel.s
 create mode 100644 llvm/test/MC/X86/apx/sbb-att.s
 create mode 100644 llvm/test/MC/X86/apx/sbb-intel.s
 create mode 100644 llvm/test/MC/X86/apx/sub-att.s
 create mode 100644 llvm/test/MC/X86/apx/sub-intel.s
 create mode 100644 llvm/test/MC/X86/apx/xor-att.s
 create mode 100644 llvm/test/MC/X86/apx/xor-intel.s

diff --git a/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h b/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
index b0683ac2e32c05..3aceb247a26c21 100644
--- a/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
+++ b/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
@@ -70,7 +70,8 @@ enum attributeBits {
   ATTR_EVEXKZ = 0x1 << 11,
   ATTR_EVEXB = 0x1 << 12,
   ATTR_REX2 = 0x1 << 13,
-  ATTR_max = 0x1 << 14,
+  ATTR_EVEXNF = 0x1 << 14,
+  ATTR_max = 0x1 << 15,
 };
 
 // Combinations of the above attributes that are relevant to instruction
@@ -137,12 +138,15 @@ enum attributeBits {
   ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix")             \
   ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize")            \
   ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix")                            \
+  ENUM_ENTRY(IC_EVEX_NF, 2, "requires EVEX and NF prefix")                     \
   ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix")                 \
   ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix")                 \
   ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix")         \
+  ENUM_ENTRY(IC_EVEX_OPSIZE_NF, 3, "requires EVEX, NF and the OpSize prefix")  \
   ENUM_ENTRY(IC_EVEX_OPSIZE_ADSIZE, 3,                                         \
              "requires EVEX, OPSIZE and the ADSIZE prefix")                    \
   ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix")                   \
+  ENUM_ENTRY(IC_EVEX_W_NF, 4, "requires EVEX, W and NF prefix")                \
   ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix")               \
   ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix")               \
   ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize")              \
@@ -187,10 +191,13 @@ enum attributeBits {
   ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix")     \
   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize")    \
   ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix")                        \
+  ENUM_ENTRY(IC_EVEX_B_NF, 2, "requires EVEX_NF and EVEX_B prefix")            \
   ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix")             \
   ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix")             \
   ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix")     \
+  ENUM_ENTRY(IC_EVEX_OPSIZE_B_NF, 3, "requires EVEX_B, NF and Opsize prefix")  \
   ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix")               \
+  ENUM_ENTRY(IC_EVEX_W_B_NF, 4, "requires EVEX_NF, EVEX_B and the W prefix")   \
   ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix")           \
   ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix")           \
   ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize")          \
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 5a231a046e9311..446a46d0a0443b 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -108,6 +108,8 @@ class X86AsmParser : public MCTargetAsmParser {
 
   // Does this instruction use apx extended register?
   bool UseApxExtendedReg = false;
+  // Is this instruction explicitly required not to update flags?
+  bool ForcedNoFlag = false;
 
 private:
   SMLoc consumeToken() {
@@ -3125,6 +3127,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
   ForcedVEXEncoding = VEXEncoding_Default;
   ForcedDispEncoding = DispEncoding_Default;
   UseApxExtendedReg = false;
+  ForcedNoFlag = false;
 
   // Parse pseudo prefixes.
   while (true) {
@@ -3149,6 +3152,8 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
         ForcedDispEncoding = DispEncoding_Disp8;
       else if (Prefix == "disp32")
         ForcedDispEncoding = DispEncoding_Disp32;
+      else if (Prefix == "nf")
+        ForcedNoFlag = true;
       else
         return Error(NameLoc, "unknown prefix");
 
@@ -3996,6 +4001,8 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
+  if (ForcedNoFlag != static_cast<bool>(MCID.TSFlags & X86II::EVEX_NF))
+    return Match_Unsupported;
 
   if (ForcedVEXEncoding == VEXEncoding_EVEX &&
       (MCID.TSFlags & X86II::EncodingMask) != X86II::EVEX)
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 59e2008f56321b..347dc0d4ed43a7 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -1169,7 +1169,11 @@ static int getInstructionID(struct InternalInstruction *insn,
         attrMask |= ATTR_EVEXKZ;
       if (bFromEVEX4of4(insn->vectorExtensionPrefix[3]))
         attrMask |= ATTR_EVEXB;
-      if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]))
+      // nf bit is the MSB of aaa
+      if (nfFromEVEX4of4(insn->vectorExtensionPrefix[3]) &&
+          insn->opcodeType == MAP4)
+        attrMask |= ATTR_EVEXNF;
+      else if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]))
         attrMask |= ATTR_EVEXK;
       if (lFromEVEX4of4(insn->vectorExtensionPrefix[3]))
         attrMask |= ATTR_VEXL;
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
index decc45091941d7..4c7b1c094522eb 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
@@ -103,6 +103,7 @@ namespace X86Disassembler {
 #define bFromEVEX4of4(evex) bitFromOffset4(evex)
 #define v2FromEVEX4of4(evex) invertedBitFromOffset3(evex)
 #define aaaFromEVEX4of4(evex) threeBitsFromOffset0(evex)
+#define nfFromEVEX4of4(evex) bitFromOffset2(evex)
 
 // These enums represent Intel registers for use by the decoder.
 #define REGS_8BIT                                                              \
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index b0fcaef5f4b064..43a9ac14954452 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -870,7 +870,10 @@ enum : uint64_t {
   ExplicitVEXPrefix = 2ULL << ExplicitOpPrefixShift,
   /// For instructions that are promoted to EVEX space for EGPR.
   ExplicitEVEXPrefix = 3ULL << ExplicitOpPrefixShift,
-  ExplicitOpPrefixMask = 3ULL << ExplicitOpPrefixShift
+  ExplicitOpPrefixMask = 3ULL << ExplicitOpPrefixShift,
+  /// EVEX_NF - Set if this instruction has EVEX.NF field set.
+  EVEX_NFShift = ExplicitOpPrefixShift + 2,
+  EVEX_NF = 1ULL << EVEX_NFShift
 };
 
 /// \returns true if the instruction with given opcode is a prefix.
@@ -992,6 +995,12 @@ inline unsigned getOperandBias(const MCInstrDesc &Desc) {
   }
 }
 
+/// \returns true if the instruction has a NDD (new data destination).
+inline bool isND(uint64_t TSFlags) {
+  return (TSFlags & X86II::OpMapMask) == X86II::T_MAP4 &&
+         (TSFlags & X86II::EVEX_B) && (TSFlags & X86II::VEX_4V);
+}
+
 /// \returns operand # for the first field of the memory operand or -1 if no
 /// memory operands.
 /// NOTE: This ignores tied operands.  If there is a tied register which is
@@ -1018,7 +1027,7 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     return -1;
   case X86II::MRMDestMem:
   case X86II::MRMDestMemFSIB:
-    return 0;
+    return isND(TSFlags);
   case X86II::MRMSrcMem:
   case X86II::MRMSrcMemFSIB:
     // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index cab2f0a2e1c1a2..1947313a9dfb0b 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -369,6 +369,9 @@ void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O,
   else if (Flags & X86::IP_HAS_REPEAT)
     O << "\trep\t";
 
+  if (TSFlags & X86II::EVEX_NF)
+    O << "\t{nf}";
+
   // These all require a pseudo prefix
   if ((Flags & X86::IP_USE_VEX) ||
       (TSFlags & X86II::ExplicitOpPrefixMask) == X86II::ExplicitVEXPrefix)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 9e1f1eb97e7032..071f415117f30f 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -251,6 +251,7 @@ class X86OpcodePrefixHelper {
   void setAAA(const MCInst &MI, unsigned OpNum) {
     EVEX_aaa = getRegEncoding(MI, OpNum);
   }
+  void setNF(bool V) { EVEX_aaa |= V << 2; }
 
   X86OpcodePrefixHelper(const MCRegisterInfo &MRI)
       : W(0), R(0), X(0), B(0), M(0), R2(0), X2(0), B2(0), VEX_4V(0), VEX_L(0),
@@ -987,6 +988,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
   }
 
   Prefix.setW(TSFlags & X86II::REX_W);
+  Prefix.setNF(TSFlags & X86II::EVEX_NF);
 
   bool HasEVEX_K = TSFlags & X86II::EVEX_K;
   bool HasVEX_4V = TSFlags & X86II::VEX_4V;
@@ -1049,6 +1051,8 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   bool EncodeRC = false;
   uint8_t EVEX_rc = 0;
+  bool IsND = X86II::isND(TSFlags);
+
   unsigned CurOp = X86II::getOperandBias(Desc);
 
   switch (TSFlags & X86II::FormMask) {
@@ -1073,16 +1077,21 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //  MemAddr, src1(VEX_4V), src2(ModR/M)
     //  MemAddr, src1(ModR/M), imm8
     //
+    // NDD:
+    // dst(VEX_4V), MemAddr, src1(ModR/M)
     Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg);
     Prefix.setXX2(MI, MemOperand + X86::AddrIndexReg);
     Prefix.setV2(MI, MemOperand + X86::AddrIndexReg, HasVEX_4V);
 
+    if (IsND)
+      Prefix.set4VV2(MI, CurOp++);
+
     CurOp += X86::AddrNumOperands;
 
     if (HasEVEX_K)
       Prefix.setAAA(MI, CurOp++);
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       Prefix.set4VV2(MI, CurOp++);
 
     Prefix.setRR2(MI, CurOp++);
@@ -1098,12 +1107,18 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //
     //  FMA4:
     //  dst(ModR/M.reg), src1(VEX_4V), src2(ModR/M), src3(Imm[7:4])
+    //
+    //  NDD:
+    //  dst(VEX_4V), src1(ModR/M), MemAddr
+    if (IsND)
+      Prefix.set4VV2(MI, CurOp++);
+
     Prefix.setRR2(MI, CurOp++);
 
     if (HasEVEX_K)
       Prefix.setAAA(MI, CurOp++);
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       Prefix.set4VV2(MI, CurOp++);
 
     Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg);
@@ -1160,12 +1175,17 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //
     //  FMA4:
     //  dst(ModR/M.reg), src1(VEX_4V), src2(Imm[7:4]), src3(ModR/M),
+    //
+    //  NDD:
+    //  dst(VEX_4V), src1(ModR/M.reg), src2(ModR/M)
+    if (IsND)
+      Prefix.set4VV2(MI, CurOp++);
     Prefix.setRR2(MI, CurOp++);
 
     if (HasEVEX_K)
       Prefix.setAAA(MI, CurOp++);
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       Prefix.set4VV2(MI, CurOp++);
 
     Prefix.setBB2(MI, CurOp);
@@ -1209,6 +1229,11 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //  dst(ModR/M), src(ModR/M)
     //  dst(ModR/M), src(ModR/M), imm8
     //  dst(ModR/M), src1(VEX_4V), src2(ModR/M)
+    //
+    // NDD:
+    // dst(VEX_4V), src1(ModR/M), src2(ModR/M)
+    if (IsND)
+      Prefix.set4VV2(MI, CurOp++);
     Prefix.setBB2(MI, CurOp);
     Prefix.setX(MI, CurOp, 4);
     ++CurOp;
@@ -1216,7 +1241,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     if (HasEVEX_K)
       Prefix.setAAA(MI, CurOp++);
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       Prefix.set4VV2(MI, CurOp++);
 
     Prefix.setRR2(MI, CurOp++);
@@ -1508,6 +1533,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
 
   unsigned OpcodeOffset = 0;
 
+  bool IsND = X86II::isND(TSFlags);
+
   uint64_t Form = TSFlags & X86II::FormMask;
   switch (Form) {
   default:
@@ -1576,6 +1603,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
 
     if (HasVEX_4V) // Skip 1st src (which is encoded in VEX_VVVV)
       ++SrcRegNum;
+    if (IsND) // Skip the NDD operand encoded in EVEX_VVVV
+      ++CurOp;
 
     emitRegModRMByte(MI.getOperand(CurOp),
                      getX86RegNum(MI.getOperand(SrcRegNum)), CB);
@@ -1602,6 +1631,9 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     if (HasVEX_4V) // Skip 1st src (which is encoded in VEX_VVVV)
       ++SrcRegNum;
 
+    if (IsND) // Skip new data destination
+      ++CurOp;
+
     bool ForceSIB = (Form == X86II::MRMDestMemFSIB);
     emitMemModRMByte(MI, CurOp, getX86RegNum(MI.getOperand(SrcRegNum)), TSFlags,
                      Kind, StartByte, CB, Fixups, STI, ForceSIB);
@@ -1669,6 +1701,9 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
   case X86II::MRMSrcMem: {
     unsigned FirstMemOp = CurOp + 1;
 
+    if (IsND) // Skip new data destination
+      CurOp++;
+
     if (HasEVEX_K) // Skip writemask
       ++FirstMemOp;
 
diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 220ca31a825f9a..86fbe5d9d1bbe3 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -45,12 +45,12 @@ def PLEA64r   : PseudoI<(outs GR64:$dst), (ins anymem:$src), []>;
 }
 
 // BinOpRR - Instructions that read "reg, reg".
-class BinOpRR<bits<8> o, string m, X86TypeInfo t, dag out, list<dag> p>
+class BinOpRR<bits<8> o, string m, string args, X86TypeInfo t, dag out, list<dag> p>
   : ITy<o, MRMDestReg, t, out, (ins t.RegClass:$src1, t.RegClass:$src2), m,
-        binop_args, p>, Sched<[WriteALU]>;
+        args, p>, Sched<[WriteALU]>;
 // BinOpRR_F - Instructions that read "reg, reg" and write EFLAGS only.
 class BinOpRR_F<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpRR<o, m, t, (outs),
+  : BinOpRR<o, m, binop_args, t, (outs),
             [(set EFLAGS, (node t.RegClass:$src1, t.RegClass:$src2))]>,
     DefEFLAGS;
 // BinOpRR_F_Rev - Reversed encoding of BinOpRR_F
@@ -58,55 +58,69 @@ class BinOpRR_F_Rev<bits<8> o, string m, X86TypeInfo t>
   : BinOpRR_F<o, m, t, null_frag>, DisassembleOnly {
   let Form = MRMSrcReg;
 }
+// BinOpRR_R - Instructions that read "reg, reg" and write "reg".
+class BinOpRR_R<bits<8> o, string m, X86TypeInfo t, bit ndd = 0>
+  : BinOpRR<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t,
+            (outs t.RegClass:$dst), []>, NDD<ndd>;
+// BinOpRR_R_Rev - Reversed encoding of BinOpRR_R
+class BinOpRR_R_Rev<bits<8> o, string m, X86TypeInfo t, bit ndd = 0>
+  : BinOpRR_R<o, m, t, ndd>, DisassembleOnly {
+  let Form = MRMSrcReg;
+}
 // BinOpRR_RF - Instructions that read "reg, reg", and write "reg", EFLAGS.
-class BinOpRR_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpRR<o, m, t, (outs t.RegClass:$dst),
+class BinOpRR_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, bit ndd = 0>
+  : BinOpRR<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t,
+            (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS,
-             (node t.RegClass:$src1, t.RegClass:$src2))]>, DefEFLAGS;
+             (node t.RegClass:$src1, t.RegClass:$src2))]>, DefEFLAGS, NDD<ndd>;
 // BinOpRR_RF_Rev - Reversed encoding of BinOpRR_RF.
-class BinOpRR_RF_Rev<bits<8> o, string m, X86TypeInfo t>
-  : BinOpRR_RF<o, m, t, null_frag>, DisassembleOnly {
+class BinOpRR_RF_Rev<bits<8> o, string m, X86TypeInfo t, bit ndd = 0>
+  : BinOpRR_RF<o, m, t, null_frag, ndd>, DisassembleOnly {
   let Form = MRMSrcReg;
 }
 // BinOpRRF_RF - Instructions that read "reg, reg", write "reg" and read/write
 // EFLAGS.
-class BinOpRRF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpRR<o, m, t, (outs t.RegClass:$dst),
+class BinOpRRF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, bit ndd = 0>
+  : BinOpRR<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS,
              (node t.RegClass:$src1, t.RegClass:$src2,
-             EFLAGS))]>, DefEFLAGS, UseEFLAGS {
+             EFLAGS))]>, DefEFLAGS, UseEFLAGS, NDD<ndd> {
   let SchedRW = [WriteADC];
 }
 // BinOpRRF_RF_Rev - Reversed encoding of BinOpRRF_RF
-class BinOpRRF_RF_Rev<bits<8> o, string m, X86TypeInfo t>
-  : BinOpRRF_RF<o, m, t, null_frag>, DisassembleOnly {
+class BinOpRRF_RF_Rev<bits<8> o, string m, X86TypeInfo t, bit ndd = 0>
+  : BinOpRRF_RF<o, m, t, null_frag, ndd>, DisassembleOnly {
   let Form = MRMSrcReg;
 }
 
 // BinOpRM - Instructions that read "reg, [mem]".
-class BinOpRM<bits<8> o, string m, X86TypeInfo t, dag out, list<dag> p>
+class BinOpRM<bits<8> o, string m, string args, X86TypeInfo t, dag out, list<dag> p>
   : ITy<o, MRMSrcMem, t, out, (ins t.RegClass:$src1, t.MemOperand:$src2), m,
-        binop_args, p>,
+        args, p>,
     Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]> {
   let mayLoad = 1;
 }
 // BinOpRM_F - Instructions that read "reg, [mem]" and write EFLAGS only.
 class BinOpRM_F<bits<8> o, string m, X86TypeInfo t, SDNode node>
-  : BinOpRM<o, m, t, (outs),
+  : BinOpRM<o, m, binop_args, t, (outs),
             [(set EFLAGS, (node t.RegClass:$src1,
              (t.LoadNode addr:$src2)))]>, DefEFLAGS;
-// BinOpRM_RF - Instructions that read "reg, reg", and write "reg", EFLAGS.
-class BinOpRM_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpRM<o, m, t, (outs t.RegClass:$dst),
+// BinOpRM_R - Instructions that read "reg, [mem]", and write "reg".
+class BinOpRM_R<bits<8> o, string m, X86TypeInfo t, bit ndd = 0>
+  : BinOpRM<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, (outs t.RegClass:$dst),
+            []>, NDD<ndd>;
+// BinOpRM_RF - Instructions that read "reg, [mem]", and write "reg", EFLAGS.
+class BinOpRM_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, bit ndd = 0>
+  : BinOpRM<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS, (node t.RegClass:$src1,
-             (t.LoadNode addr:$src2)))]>, DefEFLAGS;
+             (t.LoadNode addr:$src2)))]>, DefEFLAGS, NDD<ndd>;
 // BinOpRMF_RF - Instructions that read "reg, [mem]", write "reg" and read/write
 // EFLAGS.
-class BinOpRMF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpRM<o, m, t, (outs t.RegClass:$dst),
+class BinOpRMF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, bit ndd = 0>
+  : BinOpRM<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS,
              (node t.RegClass:$src1, (t.LoadNode addr:$src2), EFLAGS))]>,
-    DefEFLAGS, UseEFLAGS {
+    DefEFLAGS, UseEFLAGS, NDD<ndd> {
   let SchedRW = [WriteADC.Folded, WriteADC.ReadAfterFold,
                  // base, scale, index, offset, segment.
                  ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault,
@@ -126,18 +140,22 @@ class BinOpRI_F<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node,
   : BinOpRI<o, m, binop_args, t, f, (outs),
             [(set EFLAGS, (node t.RegClass:$src1,
              t.ImmOperator:$src2))]>, DefEFLAGS;
+// BinOpRI_R - Instructions that read "reg, imm" and write "reg".
+class BinOpRI_R<bits<8> o, string m, X86TypeInfo t, Format f, bit ndd = 0>
+  : BinOpRI<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst),
+            []>, NDD<ndd>;
 // BinOpRI_RF - Instructions that read "reg, imm" and write "reg", EFLAGS.
-class BinOpRI_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
-  : BinOpRI<o, m, binop_args, t, f, (outs t.RegClass:$dst),
+class BinOpRI_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, Format f, bit ndd = 0>
+  : BinOpRI<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS,
-             (node t.RegClass:$src1, t.ImmOperator:$src2))]>, DefEFLAGS;
+             (node t.RegClass:$src1, t.ImmOperator:$src2))]>, DefEFLAGS, NDD<ndd>;
 // BinOpRIF_RF - Instructions that read "reg, imm", write "reg" and read/write
 // EFLAGS.
-class BinOpRIF_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
-  : BinOpRI<o, m, binop_args, t, f, (outs t.RegClass:$dst),
+class BinOpRIF_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f, bit ndd = 0>
+  : BinOpRI<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst),
             [(set t.RegClass:$dst, EFLAGS,
              (node t.RegClass:$src1, t.ImmOperator:$src2,
-             EFLAGS))]>, DefEFLAGS, UseEFLAGS {
+             EFLAGS))]>, DefEFLAGS, UseEFLAGS, NDD<ndd> {
   let SchedRW = [WriteADC];
 }
 // BinOpRI8 - Instructions that read "reg, imm8".
@@ -149,31 +167,51 @@ class BinOpRI8<bits<8> o, string m, string args, X86TypeInfo t, Format f, dag ou
 // BinOpRI8_F - Instructions that read "reg, imm8" and write EFLAGS only.
 class BinOpRI8_F<bits<8> o, string m, X86TypeInfo t, Format f>
   : BinOpRI8<o, m, binop_args, t, f, (outs)>, DefEFLAGS;
+// BinOpRI8_R - Instructions that read "reg, imm8" and write "reg".
+class BinOpRI8_R<bits<8> o, string m, X86TypeInfo t, Format f, bit ndd = 0>
+  : BinOpRI8<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst)>, NDD<ndd>;
 // BinOpRI8_RF - Instructions that read "reg, imm8" and write "reg", EFLAGS.
-class BinOpRI8_RF<bits<8> o, string m, X86TypeInfo t, Format f>
-  : BinOpRI8<o, m, binop_args, t, f, (outs t.RegClass:$dst)>, DefEFLAGS;
+class BinOpRI8_RF<bits<8> o, string m, X86TypeInfo t, Format f, bit ndd = 0>
+  : BinOpRI8<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst)>, DefEFLAGS, NDD<ndd>;
 // BinOpRI8F_RF - Instructions that read "reg, imm", write "reg" and read/write
 // EFLAGS.
-class BinOpRI8F_RF<bits<8> o, string m, X86TypeInfo t, Format f>
-  : BinOpRI8<o, m, binop_args, t, f, (outs t.RegClass:$dst)>, DefEFLAGS, UseEFLAGS {
+class BinOpRI8F_RF<bits<8> o, string m, X86TypeInfo t, Format f, bit ndd = 0>
+  : BinOpRI8<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst)>, DefEFLAGS, UseEFLAGS, NDD<ndd> {
   let SchedRW = [WriteADC];
 }
 
 // BinOpMR - Instructions that read "[mem], reg".
-class BinOpMR<bits<8> o, string m, X86TypeInfo t, list<dag> p>
-  : ITy<o, MRMDestMem, t, (outs), (ins t.MemOperand:$src1, t.RegClass:$src2), m,
-        binop_args, p> {
+class BinOpMR<bits<8> o, string m, string args, X86TypeInfo t, dag out, list<dag> p>
+  : ITy<o, MRMDestMem, t, out, (ins t.MemOperand:$src1, t.RegClass:$src2), m,
+        args, p> {
   let mayLoad = 1;
+  let SchedRW = [WriteALU.Folded, WriteALU.ReadAfterFold];
 }
+// BinOpMR_R - Instructions that read "[mem], reg", and write "reg".
+class BinOpMR_R<bits<8> o, string m, X86TypeInfo t>
+  : BinOpMR<o, m, binop_ndd_args, t, (outs t.RegClass:$dst), []>, NDD<1>;
+// BinOpMR_RF - Instructions that read "[mem], reg", and write "reg", EFLAGS.
+class BinOpMR_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
+  : BinOpMR<o, m, binop_ndd_args, t, (outs t.RegClass:$dst),
+            [(set t.RegClass:$dst, EFLAGS, (node (t.LoadNode addr:$src1),
+             t.RegClass:$src2))]>, DefEFLAGS, NDD<1>;
 // BinOpMR_F - Instructions that read "[mem], imm8" and write EFLAGS only.
 class BinOpMR_F<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
-  : BinOpMR<o, m, t,
+  : BinOpMR<o, m, binop_args, t, (outs),
             [(set EFLAGS, (node (t.LoadNode addr:$src1), t.RegClass:$src2))]>,
     Sched<[WriteALU.Folded, ReadDefault, ReadDefault, ReadDefault,
             ReadDefault, ReadDefault, WriteALU.ReadAfterFold]>, DefEFLAGS;
+// BinOpMR_M - Instructions that read "[mem], reg" and write "[mem]".
+class BinOpMR_M<bits<8> o, string m, X86TypeInfo t>
+  : BinOpMR<o, m, binop_args, t, (outs), []>,
+    Sched<[WriteALURMW,
+           // base, scale, index, offset, segment
+           ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault]> {
+  let mayStore = 1;
+}
 // BinOpMR_MF - Instructions that read "[mem], reg" and write "[mem]", EFLAGS.
-class BinOpMR_MF<bits<8> o, string m, X86TypeInfo t, SDNode node>
-  : BinOpMR<o, m, t,
+class BinOpMR_MF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
+  : BinOpMR<o, m, binop_args, t, (outs),
             [(store (node (load addr:$src1), t.RegClass:$src2), addr:$src1),
              (implicit EFLAGS)]>,
     Sched<[WriteALURMW,
@@ -183,10 +221,17 @@ class BinOpMR_MF<bits<8> o, string m, X86TypeInfo t, SDNode node>
     DefEFLAGS {
   let mayStore = 1;
 }
+// BinOpMRF_RF - Instructions that read "[mem], reg", write "reg" and
+// read/write EFLAGS.
+class BinOpMRF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
+  : BinOpMR<o, m, binop_ndd_args, t, (outs t.RegClass:$dst),
+            [(set t.RegClass:$dst, EFLAGS, (node (load addr:$src1),
+             t.RegClass:$src2, EFLAGS))]>, DefEFLAGS, UseEFLAGS, NDD<1>,
+    Sched<[WriteADC.Folded, WriteADC.ReadAfterFold]>;
 // BinOpMRF_MF - Instructions that read "[mem], reg", write "[mem]" and
 // read/write EFLAGS.
-class BinOpMRF_MF<bits<8> o, string m, X86TypeInfo t, SDNode node>
-  : BinOpMR<o, m, t,
+class BinOpMRF_MF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node>
+  : BinOpMR<o, m, binop_args, t, (outs),
             [(store (node (load addr:$src1), t.RegClass:$src2, EFLAGS),
              addr:$src1), (implicit EFLAGS)]>,
     Sched<[WriteADCRMW,
@@ -212,14 +257,36 @@ class BinOpMI_F<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node,
   : BinOpMI<o, m, binop_args, t, f, (outs),
             [(set EFLAGS, (node (t.LoadNode addr:$src1), t.ImmOperator:$src2))]>,
     Sched<[WriteALU.Folded]>, DefEFLAGS;
+// BinOpMI_R - Instructions that read "[mem], imm" and write "reg".
+class BinOpMI_R<bits<8> o, string m, X86TypeInfo t, Format f>
+  : BinOpMI<o, m, binop_ndd_args, t, f, (outs t.RegClass:$dst), []>,
+    Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, NDD<1>;
+// BinOpMI_R - Instructions that read "[mem], imm" and write "reg", EFLAGS.
+class BinOpMI_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node,
+                Format f>
+  : BinOpMI<o, m, binop_ndd_args, t, f, (outs t.RegClass:$dst),
+            [(set t.RegClass:$dst, EFLAGS, (node (t.LoadNode addr:$src1), t.ImmOperator:$src2))]>,
+    Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, DefEFLAGS, NDD<1>;
+// BinOpMI_M - Instructions that read "[mem], imm" and write "[mem]".
+class BinOpMI_M<bits<8> o, string m, X86TypeInfo t, Format f>
+  : BinOpMI<o, m, binop_args, t, f, (outs), []>, Sched<[WriteALURMW]> {
+  let mayStore = 1;
+}
 // BinOpMI_MF - Instructions that read "[mem], imm" and write "[mem]", EFLAGS.
-class BinOpMI_MF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
+class BinOpMI_MF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, Format f>
   : BinOpMI<o, m, binop_args, t, f, (outs),
             [(store (node (t.VT (load addr:$src1)),
              t.ImmOperator:$src2), addr:$src1), (implicit EFLAGS)]>,
     Sched<[WriteALURMW]>, DefEFLAGS {
   let mayStore = 1;
 }
+// BinOpMIF_RF - Instructions that read "[mem], imm", write "reg" and
+// read/write EFLAGS.
+class BinOpMIF_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
+  : BinOpMI<o, m, binop_ndd_args, t, f, (outs t.RegClass:$dst),
+            [(set t.RegClass:$dst, EFLAGS, (node (t.VT (load addr:$src1)),
+             t.ImmOperator:$src2, EFLAGS))]>,
+    Sched<[WriteADC.Folded, WriteADC.ReadAfterFold]>, DefEFLAGS, UseEFLAGS, NDD<1>;
 // BinOpMIF_MF - Instructions that read "[mem], imm", write "[mem]" and
 // read/write EFLAGS.
 class BinOpMIF_MF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
@@ -240,11 +307,27 @@ class BinOpMI8<string m, string args, X86TypeInfo t, Format f, dag out>
 // BinOpMI8_F - Instructions that read "[mem], imm8" and write EFLAGS only.
 class BinOpMI8_F<string m, X86TypeInfo t, Format f>
   : BinOpMI8<m, binop_args, t, f, (outs)>, Sched<[WriteALU.Folded]>, DefEFLAGS;
+// BinOpMI8_R - Instructions that read "[mem], imm8" and write "reg".
+class BinOpMI8_R<string m, X86TypeInfo t, Format f>
+  : BinOpMI8<m, binop_ndd_args, t, f, (outs t.RegClass:$dst)>, Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, NDD<1>;
+// BinOpMI8_RF - Instructions that read "[mem], imm8" and write "reg"/EFLAGS.
+class BinOpMI8_RF<string m, X86TypeInfo t, Format f>
+  : BinOpMI8<m, binop_ndd_args, t, f, (outs t.RegClass:$dst)>, Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, DefEFLAGS, NDD<1>;
+// BinOpMI8_M - Instructions that read "[mem], imm8" and write "[mem]".
+class BinOpMI8_M<string m, X86TypeInfo t, Format f>
+  : BinOpMI8<m, binop_args, t, f, (outs)>, Sched<[WriteALURMW]> {
+  let mayStore = 1;
+}
 // BinOpMI8_MF - Instructions that read "[mem], imm8" and write "[mem]", EFLAGS.
 class BinOpMI8_MF<string m, X86TypeInfo t, Format f>
   : BinOpMI8<m, binop_args, t, f, (outs)>, Sched<[WriteALURMW]>, DefEFLAGS {
   let mayStore = 1;
 }
+// BinOpMI8F_RF - Instructions that read "[mem], imm8", write "reg" and
+// read/write EFLAGS.
+class BinOpMI8F_RF<string m, X86TypeInfo t, Format f>
+  : BinOpMI8<m, binop_ndd_args, t, f, (outs t.RegClass:$dst)>,
+    Sched<[WriteADC.Folded, WriteADC.ReadAfterFold]>, DefEFLAGS, UseEFLAGS, NDD<1>;
 // BinOpMI8F_MF - Instructions that read "[mem], imm8", write "[mem]" and
 // read/write EFLAGS.
 class BinOpMI8F_MF<string m, X86TypeInfo t, Format f>
@@ -547,56 +630,200 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
                          SDNode opnodeflag, SDNode opnode,
                          bit CommutableRR, bit ConvertibleToThreeAddress,
                          bit ConvertibleToThreeAddressRR> {
-  let Constraints = "$src1 = $dst" in {
-    let isCommutable = CommutableRR,
-        isConvertibleToThreeAddress = ConvertibleToThreeAddressRR in {
+  let isCommutable = CommutableRR,
+      isConvertibleToThreeAddress = ConvertibleToThreeAddressRR in {
+    let Predicates = [NoNDD] in {
     def NAME#8rr  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag>;
     def NAME#16rr : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag>, OpSize16;
     def NAME#32rr : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag>, OpSize32;
     def NAME#64rr : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag>;
     }
+    let Predicates = [HasNDD, In64BitMode] in {
+    def NAME#8rr_ND  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag, 1>;
+    def NAME#16rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag, 1>, PD;
+    def NAME#32rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag, 1>;
+    def NAME#64rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag, 1>;
+    def NAME#8rr_NF_ND  : BinOpRR_R<BaseOpc, mnemonic, Xi8, 1>, EVEX_NF;
+    def NAME#16rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi16, 1>, EVEX_NF, PD;
+    def NAME#32rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi32, 1>, EVEX_NF;
+    def NAME#64rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi64, 1>, EVEX_NF;
+    }
+    let Predicates = [In64BitMode] in {
+    def NAME#8rr_NF  : BinOpRR_R<BaseOpc, mnemonic, Xi8>, NF;
+    def NAME#16rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi16>, NF, PD;
+    def NAME#32rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi32>, NF;
+    def NAME#64rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi64>, NF;
+    def NAME#8rr_EVEX  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+    def NAME#16rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+    def NAME#32rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+    def NAME#64rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+    }
+  }
 
   def NAME#8rr_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>;
   def NAME#16rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, OpSize16;
   def NAME#32rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, OpSize32;
   def NAME#64rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>;
+    let Predicates = [In64BitMode] in {
+    def NAME#8rr_EVEX_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
+    def NAME#16rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
+    def NAME#32rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
+    def NAME#64rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
+    def NAME#8rr_ND_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
+    def NAME#16rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
+    def NAME#32rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
+    def NAME#64rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
+    def NAME#8rr_NF_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8>, NF;
+    def NAME#16rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16>, NF, PD;
+    def NAME#32rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32>, NF;
+    def NAME#64rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64>, NF;
+    def NAME#8rr_NF_ND_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
+    def NAME#16rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
+    def NAME#32rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
+    def NAME#64rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
+    }
 
-  def NAME#8rm   : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag>;
-  def NAME#16rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag>, OpSize16;
-  def NAME#32rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag>, OpSize32;
-  def NAME#64rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag>;
+    let Predicates = [NoNDD] in {
+    def NAME#8rm   : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag>;
+    def NAME#16rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag>, OpSize16;
+    def NAME#32rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag>, OpSize32;
+    def NAME#64rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag>;
+    }
+    let Predicates = [HasNDD, In64BitMode] in {
+    def NAME#8rm_ND  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag, 1>;
+    def NAME#16rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag, 1>, PD;
+    def NAME#32rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag, 1>;
+    def NAME#64rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag, 1>;
+    def NAME#8rm_NF_ND  : BinOpRM_R<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
+    def NAME#16rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
+    def NAME#32rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
+    def NAME#64rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
+    }
+    let Predicates = [In64BitMode] in {
+    def NAME#8rm_NF  : BinOpRM_R<BaseOpc2, mnemonic, Xi8>, NF;
+    def NAME#16rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi16>, NF, PD;
+    def NAME#32rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi32>, NF;
+    def NAME#64rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi64>, NF;
+    def NAME#8rm_EVEX  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , null_frag>, PL;
+    def NAME#16rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, null_frag>, PL, PD;
+    def NAME#32rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, null_frag>, PL;
+    def NAME#64rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, null_frag>, PL;
+    }
 
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
-    def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
-    // NOTE: These are order specific, we want the ri8 forms to be listed
-    // first so that they are slightly preferred to the ri forms.
-    def NAME#16ri8 : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
-    def NAME#32ri8 : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
-    def NAME#64ri8 : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>;
-
-    def NAME#16ri  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM>, OpSize16;
-    def NAME#32ri  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM>, OpSize32;
-    def NAME#64ri32: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM>;
+      let Predicates = [NoNDD] in {
+      def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
+      // NOTE: These are order specific, we want the ri8 forms to be listed
+      // first so that they are slightly preferred to the ri forms.
+      def NAME#16ri8 : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
+      def NAME#32ri8 : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
+      def NAME#64ri8 : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>;
+      def NAME#16ri  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM>, OpSize16;
+      def NAME#32ri  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM>, OpSize32;
+      def NAME#64ri32: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM>;
+      }
+      let Predicates = [HasNDD, In64BitMode] in {
+      def NAME#8ri_ND   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM, 1>;
+      def NAME#16ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
+      def NAME#32ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
+      def NAME#64ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
+      def NAME#16ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM, 1>, PD;
+      def NAME#32ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM, 1>;
+      def NAME#64ri32_ND: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM, 1>;
+      def NAME#8ri_NF_ND  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
+      def NAME#16ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
+      def NAME#32ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
+      def NAME#64ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+      def NAME#16ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
+      def NAME#32ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
+      def NAME#64ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+      }
+      let Predicates = [In64BitMode] in {
+      def NAME#8ri_NF  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
+      def NAME#16ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM>, NF, PD;
+      def NAME#32ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM>, NF;
+      def NAME#64ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM>, NF;
+      def NAME#16ri_NF : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM>, NF, PD;
+      def NAME#32ri_NF : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM>, NF;
+      def NAME#64ri_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
+      def NAME#8ri_EVEX   : BinOpRI_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
+      def NAME#16ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
+      def NAME#32ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
+      def NAME#64ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
+      def NAME#16ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi16, null_frag, RegMRM>, PL, PD;
+      def NAME#32ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi32, null_frag, RegMRM>, PL;
+      def NAME#64ri32_EVEX: BinOpRI_RF<0x81, mnemonic, Xi64, null_frag, RegMRM>, PL;
+      }
     }
-  } // Constraints = "$src1 = $dst"
 
   def NAME#8mr    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , opnode>;
   def NAME#16mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
   def NAME#32mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
   def NAME#64mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, opnode>;
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8mr_ND    : BinOpMR_RF<BaseOpc, mnemonic, Xi8 , opnode>;
+  def NAME#16mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
+  def NAME#32mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi32, opnode>;
+  def NAME#64mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi64, opnode>;
+  def NAME#8mr_NF_ND    : BinOpMR_R<BaseOpc, mnemonic, Xi8>, EVEX_NF;
+  def NAME#16mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi16>, EVEX_NF, PD;
+  def NAME#32mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi32>, EVEX_NF;
+  def NAME#64mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi64>, EVEX_NF;
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8mr_NF    : BinOpMR_M<BaseOpc, mnemonic, Xi8>, NF;
+  def NAME#16mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi16>, NF, PD;
+  def NAME#32mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi32>, NF;
+  def NAME#64mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi64>, NF;
+  def NAME#8mr_EVEX    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+  def NAME#16mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+  def NAME#32mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+  def NAME#64mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+  }
 
   // NOTE: These are order specific, we want the mi8 forms to be listed
   // first so that they are slightly preferred to the mi forms.
+  def NAME#8mi    : BinOpMI_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi8  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, OpSize16;
   def NAME#32mi8  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
   def NAME#64mi8  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>;
-
-  def NAME#8mi    : BinOpMI_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi   : BinOpMI_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, OpSize16;
   def NAME#32mi   : BinOpMI_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
   def NAME#64mi32 : BinOpMI_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8mi_ND    : BinOpMI_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
+  def NAME#16mi8_ND  : BinOpMI8_RF<mnemonic, Xi16, MemMRM>, PD;
+  def NAME#32mi8_ND  : BinOpMI8_RF<mnemonic, Xi32, MemMRM>;
+  def NAME#64mi8_ND  : BinOpMI8_RF<mnemonic, Xi64, MemMRM>;
+  def NAME#16mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
+  def NAME#32mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
+  def NAME#64mi32_ND : BinOpMI_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+  def NAME#8mi_NF_ND    : BinOpMI_R<0x80, mnemonic, Xi8, MemMRM>, NF;
+  def NAME#16mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi16, MemMRM>, NF, PD;
+  def NAME#32mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi32, MemMRM>, NF;
+  def NAME#64mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi64, MemMRM>, NF;
+  def NAME#16mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
+  def NAME#32mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi32, MemMRM>, NF;
+  def NAME#64mi32_NF_ND : BinOpMI_R<0x81, mnemonic, Xi64, MemMRM>, NF;
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8mi_NF    : BinOpMI_M<0x80, mnemonic, Xi8, MemMRM>, NF;
+  def NAME#16mi8_NF  : BinOpMI8_M<mnemonic, Xi16, MemMRM>, NF, PD;
+  def NAME#32mi8_NF  : BinOpMI8_M<mnemonic, Xi32, MemMRM>, NF;
+  def NAME#64mi8_NF  : BinOpMI8_M<mnemonic, Xi64, MemMRM>, NF;
+  def NAME#16mi_NF   : BinOpMI_M<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
+  def NAME#32mi_NF   : BinOpMI_M<0x81, mnemonic, Xi32, MemMRM>, NF;
+  def NAME#64mi32_NF : BinOpMI_M<0x81, mnemonic, Xi64, MemMRM>, NF;
+  def NAME#8mi_EVEX    : BinOpMI_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
+  def NAME#16mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, PL, PD;
+  def NAME#32mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, PL;
+  def NAME#64mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>, PL;
+  def NAME#16mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi16, null_frag, MemMRM>, PL, PD;
+  def NAME#32mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi32, null_frag, MemMRM>, PL;
+  def NAME#64mi32_EVEX : BinOpMI_MF<0x81, mnemonic, Xi64, null_frag, MemMRM>, PL;
+  }
 
   // These are for the disassembler since 0x82 opcode behaves like 0x80, but
   // not in 64-bit mode.
@@ -626,26 +853,67 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
                           string mnemonic, Format RegMRM, Format MemMRM,
                           SDNode opnode, bit CommutableRR,
                            bit ConvertibleToThreeAddress> {
-  let Constraints = "$src1 = $dst" in {
-    let isCommutable = CommutableRR in {
+  let isCommutable = CommutableRR in {
+    let Predicates = [NoNDD] in {
     def NAME#8rr  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
       let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
       def NAME#16rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
       def NAME#32rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
       def NAME#64rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
-    } // isConvertibleToThreeAddress
+      }
+    }
+    let Predicates = [HasNDD, In64BitMode] in {
+    def NAME#8rr_ND  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode, 1>;
+      let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
+      def NAME#16rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode, 1>, PD;
+      def NAME#32rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode, 1>;
+      def NAME#64rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode, 1>;
+      }
+    }
   } // isCommutable
 
+  let Predicates = [In64BitMode] in {
+  def NAME#8rr_EVEX  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+  def NAME#16rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+  def NAME#32rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+  def NAME#64rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+  }
+
   def NAME#8rr_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8>;
   def NAME#16rr_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16>, OpSize16;
   def NAME#32rr_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32>, OpSize32;
   def NAME#64rr_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64>;
+  let Predicates = [In64BitMode] in {
+  def NAME#8rr_ND_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
+  def NAME#16rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
+  def NAME#32rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
+  def NAME#64rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
+  def NAME#8rr_EVEX_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
+  def NAME#16rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
+  def NAME#32rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
+  def NAME#64rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
+  }
 
+  let Predicates = [NoNDD] in {
   def NAME#8rm   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>;
   def NAME#16rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, OpSize16;
   def NAME#32rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, OpSize32;
   def NAME#64rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>;
+  }
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8rm_ND   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode, 1>;
+  def NAME#16rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode, 1>, PD;
+  def NAME#32rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode, 1>;
+  def NAME#64rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode, 1>;
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8rm_EVEX   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>, PL;
+  def NAME#16rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, PL, PD;
+  def NAME#32rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, PL;
+  def NAME#64rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>, PL;
+  }
 
+  let Predicates = [NoNDD] in {
   def NAME#8ri   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>;
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
     // NOTE: These are order specific, we want the ri8 forms to be listed
@@ -658,26 +926,77 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
     def NAME#32ri  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, OpSize32;
     def NAME#64ri32: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>;
     }
-  } // Constraints = "$src1 = $dst"
+  }
+
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8ri_ND   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM, 1>;
+    let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
+    def NAME#16ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
+    def NAME#32ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
+    def NAME#64ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
+    def NAME#16ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM, 1>, PD;
+    def NAME#32ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM, 1>;
+    def NAME#64ri32_ND: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM, 1>;
+    }
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8ri_EVEX   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>, PL;
+  def NAME#16ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
+  def NAME#32ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
+  def NAME#64ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
+  def NAME#16ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, PL, PD;
+  def NAME#32ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, PL;
+  def NAME#64ri32_EVEX: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>, PL;
+  }
 
   def NAME#8mr    : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , opnode>;
   def NAME#16mr   : BinOpMRF_MF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
   def NAME#32mr   : BinOpMRF_MF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
   def NAME#64mr   : BinOpMRF_MF<BaseOpc, mnemonic, Xi64, opnode>;
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8mr_ND    : BinOpMRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
+  def NAME#16mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
+  def NAME#32mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi32, opnode>;
+  def NAME#64mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8mr_EVEX    : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+  def NAME#16mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+  def NAME#32mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+  def NAME#64mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+  }
 
   // NOTE: These are order specific, we want the mi8 forms to be listed
   // first so that they are slightly preferred to the mi forms.
+  def NAME#8mi    : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi8  : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, OpSize16;
   def NAME#32mi8  : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
   def NAME#64mi8  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>;
-
-  def NAME#8mi    : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi   : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, OpSize16;
   def NAME#32mi   : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
   def NAME#64mi32 : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
 
+  let Predicates = [HasNDD, In64BitMode] in {
+  def NAME#8mi_ND    : BinOpMIF_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
+  def NAME#16mi8_ND  : BinOpMI8F_RF<mnemonic, Xi16, MemMRM>, PD;
+  def NAME#32mi8_ND  : BinOpMI8F_RF<mnemonic, Xi32, MemMRM>;
+  def NAME#64mi8_ND  : BinOpMI8F_RF<mnemonic, Xi64, MemMRM>;
+  def NAME#16mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
+  def NAME#32mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
+  def NAME#64mi32_ND : BinOpMIF_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+  }
+  let Predicates = [In64BitMode] in {
+  def NAME#8mi_EVEX    : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>, PL;
+  def NAME#16mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, PL, PD;
+  def NAME#32mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, PL;
+  def NAME#64mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>, PL;
+  def NAME#16mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, PL, PD;
+  def NAME#32mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, PL;
+  def NAME#64mi32_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>, PL;
+  }
+
   // These are for the disassembler since 0x82 opcode behaves like 0x80, but
   // not in 64-bit mode.
   let Predicates = [Not64BitMode]  in {
diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td
index 07e5576960d65c..6e76b44b66a307 100644
--- a/llvm/lib/Target/X86/X86InstrFormats.td
+++ b/llvm/lib/Target/X86/X86InstrFormats.td
@@ -256,6 +256,7 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
   bit hasEVEX_Z = 0;        // Does this inst set the EVEX_Z field?
   bit hasEVEX_L2 = 0;       // Does this inst set the EVEX_L2 field?
   bit hasEVEX_B = 0;        // Does this inst set the EVEX_B field?
+  bit hasEVEX_NF = 0;       // Does this inst set the EVEX_NF field?
   bits<3> CD8_Form = 0;     // Compressed disp8 form - vector-width.
   // Declare it int rather than bits<4> so that all bits are defined when
   // assigning to bits<7>.
@@ -309,4 +310,5 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
   let TSFlags{48}    = hasEVEX_RC;
   let TSFlags{49}    = hasNoTrackPrefix;
   let TSFlags{51-50} = explicitOpPrefixBits;
+  let TSFlags{52}    = hasEVEX_NF;
 }
diff --git a/llvm/lib/Target/X86/X86InstrPredicates.td b/llvm/lib/Target/X86/X86InstrPredicates.td
index df4bc38aa0b56f..94fa6e45ded9d7 100644
--- a/llvm/lib/Target/X86/X86InstrPredicates.td
+++ b/llvm/lib/Target/X86/X86InstrPredicates.td
@@ -10,6 +10,8 @@ def TruePredicate : Predicate<"true">;
 
 def HasEGPR      : Predicate<"Subtarget->hasEGPR()">;
 def NoEGPR       : Predicate<"!Subtarget->hasEGPR()">;
+def HasNDD       : Predicate<"Subtarget->hasNDD()">;
+def NoNDD        : Predicate<"!Subtarget->hasNDD()">;
 def HasCMOV      : Predicate<"Subtarget->canUseCMOV()">;
 def NoCMOV       : Predicate<"!Subtarget->canUseCMOV()">;
 def HasNOPL      : Predicate<"Subtarget->hasNOPL()">;
diff --git a/llvm/lib/Target/X86/X86InstrUtils.td b/llvm/lib/Target/X86/X86InstrUtils.td
index b7d2d8096ff54f..e6089420679e89 100644
--- a/llvm/lib/Target/X86/X86InstrUtils.td
+++ b/llvm/lib/Target/X86/X86InstrUtils.td
@@ -50,6 +50,7 @@ class EVEX   { Encoding OpEnc = EncEVEX; }
 class EVEX_K { bit hasEVEX_K = 1; }
 class EVEX_KZ : EVEX_K { bit hasEVEX_Z = 1; }
 class EVEX_B { bit hasEVEX_B = 1; }
+class EVEX_NF { bit hasEVEX_NF = 1; }
 class EVEX_RC { bit hasEVEX_RC = 1; }
 class EVEX_V512 { bit hasEVEX_L2 = 1; bit hasVEX_L = 0; }
 class EVEX_V256 { bit hasEVEX_L2 = 0; bit hasVEX_L = 1; }
@@ -958,3 +959,17 @@ class ITy<bits<8> o, Format f, X86TypeInfo t, dag outs, dag ins, string m,
 defvar unaryop_args = "$src";
 defvar binop_args = "{$src2, $src1|$src1, $src2}";
 defvar binop_ndd_args = "{$src2, $src1, $dst|$dst, $src1, $src2}";
+defvar binop_constraint = "$src1 = $dst";
+
+// NDD - Helper for new data destination instructions
+class NDD<bit ndd> {
+  string Constraints = !if(!eq(ndd, 0), binop_constraint, "");
+  Encoding OpEnc = !if(!eq(ndd, 0), EncNormal, EncEVEX);
+  bit hasEVEX_B = ndd;
+  bit hasVEX_4V = ndd;
+  Map OpMap = !if(!eq(ndd, 0), OB, T_MAP4);
+}
+// NF - Helper for NF (no flags update) instructions
+class NF: T_MAP4, EVEX, EVEX_NF;
+// PL - Helper for promoted legacy instructions
+class PL: T_MAP4, EVEX, ExplicitEVEXPrefix;
diff --git a/llvm/test/MC/Disassembler/X86/apx/adc.txt b/llvm/test/MC/Disassembler/X86/apx/adc.txt
new file mode 100644
index 00000000000000..b46957888719cd
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/adc.txt
@@ -0,0 +1,210 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	adcb	$123, %bl
+# INTEL: {evex}	adc	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xd3,0x7b
+
+# ATT:   adcb	$123, %bl, %cl
+# INTEL: adc	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xd3,0x7b
+
+# ATT:   {evex}	adcw	$123, %dx
+# INTEL: {evex}	adc	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xd2,0x7b
+
+# ATT:   adcw	$123, %dx, %ax
+# INTEL: adc	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xd2,0x7b
+
+# ATT:   {evex}	adcl	$123, %ecx
+# INTEL: {evex}	adc	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xd1,0x7b
+
+# ATT:   adcl	$123, %ecx, %edx
+# INTEL: adc	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xd1,0x7b
+
+# ATT:   {evex}	adcq	$123, %r9
+# INTEL: {evex}	adc	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xd1,0x7b
+
+# ATT:   adcq	$123, %r9, %r15
+# INTEL: adc	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xd1,0x7b
+
+# ATT:   {evex}	adcb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   adcb	$123, 291(%r8,%rax,4), %bl
+# INTEL: adc	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	adcw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   adcw	$123, 291(%r8,%rax,4), %dx
+# INTEL: adc	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	adcl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   adcl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: adc	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	adcq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   adcq	$123, 291(%r8,%rax,4), %r9
+# INTEL: adc	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	adcw	$1234, %dx
+# INTEL: {evex}	adc	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xd2,0xd2,0x04
+
+# ATT:   adcw	$1234, %dx, %ax
+# INTEL: adc	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xd2,0xd2,0x04
+
+# ATT:   {evex}	adcw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   adcw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: adc	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	adcl	$123456, %ecx
+# INTEL: {evex}	adc	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00
+
+# ATT:   adcl	$123456, %ecx, %edx
+# INTEL: adc	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	adcq	$123456, %r9
+# INTEL: {evex}	adc	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00
+
+# ATT:   adcq	$123456, %r9, %r15
+# INTEL: adc	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	adcl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   adcl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: adc	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	adcq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   adcq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: adc	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	adcb	%bl, %cl
+# INTEL: {evex}	adc	cl, bl
+0x62,0xf4,0x7c,0x08,0x10,0xd9
+
+# ATT:   adcb	%bl, %cl, %r8b
+# INTEL: adc	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x10,0xd9
+
+# ATT:   {evex}	adcb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x10,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: adc	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x10,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcw	%dx, %ax
+# INTEL: {evex}	adc	ax, dx
+0x62,0xf4,0x7d,0x08,0x11,0xd0
+
+# ATT:   adcw	%dx, %ax, %r9w
+# INTEL: adc	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x11,0xd0
+
+# ATT:   {evex}	adcw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x11,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: adc	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x11,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcl	%ecx, %edx
+# INTEL: {evex}	adc	edx, ecx
+0x62,0xf4,0x7c,0x08,0x11,0xca
+
+# ATT:   adcl	%ecx, %edx, %r10d
+# INTEL: adc	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x11,0xca
+
+# ATT:   {evex}	adcl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: adc	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcq	%r9, %r15
+# INTEL: {evex}	adc	r15, r9
+0x62,0x54,0xfc,0x08,0x11,0xcf
+
+# ATT:   adcq	%r9, %r15, %r11
+# INTEL: adc	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x11,0xcf
+
+# ATT:   {evex}	adcq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	adc	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: adc	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	adc	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x12,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcb	291(%r8,%rax,4), %bl, %cl
+# INTEL: adc	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x12,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	adc	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x13,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcw	291(%r8,%rax,4), %dx, %ax
+# INTEL: adc	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x13,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	adc	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: adc	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	adcq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	adc	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   adcq	291(%r8,%rax,4), %r9, %r15
+# INTEL: adc	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/add.txt b/llvm/test/MC/Disassembler/X86/apx/add.txt
new file mode 100644
index 00000000000000..4dcb523b0be716
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/add.txt
@@ -0,0 +1,418 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	addb	$123, %bl
+# INTEL: {evex}	add	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xc3,0x7b
+
+# ATT:   {nf}	addb	$123, %bl
+# INTEL: {nf}	add	bl, 123
+0x62,0xf4,0x7c,0x0c,0x80,0xc3,0x7b
+
+# ATT:   addb	$123, %bl, %cl
+# INTEL: add	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xc3,0x7b
+
+# ATT:   {nf}	addb	$123, %bl, %cl
+# INTEL: {nf}	add	cl, bl, 123
+0x62,0xf4,0x74,0x1c,0x80,0xc3,0x7b
+
+# ATT:   {evex}	addw	$123, %dx
+# INTEL: {evex}	add	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xc2,0x7b
+
+# ATT:   {nf}	addw	$123, %dx
+# INTEL: {nf}	add	dx, 123
+0x62,0xf4,0x7d,0x0c,0x83,0xc2,0x7b
+
+# ATT:   addw	$123, %dx, %ax
+# INTEL: add	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xc2,0x7b
+
+# ATT:   {nf}	addw	$123, %dx, %ax
+# INTEL: {nf}	add	ax, dx, 123
+0x62,0xf4,0x7d,0x1c,0x83,0xc2,0x7b
+
+# ATT:   {evex}	addl	$123, %ecx
+# INTEL: {evex}	add	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xc1,0x7b
+
+# ATT:   {nf}	addl	$123, %ecx
+# INTEL: {nf}	add	ecx, 123
+0x62,0xf4,0x7c,0x0c,0x83,0xc1,0x7b
+
+# ATT:   addl	$123, %ecx, %edx
+# INTEL: add	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xc1,0x7b
+
+# ATT:   {nf}	addl	$123, %ecx, %edx
+# INTEL: {nf}	add	edx, ecx, 123
+0x62,0xf4,0x6c,0x1c,0x83,0xc1,0x7b
+
+# ATT:   {evex}	addq	$123, %r9
+# INTEL: {evex}	add	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xc1,0x7b
+
+# ATT:   {nf}	addq	$123, %r9
+# INTEL: {nf}	add	r9, 123
+0x62,0xd4,0xfc,0x0c,0x83,0xc1,0x7b
+
+# ATT:   addq	$123, %r9, %r15
+# INTEL: add	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xc1,0x7b
+
+# ATT:   {nf}	addq	$123, %r9, %r15
+# INTEL: {nf}	add	r15, r9, 123
+0x62,0xd4,0x84,0x1c,0x83,0xc1,0x7b
+
+# ATT:   {evex}	addb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	add	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addb	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	add	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   addb	$123, 291(%r8,%rax,4), %bl
+# INTEL: add	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addb	$123, 291(%r8,%rax,4), %bl
+# INTEL: {nf}	add	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x1c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	addw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	add	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addw	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	add	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   addw	$123, 291(%r8,%rax,4), %dx
+# INTEL: add	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addw	$123, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	add	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	addl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	add	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addl	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	add	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   addl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: add	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	addq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	add	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addq	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	add	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   addq	$123, 291(%r8,%rax,4), %r9
+# INTEL: add	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	addq	$123, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	addw	$1234, %dx
+# INTEL: {evex}	add	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xc2,0xd2,0x04
+
+# ATT:   {nf}	addw	$1234, %dx
+# INTEL: {nf}	add	dx, 1234
+0x62,0xf4,0x7d,0x0c,0x81,0xc2,0xd2,0x04
+
+# ATT:   addw	$1234, %dx, %ax
+# INTEL: add	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xc2,0xd2,0x04
+
+# ATT:   {nf}	addw	$1234, %dx, %ax
+# INTEL: {nf}	add	ax, dx, 1234
+0x62,0xf4,0x7d,0x1c,0x81,0xc2,0xd2,0x04
+
+# ATT:   {evex}	addw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	add	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	addw	$1234, 291(%r8,%rax,4)
+# INTEL: {nf}	add	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   addw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: add	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	addw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	add	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	addl	$123456, %ecx
+# INTEL: {evex}	add	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addl	$123456, %ecx
+# INTEL: {nf}	add	ecx, 123456
+0x62,0xf4,0x7c,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   addl	$123456, %ecx, %edx
+# INTEL: add	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addl	$123456, %ecx, %edx
+# INTEL: {nf}	add	edx, ecx, 123456
+0x62,0xf4,0x6c,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	addq	$123456, %r9
+# INTEL: {evex}	add	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addq	$123456, %r9
+# INTEL: {nf}	add	r9, 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   addq	$123456, %r9, %r15
+# INTEL: add	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addq	$123456, %r9, %r15
+# INTEL: {nf}	add	r15, r9, 123456
+0x62,0xd4,0x84,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	addl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	add	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addl	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	add	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   addl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	addq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	add	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addq	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	add	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   addq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: add	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	addq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	addb	%bl, %cl
+# INTEL: {evex}	add	cl, bl
+0x62,0xf4,0x7c,0x08,0x00,0xd9
+
+# ATT:   {nf}	addb	%bl, %cl
+# INTEL: {nf}	add	cl, bl
+0x62,0xf4,0x7c,0x0c,0x00,0xd9
+
+# ATT:   addb	%bl, %cl, %r8b
+# INTEL: add	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x00,0xd9
+
+# ATT:   {nf}	addb	%bl, %cl, %r8b
+# INTEL: {nf}	add	r8b, cl, bl
+0x62,0xf4,0x3c,0x1c,0x00,0xd9
+
+# ATT:   {evex}	addb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	add	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x00,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addb	%bl, 291(%r8,%rax,4)
+# INTEL: {nf}	add	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x0c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: add	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x00,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: {nf}	add	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x1c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addw	%dx, %ax
+# INTEL: {evex}	add	ax, dx
+0x62,0xf4,0x7d,0x08,0x01,0xd0
+
+# ATT:   {nf}	addw	%dx, %ax
+# INTEL: {nf}	add	ax, dx
+0x62,0xf4,0x7d,0x0c,0x01,0xd0
+
+# ATT:   addw	%dx, %ax, %r9w
+# INTEL: add	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x01,0xd0
+
+# ATT:   {nf}	addw	%dx, %ax, %r9w
+# INTEL: {nf}	add	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x01,0xd0
+
+# ATT:   {evex}	addw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	add	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x01,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addw	%dx, 291(%r8,%rax,4)
+# INTEL: {nf}	add	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x0c,0x01,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: add	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x01,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: {nf}	add	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x1c,0x01,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addl	%ecx, %edx
+# INTEL: {evex}	add	edx, ecx
+0x62,0xf4,0x7c,0x08,0x01,0xca
+
+# ATT:   {nf}	addl	%ecx, %edx
+# INTEL: {nf}	add	edx, ecx
+0x62,0xf4,0x7c,0x0c,0x01,0xca
+
+# ATT:   addl	%ecx, %edx, %r10d
+# INTEL: add	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x01,0xca
+
+# ATT:   {nf}	addl	%ecx, %edx, %r10d
+# INTEL: {nf}	add	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x01,0xca
+
+# ATT:   {evex}	addl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	add	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addl	%ecx, 291(%r8,%rax,4)
+# INTEL: {nf}	add	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: add	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: {nf}	add	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addq	%r9, %r15
+# INTEL: {evex}	add	r15, r9
+0x62,0x54,0xfc,0x08,0x01,0xcf
+
+# ATT:   {nf}	addq	%r9, %r15
+# INTEL: {nf}	add	r15, r9
+0x62,0x54,0xfc,0x0c,0x01,0xcf
+
+# ATT:   addq	%r9, %r15, %r11
+# INTEL: add	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x01,0xcf
+
+# ATT:   {nf}	addq	%r9, %r15, %r11
+# INTEL: {nf}	add	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x01,0xcf
+
+# ATT:   {evex}	addq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	add	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addq	%r9, 291(%r8,%rax,4)
+# INTEL: {nf}	add	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: add	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: {nf}	add	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	add	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x02,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	add	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addb	291(%r8,%rax,4), %bl, %cl
+# INTEL: add	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x02,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addb	291(%r8,%rax,4), %bl, %cl
+# INTEL: {nf}	add	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	add	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x03,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	add	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0x03,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addw	291(%r8,%rax,4), %dx, %ax
+# INTEL: add	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x03,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addw	291(%r8,%rax,4), %dx, %ax
+# INTEL: {nf}	add	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x1c,0x03,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	add	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: {nf}	add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	addq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	add	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	add	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   addq	291(%r8,%rax,4), %r9, %r15
+# INTEL: add	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	addq	291(%r8,%rax,4), %r9, %r15
+# INTEL: {nf}	add	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/and.txt b/llvm/test/MC/Disassembler/X86/apx/and.txt
new file mode 100644
index 00000000000000..39697516a8e632
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/and.txt
@@ -0,0 +1,418 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	andb	$123, %bl
+# INTEL: {evex}	and	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xe3,0x7b
+
+# ATT:   {nf}	andb	$123, %bl
+# INTEL: {nf}	and	bl, 123
+0x62,0xf4,0x7c,0x0c,0x80,0xe3,0x7b
+
+# ATT:   andb	$123, %bl, %cl
+# INTEL: and	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xe3,0x7b
+
+# ATT:   {nf}	andb	$123, %bl, %cl
+# INTEL: {nf}	and	cl, bl, 123
+0x62,0xf4,0x74,0x1c,0x80,0xe3,0x7b
+
+# ATT:   {evex}	andw	$123, %dx
+# INTEL: {evex}	and	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xe2,0x7b
+
+# ATT:   {nf}	andw	$123, %dx
+# INTEL: {nf}	and	dx, 123
+0x62,0xf4,0x7d,0x0c,0x83,0xe2,0x7b
+
+# ATT:   andw	$123, %dx, %ax
+# INTEL: and	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xe2,0x7b
+
+# ATT:   {nf}	andw	$123, %dx, %ax
+# INTEL: {nf}	and	ax, dx, 123
+0x62,0xf4,0x7d,0x1c,0x83,0xe2,0x7b
+
+# ATT:   {evex}	andl	$123, %ecx
+# INTEL: {evex}	and	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xe1,0x7b
+
+# ATT:   {nf}	andl	$123, %ecx
+# INTEL: {nf}	and	ecx, 123
+0x62,0xf4,0x7c,0x0c,0x83,0xe1,0x7b
+
+# ATT:   andl	$123, %ecx, %edx
+# INTEL: and	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xe1,0x7b
+
+# ATT:   {nf}	andl	$123, %ecx, %edx
+# INTEL: {nf}	and	edx, ecx, 123
+0x62,0xf4,0x6c,0x1c,0x83,0xe1,0x7b
+
+# ATT:   {evex}	andq	$123, %r9
+# INTEL: {evex}	and	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xe1,0x7b
+
+# ATT:   {nf}	andq	$123, %r9
+# INTEL: {nf}	and	r9, 123
+0x62,0xd4,0xfc,0x0c,0x83,0xe1,0x7b
+
+# ATT:   andq	$123, %r9, %r15
+# INTEL: and	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xe1,0x7b
+
+# ATT:   {nf}	andq	$123, %r9, %r15
+# INTEL: {nf}	and	r15, r9, 123
+0x62,0xd4,0x84,0x1c,0x83,0xe1,0x7b
+
+# ATT:   {evex}	andb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	and	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andb	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	and	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   andb	$123, 291(%r8,%rax,4), %bl
+# INTEL: and	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andb	$123, 291(%r8,%rax,4), %bl
+# INTEL: {nf}	and	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x1c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	andw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	and	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andw	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	and	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   andw	$123, 291(%r8,%rax,4), %dx
+# INTEL: and	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andw	$123, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	and	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	andl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	and	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andl	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	and	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   andl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: and	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	andq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	and	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andq	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	and	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   andq	$123, 291(%r8,%rax,4), %r9
+# INTEL: and	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	andq	$123, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	andw	$1234, %dx
+# INTEL: {evex}	and	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xe2,0xd2,0x04
+
+# ATT:   {nf}	andw	$1234, %dx
+# INTEL: {nf}	and	dx, 1234
+0x62,0xf4,0x7d,0x0c,0x81,0xe2,0xd2,0x04
+
+# ATT:   andw	$1234, %dx, %ax
+# INTEL: and	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xe2,0xd2,0x04
+
+# ATT:   {nf}	andw	$1234, %dx, %ax
+# INTEL: {nf}	and	ax, dx, 1234
+0x62,0xf4,0x7d,0x1c,0x81,0xe2,0xd2,0x04
+
+# ATT:   {evex}	andw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	and	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	andw	$1234, 291(%r8,%rax,4)
+# INTEL: {nf}	and	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   andw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: and	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	andw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	and	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	andl	$123456, %ecx
+# INTEL: {evex}	and	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andl	$123456, %ecx
+# INTEL: {nf}	and	ecx, 123456
+0x62,0xf4,0x7c,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   andl	$123456, %ecx, %edx
+# INTEL: and	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andl	$123456, %ecx, %edx
+# INTEL: {nf}	and	edx, ecx, 123456
+0x62,0xf4,0x6c,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	andq	$123456, %r9
+# INTEL: {evex}	and	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andq	$123456, %r9
+# INTEL: {nf}	and	r9, 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   andq	$123456, %r9, %r15
+# INTEL: and	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andq	$123456, %r9, %r15
+# INTEL: {nf}	and	r15, r9, 123456
+0x62,0xd4,0x84,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	andl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	and	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andl	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	and	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   andl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	andq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	and	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andq	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	and	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   andq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: and	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	andq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	andb	%bl, %cl
+# INTEL: {evex}	and	cl, bl
+0x62,0xf4,0x7c,0x08,0x20,0xd9
+
+# ATT:   {nf}	andb	%bl, %cl
+# INTEL: {nf}	and	cl, bl
+0x62,0xf4,0x7c,0x0c,0x20,0xd9
+
+# ATT:   andb	%bl, %cl, %r8b
+# INTEL: and	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x20,0xd9
+
+# ATT:   {nf}	andb	%bl, %cl, %r8b
+# INTEL: {nf}	and	r8b, cl, bl
+0x62,0xf4,0x3c,0x1c,0x20,0xd9
+
+# ATT:   {evex}	andb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	and	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x20,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andb	%bl, 291(%r8,%rax,4)
+# INTEL: {nf}	and	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x0c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: and	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x20,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: {nf}	and	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x1c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andw	%dx, %ax
+# INTEL: {evex}	and	ax, dx
+0x62,0xf4,0x7d,0x08,0x21,0xd0
+
+# ATT:   {nf}	andw	%dx, %ax
+# INTEL: {nf}	and	ax, dx
+0x62,0xf4,0x7d,0x0c,0x21,0xd0
+
+# ATT:   andw	%dx, %ax, %r9w
+# INTEL: and	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x21,0xd0
+
+# ATT:   {nf}	andw	%dx, %ax, %r9w
+# INTEL: {nf}	and	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x21,0xd0
+
+# ATT:   {evex}	andw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	and	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x21,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andw	%dx, 291(%r8,%rax,4)
+# INTEL: {nf}	and	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x0c,0x21,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: and	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x21,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: {nf}	and	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x1c,0x21,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andl	%ecx, %edx
+# INTEL: {evex}	and	edx, ecx
+0x62,0xf4,0x7c,0x08,0x21,0xca
+
+# ATT:   {nf}	andl	%ecx, %edx
+# INTEL: {nf}	and	edx, ecx
+0x62,0xf4,0x7c,0x0c,0x21,0xca
+
+# ATT:   andl	%ecx, %edx, %r10d
+# INTEL: and	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x21,0xca
+
+# ATT:   {nf}	andl	%ecx, %edx, %r10d
+# INTEL: {nf}	and	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x21,0xca
+
+# ATT:   {evex}	andl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	and	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andl	%ecx, 291(%r8,%rax,4)
+# INTEL: {nf}	and	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: and	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: {nf}	and	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andq	%r9, %r15
+# INTEL: {evex}	and	r15, r9
+0x62,0x54,0xfc,0x08,0x21,0xcf
+
+# ATT:   {nf}	andq	%r9, %r15
+# INTEL: {nf}	and	r15, r9
+0x62,0x54,0xfc,0x0c,0x21,0xcf
+
+# ATT:   andq	%r9, %r15, %r11
+# INTEL: and	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x21,0xcf
+
+# ATT:   {nf}	andq	%r9, %r15, %r11
+# INTEL: {nf}	and	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x21,0xcf
+
+# ATT:   {evex}	andq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	and	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andq	%r9, 291(%r8,%rax,4)
+# INTEL: {nf}	and	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: and	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: {nf}	and	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	and	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x22,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	and	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andb	291(%r8,%rax,4), %bl, %cl
+# INTEL: and	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x22,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andb	291(%r8,%rax,4), %bl, %cl
+# INTEL: {nf}	and	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	and	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x23,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	and	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0x23,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andw	291(%r8,%rax,4), %dx, %ax
+# INTEL: and	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x23,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andw	291(%r8,%rax,4), %dx, %ax
+# INTEL: {nf}	and	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x1c,0x23,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	and	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: {nf}	and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	andq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	and	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	and	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   andq	291(%r8,%rax,4), %r9, %r15
+# INTEL: and	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	andq	291(%r8,%rax,4), %r9, %r15
+# INTEL: {nf}	and	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/or.txt b/llvm/test/MC/Disassembler/X86/apx/or.txt
new file mode 100644
index 00000000000000..53225c0659e88d
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/or.txt
@@ -0,0 +1,418 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	orb	$123, %bl
+# INTEL: {evex}	or	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xcb,0x7b
+
+# ATT:   {nf}	orb	$123, %bl
+# INTEL: {nf}	or	bl, 123
+0x62,0xf4,0x7c,0x0c,0x80,0xcb,0x7b
+
+# ATT:   orb	$123, %bl, %cl
+# INTEL: or	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xcb,0x7b
+
+# ATT:   {nf}	orb	$123, %bl, %cl
+# INTEL: {nf}	or	cl, bl, 123
+0x62,0xf4,0x74,0x1c,0x80,0xcb,0x7b
+
+# ATT:   {evex}	orw	$123, %dx
+# INTEL: {evex}	or	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xca,0x7b
+
+# ATT:   {nf}	orw	$123, %dx
+# INTEL: {nf}	or	dx, 123
+0x62,0xf4,0x7d,0x0c,0x83,0xca,0x7b
+
+# ATT:   orw	$123, %dx, %ax
+# INTEL: or	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xca,0x7b
+
+# ATT:   {nf}	orw	$123, %dx, %ax
+# INTEL: {nf}	or	ax, dx, 123
+0x62,0xf4,0x7d,0x1c,0x83,0xca,0x7b
+
+# ATT:   {evex}	orl	$123, %ecx
+# INTEL: {evex}	or	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xc9,0x7b
+
+# ATT:   {nf}	orl	$123, %ecx
+# INTEL: {nf}	or	ecx, 123
+0x62,0xf4,0x7c,0x0c,0x83,0xc9,0x7b
+
+# ATT:   orl	$123, %ecx, %edx
+# INTEL: or	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xc9,0x7b
+
+# ATT:   {nf}	orl	$123, %ecx, %edx
+# INTEL: {nf}	or	edx, ecx, 123
+0x62,0xf4,0x6c,0x1c,0x83,0xc9,0x7b
+
+# ATT:   {evex}	orq	$123, %r9
+# INTEL: {evex}	or	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xc9,0x7b
+
+# ATT:   {nf}	orq	$123, %r9
+# INTEL: {nf}	or	r9, 123
+0x62,0xd4,0xfc,0x0c,0x83,0xc9,0x7b
+
+# ATT:   orq	$123, %r9, %r15
+# INTEL: or	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xc9,0x7b
+
+# ATT:   {nf}	orq	$123, %r9, %r15
+# INTEL: {nf}	or	r15, r9, 123
+0x62,0xd4,0x84,0x1c,0x83,0xc9,0x7b
+
+# ATT:   {evex}	orb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	or	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orb	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	or	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   orb	$123, 291(%r8,%rax,4), %bl
+# INTEL: or	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orb	$123, 291(%r8,%rax,4), %bl
+# INTEL: {nf}	or	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x1c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	orw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	or	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orw	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	or	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   orw	$123, 291(%r8,%rax,4), %dx
+# INTEL: or	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orw	$123, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	or	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	orl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	or	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orl	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	or	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   orl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: or	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	orq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	or	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orq	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	or	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   orq	$123, 291(%r8,%rax,4), %r9
+# INTEL: or	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	orq	$123, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	orw	$1234, %dx
+# INTEL: {evex}	or	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xca,0xd2,0x04
+
+# ATT:   {nf}	orw	$1234, %dx
+# INTEL: {nf}	or	dx, 1234
+0x62,0xf4,0x7d,0x0c,0x81,0xca,0xd2,0x04
+
+# ATT:   orw	$1234, %dx, %ax
+# INTEL: or	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xca,0xd2,0x04
+
+# ATT:   {nf}	orw	$1234, %dx, %ax
+# INTEL: {nf}	or	ax, dx, 1234
+0x62,0xf4,0x7d,0x1c,0x81,0xca,0xd2,0x04
+
+# ATT:   {evex}	orw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	or	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	orw	$1234, 291(%r8,%rax,4)
+# INTEL: {nf}	or	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   orw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: or	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	orw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	or	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	orl	$123456, %ecx
+# INTEL: {evex}	or	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orl	$123456, %ecx
+# INTEL: {nf}	or	ecx, 123456
+0x62,0xf4,0x7c,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   orl	$123456, %ecx, %edx
+# INTEL: or	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orl	$123456, %ecx, %edx
+# INTEL: {nf}	or	edx, ecx, 123456
+0x62,0xf4,0x6c,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	orq	$123456, %r9
+# INTEL: {evex}	or	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orq	$123456, %r9
+# INTEL: {nf}	or	r9, 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   orq	$123456, %r9, %r15
+# INTEL: or	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orq	$123456, %r9, %r15
+# INTEL: {nf}	or	r15, r9, 123456
+0x62,0xd4,0x84,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	orl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	or	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orl	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	or	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   orl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	orq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	or	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orq	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	or	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   orq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: or	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	orq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	orb	%bl, %cl
+# INTEL: {evex}	or	cl, bl
+0x62,0xf4,0x7c,0x08,0x08,0xd9
+
+# ATT:   {nf}	orb	%bl, %cl
+# INTEL: {nf}	or	cl, bl
+0x62,0xf4,0x7c,0x0c,0x08,0xd9
+
+# ATT:   orb	%bl, %cl, %r8b
+# INTEL: or	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x08,0xd9
+
+# ATT:   {nf}	orb	%bl, %cl, %r8b
+# INTEL: {nf}	or	r8b, cl, bl
+0x62,0xf4,0x3c,0x1c,0x08,0xd9
+
+# ATT:   {evex}	orb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	or	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x08,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orb	%bl, 291(%r8,%rax,4)
+# INTEL: {nf}	or	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x0c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: or	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x08,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: {nf}	or	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x1c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orw	%dx, %ax
+# INTEL: {evex}	or	ax, dx
+0x62,0xf4,0x7d,0x08,0x09,0xd0
+
+# ATT:   {nf}	orw	%dx, %ax
+# INTEL: {nf}	or	ax, dx
+0x62,0xf4,0x7d,0x0c,0x09,0xd0
+
+# ATT:   orw	%dx, %ax, %r9w
+# INTEL: or	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x09,0xd0
+
+# ATT:   {nf}	orw	%dx, %ax, %r9w
+# INTEL: {nf}	or	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x09,0xd0
+
+# ATT:   {evex}	orw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	or	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x09,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orw	%dx, 291(%r8,%rax,4)
+# INTEL: {nf}	or	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x0c,0x09,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: or	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x09,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: {nf}	or	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x1c,0x09,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orl	%ecx, %edx
+# INTEL: {evex}	or	edx, ecx
+0x62,0xf4,0x7c,0x08,0x09,0xca
+
+# ATT:   {nf}	orl	%ecx, %edx
+# INTEL: {nf}	or	edx, ecx
+0x62,0xf4,0x7c,0x0c,0x09,0xca
+
+# ATT:   orl	%ecx, %edx, %r10d
+# INTEL: or	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x09,0xca
+
+# ATT:   {nf}	orl	%ecx, %edx, %r10d
+# INTEL: {nf}	or	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x09,0xca
+
+# ATT:   {evex}	orl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	or	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orl	%ecx, 291(%r8,%rax,4)
+# INTEL: {nf}	or	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: or	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: {nf}	or	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orq	%r9, %r15
+# INTEL: {evex}	or	r15, r9
+0x62,0x54,0xfc,0x08,0x09,0xcf
+
+# ATT:   {nf}	orq	%r9, %r15
+# INTEL: {nf}	or	r15, r9
+0x62,0x54,0xfc,0x0c,0x09,0xcf
+
+# ATT:   orq	%r9, %r15, %r11
+# INTEL: or	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x09,0xcf
+
+# ATT:   {nf}	orq	%r9, %r15, %r11
+# INTEL: {nf}	or	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x09,0xcf
+
+# ATT:   {evex}	orq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	or	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orq	%r9, 291(%r8,%rax,4)
+# INTEL: {nf}	or	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: or	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: {nf}	or	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	or	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	or	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orb	291(%r8,%rax,4), %bl, %cl
+# INTEL: or	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orb	291(%r8,%rax,4), %bl, %cl
+# INTEL: {nf}	or	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	or	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x0b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	or	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orw	291(%r8,%rax,4), %dx, %ax
+# INTEL: or	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x0b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orw	291(%r8,%rax,4), %dx, %ax
+# INTEL: {nf}	or	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x1c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	or	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: {nf}	or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	orq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	or	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	or	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   orq	291(%r8,%rax,4), %r9, %r15
+# INTEL: or	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	orq	291(%r8,%rax,4), %r9, %r15
+# INTEL: {nf}	or	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/sbb.txt b/llvm/test/MC/Disassembler/X86/apx/sbb.txt
new file mode 100644
index 00000000000000..c707d519326cd0
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/sbb.txt
@@ -0,0 +1,210 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	sbbb	$123, %bl
+# INTEL: {evex}	sbb	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xdb,0x7b
+
+# ATT:   sbbb	$123, %bl, %cl
+# INTEL: sbb	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xdb,0x7b
+
+# ATT:   {evex}	sbbw	$123, %dx
+# INTEL: {evex}	sbb	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xda,0x7b
+
+# ATT:   sbbw	$123, %dx, %ax
+# INTEL: sbb	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xda,0x7b
+
+# ATT:   {evex}	sbbl	$123, %ecx
+# INTEL: {evex}	sbb	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xd9,0x7b
+
+# ATT:   sbbl	$123, %ecx, %edx
+# INTEL: sbb	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xd9,0x7b
+
+# ATT:   {evex}	sbbq	$123, %r9
+# INTEL: {evex}	sbb	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xd9,0x7b
+
+# ATT:   sbbq	$123, %r9, %r15
+# INTEL: sbb	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xd9,0x7b
+
+# ATT:   {evex}	sbbb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   sbbb	$123, 291(%r8,%rax,4), %bl
+# INTEL: sbb	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	sbbw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   sbbw	$123, 291(%r8,%rax,4), %dx
+# INTEL: sbb	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	sbbl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   sbbl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: sbb	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	sbbq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   sbbq	$123, 291(%r8,%rax,4), %r9
+# INTEL: sbb	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	sbbw	$1234, %dx
+# INTEL: {evex}	sbb	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xda,0xd2,0x04
+
+# ATT:   sbbw	$1234, %dx, %ax
+# INTEL: sbb	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xda,0xd2,0x04
+
+# ATT:   {evex}	sbbw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   sbbw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: sbb	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	sbbl	$123456, %ecx
+# INTEL: {evex}	sbb	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00
+
+# ATT:   sbbl	$123456, %ecx, %edx
+# INTEL: sbb	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	sbbq	$123456, %r9
+# INTEL: {evex}	sbb	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00
+
+# ATT:   sbbq	$123456, %r9, %r15
+# INTEL: sbb	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	sbbl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   sbbl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: sbb	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	sbbq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   sbbq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: sbb	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	sbbb	%bl, %cl
+# INTEL: {evex}	sbb	cl, bl
+0x62,0xf4,0x7c,0x08,0x18,0xd9
+
+# ATT:   sbbb	%bl, %cl, %r8b
+# INTEL: sbb	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x18,0xd9
+
+# ATT:   {evex}	sbbb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x18,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: sbb	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x18,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbw	%dx, %ax
+# INTEL: {evex}	sbb	ax, dx
+0x62,0xf4,0x7d,0x08,0x19,0xd0
+
+# ATT:   sbbw	%dx, %ax, %r9w
+# INTEL: sbb	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x19,0xd0
+
+# ATT:   {evex}	sbbw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x19,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: sbb	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x19,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbl	%ecx, %edx
+# INTEL: {evex}	sbb	edx, ecx
+0x62,0xf4,0x7c,0x08,0x19,0xca
+
+# ATT:   sbbl	%ecx, %edx, %r10d
+# INTEL: sbb	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x19,0xca
+
+# ATT:   {evex}	sbbl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: sbb	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbq	%r9, %r15
+# INTEL: {evex}	sbb	r15, r9
+0x62,0x54,0xfc,0x08,0x19,0xcf
+
+# ATT:   sbbq	%r9, %r15, %r11
+# INTEL: sbb	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x19,0xcf
+
+# ATT:   {evex}	sbbq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	sbb	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: sbb	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	sbb	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbb	291(%r8,%rax,4), %bl, %cl
+# INTEL: sbb	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	sbb	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x1b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbw	291(%r8,%rax,4), %dx, %ax
+# INTEL: sbb	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x1b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	sbb	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: sbb	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	sbbq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	sbb	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   sbbq	291(%r8,%rax,4), %r9, %r15
+# INTEL: sbb	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/sub.txt b/llvm/test/MC/Disassembler/X86/apx/sub.txt
new file mode 100644
index 00000000000000..d5ec87d376fd07
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/sub.txt
@@ -0,0 +1,418 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	subb	$123, %bl
+# INTEL: {evex}	sub	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xeb,0x7b
+
+# ATT:   {nf}	subb	$123, %bl
+# INTEL: {nf}	sub	bl, 123
+0x62,0xf4,0x7c,0x0c,0x80,0xeb,0x7b
+
+# ATT:   subb	$123, %bl, %cl
+# INTEL: sub	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xeb,0x7b
+
+# ATT:   {nf}	subb	$123, %bl, %cl
+# INTEL: {nf}	sub	cl, bl, 123
+0x62,0xf4,0x74,0x1c,0x80,0xeb,0x7b
+
+# ATT:   {evex}	subw	$123, %dx
+# INTEL: {evex}	sub	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xea,0x7b
+
+# ATT:   {nf}	subw	$123, %dx
+# INTEL: {nf}	sub	dx, 123
+0x62,0xf4,0x7d,0x0c,0x83,0xea,0x7b
+
+# ATT:   subw	$123, %dx, %ax
+# INTEL: sub	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xea,0x7b
+
+# ATT:   {nf}	subw	$123, %dx, %ax
+# INTEL: {nf}	sub	ax, dx, 123
+0x62,0xf4,0x7d,0x1c,0x83,0xea,0x7b
+
+# ATT:   {evex}	subl	$123, %ecx
+# INTEL: {evex}	sub	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xe9,0x7b
+
+# ATT:   {nf}	subl	$123, %ecx
+# INTEL: {nf}	sub	ecx, 123
+0x62,0xf4,0x7c,0x0c,0x83,0xe9,0x7b
+
+# ATT:   subl	$123, %ecx, %edx
+# INTEL: sub	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xe9,0x7b
+
+# ATT:   {nf}	subl	$123, %ecx, %edx
+# INTEL: {nf}	sub	edx, ecx, 123
+0x62,0xf4,0x6c,0x1c,0x83,0xe9,0x7b
+
+# ATT:   {evex}	subq	$123, %r9
+# INTEL: {evex}	sub	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xe9,0x7b
+
+# ATT:   {nf}	subq	$123, %r9
+# INTEL: {nf}	sub	r9, 123
+0x62,0xd4,0xfc,0x0c,0x83,0xe9,0x7b
+
+# ATT:   subq	$123, %r9, %r15
+# INTEL: sub	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xe9,0x7b
+
+# ATT:   {nf}	subq	$123, %r9, %r15
+# INTEL: {nf}	sub	r15, r9, 123
+0x62,0xd4,0x84,0x1c,0x83,0xe9,0x7b
+
+# ATT:   {evex}	subb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subb	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   subb	$123, 291(%r8,%rax,4), %bl
+# INTEL: sub	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subb	$123, 291(%r8,%rax,4), %bl
+# INTEL: {nf}	sub	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x1c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	subw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subw	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   subw	$123, 291(%r8,%rax,4), %dx
+# INTEL: sub	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subw	$123, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	subl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subl	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   subl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	subq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subq	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   subq	$123, 291(%r8,%rax,4), %r9
+# INTEL: sub	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	subq	$123, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	subw	$1234, %dx
+# INTEL: {evex}	sub	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xea,0xd2,0x04
+
+# ATT:   {nf}	subw	$1234, %dx
+# INTEL: {nf}	sub	dx, 1234
+0x62,0xf4,0x7d,0x0c,0x81,0xea,0xd2,0x04
+
+# ATT:   subw	$1234, %dx, %ax
+# INTEL: sub	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xea,0xd2,0x04
+
+# ATT:   {nf}	subw	$1234, %dx, %ax
+# INTEL: {nf}	sub	ax, dx, 1234
+0x62,0xf4,0x7d,0x1c,0x81,0xea,0xd2,0x04
+
+# ATT:   {evex}	subw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	subw	$1234, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   subw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: sub	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	subw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	subl	$123456, %ecx
+# INTEL: {evex}	sub	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subl	$123456, %ecx
+# INTEL: {nf}	sub	ecx, 123456
+0x62,0xf4,0x7c,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   subl	$123456, %ecx, %edx
+# INTEL: sub	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subl	$123456, %ecx, %edx
+# INTEL: {nf}	sub	edx, ecx, 123456
+0x62,0xf4,0x6c,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	subq	$123456, %r9
+# INTEL: {evex}	sub	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subq	$123456, %r9
+# INTEL: {nf}	sub	r9, 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   subq	$123456, %r9, %r15
+# INTEL: sub	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subq	$123456, %r9, %r15
+# INTEL: {nf}	sub	r15, r9, 123456
+0x62,0xd4,0x84,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	subl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subl	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   subl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	subq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subq	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   subq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	subq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	subb	%bl, %cl
+# INTEL: {evex}	sub	cl, bl
+0x62,0xf4,0x7c,0x08,0x28,0xd9
+
+# ATT:   {nf}	subb	%bl, %cl
+# INTEL: {nf}	sub	cl, bl
+0x62,0xf4,0x7c,0x0c,0x28,0xd9
+
+# ATT:   subb	%bl, %cl, %r8b
+# INTEL: sub	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x28,0xd9
+
+# ATT:   {nf}	subb	%bl, %cl, %r8b
+# INTEL: {nf}	sub	r8b, cl, bl
+0x62,0xf4,0x3c,0x1c,0x28,0xd9
+
+# ATT:   {evex}	subb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x28,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subb	%bl, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x0c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: sub	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x28,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: {nf}	sub	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x1c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subw	%dx, %ax
+# INTEL: {evex}	sub	ax, dx
+0x62,0xf4,0x7d,0x08,0x29,0xd0
+
+# ATT:   {nf}	subw	%dx, %ax
+# INTEL: {nf}	sub	ax, dx
+0x62,0xf4,0x7d,0x0c,0x29,0xd0
+
+# ATT:   subw	%dx, %ax, %r9w
+# INTEL: sub	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x29,0xd0
+
+# ATT:   {nf}	subw	%dx, %ax, %r9w
+# INTEL: {nf}	sub	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x29,0xd0
+
+# ATT:   {evex}	subw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x29,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subw	%dx, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x0c,0x29,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: sub	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x29,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: {nf}	sub	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x1c,0x29,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subl	%ecx, %edx
+# INTEL: {evex}	sub	edx, ecx
+0x62,0xf4,0x7c,0x08,0x29,0xca
+
+# ATT:   {nf}	subl	%ecx, %edx
+# INTEL: {nf}	sub	edx, ecx
+0x62,0xf4,0x7c,0x0c,0x29,0xca
+
+# ATT:   subl	%ecx, %edx, %r10d
+# INTEL: sub	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x29,0xca
+
+# ATT:   {nf}	subl	%ecx, %edx, %r10d
+# INTEL: {nf}	sub	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x29,0xca
+
+# ATT:   {evex}	subl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subl	%ecx, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: {nf}	sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subq	%r9, %r15
+# INTEL: {evex}	sub	r15, r9
+0x62,0x54,0xfc,0x08,0x29,0xcf
+
+# ATT:   {nf}	subq	%r9, %r15
+# INTEL: {nf}	sub	r15, r9
+0x62,0x54,0xfc,0x0c,0x29,0xcf
+
+# ATT:   subq	%r9, %r15, %r11
+# INTEL: sub	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x29,0xcf
+
+# ATT:   {nf}	subq	%r9, %r15, %r11
+# INTEL: {nf}	sub	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x29,0xcf
+
+# ATT:   {evex}	subq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	sub	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subq	%r9, 291(%r8,%rax,4)
+# INTEL: {nf}	sub	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: sub	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: {nf}	sub	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	sub	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	sub	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subb	291(%r8,%rax,4), %bl, %cl
+# INTEL: sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subb	291(%r8,%rax,4), %bl, %cl
+# INTEL: {nf}	sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	sub	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x2b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	sub	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subw	291(%r8,%rax,4), %dx, %ax
+# INTEL: sub	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x2b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subw	291(%r8,%rax,4), %dx, %ax
+# INTEL: {nf}	sub	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x1c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: {nf}	sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	subq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	sub	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   subq	291(%r8,%rax,4), %r9, %r15
+# INTEL: sub	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	subq	291(%r8,%rax,4), %r9, %r15
+# INTEL: {nf}	sub	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/xor.txt b/llvm/test/MC/Disassembler/X86/apx/xor.txt
new file mode 100644
index 00000000000000..69c52989c13f3b
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/xor.txt
@@ -0,0 +1,418 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	xorb	$123, %bl
+# INTEL: {evex}	xor	bl, 123
+0x62,0xf4,0x7c,0x08,0x80,0xf3,0x7b
+
+# ATT:   {nf}	xorb	$123, %bl
+# INTEL: {nf}	xor	bl, 123
+0x62,0xf4,0x7c,0x0c,0x80,0xf3,0x7b
+
+# ATT:   xorb	$123, %bl, %cl
+# INTEL: xor	cl, bl, 123
+0x62,0xf4,0x74,0x18,0x80,0xf3,0x7b
+
+# ATT:   {nf}	xorb	$123, %bl, %cl
+# INTEL: {nf}	xor	cl, bl, 123
+0x62,0xf4,0x74,0x1c,0x80,0xf3,0x7b
+
+# ATT:   {evex}	xorw	$123, %dx
+# INTEL: {evex}	xor	dx, 123
+0x62,0xf4,0x7d,0x08,0x83,0xf2,0x7b
+
+# ATT:   {nf}	xorw	$123, %dx
+# INTEL: {nf}	xor	dx, 123
+0x62,0xf4,0x7d,0x0c,0x83,0xf2,0x7b
+
+# ATT:   xorw	$123, %dx, %ax
+# INTEL: xor	ax, dx, 123
+0x62,0xf4,0x7d,0x18,0x83,0xf2,0x7b
+
+# ATT:   {nf}	xorw	$123, %dx, %ax
+# INTEL: {nf}	xor	ax, dx, 123
+0x62,0xf4,0x7d,0x1c,0x83,0xf2,0x7b
+
+# ATT:   {evex}	xorl	$123, %ecx
+# INTEL: {evex}	xor	ecx, 123
+0x62,0xf4,0x7c,0x08,0x83,0xf1,0x7b
+
+# ATT:   {nf}	xorl	$123, %ecx
+# INTEL: {nf}	xor	ecx, 123
+0x62,0xf4,0x7c,0x0c,0x83,0xf1,0x7b
+
+# ATT:   xorl	$123, %ecx, %edx
+# INTEL: xor	edx, ecx, 123
+0x62,0xf4,0x6c,0x18,0x83,0xf1,0x7b
+
+# ATT:   {nf}	xorl	$123, %ecx, %edx
+# INTEL: {nf}	xor	edx, ecx, 123
+0x62,0xf4,0x6c,0x1c,0x83,0xf1,0x7b
+
+# ATT:   {evex}	xorq	$123, %r9
+# INTEL: {evex}	xor	r9, 123
+0x62,0xd4,0xfc,0x08,0x83,0xf1,0x7b
+
+# ATT:   {nf}	xorq	$123, %r9
+# INTEL: {nf}	xor	r9, 123
+0x62,0xd4,0xfc,0x0c,0x83,0xf1,0x7b
+
+# ATT:   xorq	$123, %r9, %r15
+# INTEL: xor	r15, r9, 123
+0x62,0xd4,0x84,0x18,0x83,0xf1,0x7b
+
+# ATT:   {nf}	xorq	$123, %r9, %r15
+# INTEL: {nf}	xor	r15, r9, 123
+0x62,0xd4,0x84,0x1c,0x83,0xf1,0x7b
+
+# ATT:   {evex}	xorb	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorb	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   xorb	$123, 291(%r8,%rax,4), %bl
+# INTEL: xor	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x18,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorb	$123, 291(%r8,%rax,4), %bl
+# INTEL: {nf}	xor	bl, byte ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x64,0x1c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	xorw	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorw	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7d,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   xorw	$123, 291(%r8,%rax,4), %dx
+# INTEL: xor	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorw	$123, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x6d,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	xorl	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorl	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x7c,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   xorl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorl	$123, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0x74,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	xorq	$123, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorq	$123, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xfc,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   xorq	$123, 291(%r8,%rax,4), %r9
+# INTEL: xor	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {nf}	xorq	$123, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123
+0x62,0xd4,0xb4,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
+
+# ATT:   {evex}	xorw	$1234, %dx
+# INTEL: {evex}	xor	dx, 1234
+0x62,0xf4,0x7d,0x08,0x81,0xf2,0xd2,0x04
+
+# ATT:   {nf}	xorw	$1234, %dx
+# INTEL: {nf}	xor	dx, 1234
+0x62,0xf4,0x7d,0x0c,0x81,0xf2,0xd2,0x04
+
+# ATT:   xorw	$1234, %dx, %ax
+# INTEL: xor	ax, dx, 1234
+0x62,0xf4,0x7d,0x18,0x81,0xf2,0xd2,0x04
+
+# ATT:   {nf}	xorw	$1234, %dx, %ax
+# INTEL: {nf}	xor	ax, dx, 1234
+0x62,0xf4,0x7d,0x1c,0x81,0xf2,0xd2,0x04
+
+# ATT:   {evex}	xorw	$1234, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	xorw	$1234, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x7d,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   xorw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: xor	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {nf}	xorw	$1234, 291(%r8,%rax,4), %dx
+# INTEL: {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 1234
+0x62,0xd4,0x6d,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04
+
+# ATT:   {evex}	xorl	$123456, %ecx
+# INTEL: {evex}	xor	ecx, 123456
+0x62,0xf4,0x7c,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorl	$123456, %ecx
+# INTEL: {nf}	xor	ecx, 123456
+0x62,0xf4,0x7c,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   xorl	$123456, %ecx, %edx
+# INTEL: xor	edx, ecx, 123456
+0x62,0xf4,0x6c,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorl	$123456, %ecx, %edx
+# INTEL: {nf}	xor	edx, ecx, 123456
+0x62,0xf4,0x6c,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	xorq	$123456, %r9
+# INTEL: {evex}	xor	r9, 123456
+0x62,0xd4,0xfc,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorq	$123456, %r9
+# INTEL: {nf}	xor	r9, 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   xorq	$123456, %r9, %r15
+# INTEL: xor	r15, r9, 123456
+0x62,0xd4,0x84,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorq	$123456, %r9, %r15
+# INTEL: {nf}	xor	r15, r9, 123456
+0x62,0xd4,0x84,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	xorl	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorl	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x7c,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   xorl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorl	$123456, 291(%r8,%rax,4), %ecx
+# INTEL: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0x74,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	xorq	$123456, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorq	$123456, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xfc,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   xorq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {nf}	xorq	$123456, 291(%r8,%rax,4), %r9
+# INTEL: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+0x62,0xd4,0xb4,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00
+
+# ATT:   {evex}	xorb	%bl, %cl
+# INTEL: {evex}	xor	cl, bl
+0x62,0xf4,0x7c,0x08,0x30,0xd9
+
+# ATT:   {nf}	xorb	%bl, %cl
+# INTEL: {nf}	xor	cl, bl
+0x62,0xf4,0x7c,0x0c,0x30,0xd9
+
+# ATT:   xorb	%bl, %cl, %r8b
+# INTEL: xor	r8b, cl, bl
+0x62,0xf4,0x3c,0x18,0x30,0xd9
+
+# ATT:   {nf}	xorb	%bl, %cl, %r8b
+# INTEL: {nf}	xor	r8b, cl, bl
+0x62,0xf4,0x3c,0x1c,0x30,0xd9
+
+# ATT:   {evex}	xorb	%bl, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x08,0x30,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorb	%bl, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x7c,0x0c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: xor	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x18,0x30,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorb	%bl, 291(%r8,%rax,4), %cl
+# INTEL: {nf}	xor	cl, byte ptr [r8 + 4*rax + 291], bl
+0x62,0xd4,0x74,0x1c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorw	%dx, %ax
+# INTEL: {evex}	xor	ax, dx
+0x62,0xf4,0x7d,0x08,0x31,0xd0
+
+# ATT:   {nf}	xorw	%dx, %ax
+# INTEL: {nf}	xor	ax, dx
+0x62,0xf4,0x7d,0x0c,0x31,0xd0
+
+# ATT:   xorw	%dx, %ax, %r9w
+# INTEL: xor	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x31,0xd0
+
+# ATT:   {nf}	xorw	%dx, %ax, %r9w
+# INTEL: {nf}	xor	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x31,0xd0
+
+# ATT:   {evex}	xorw	%dx, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x08,0x31,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorw	%dx, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x0c,0x31,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: xor	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x18,0x31,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorw	%dx, 291(%r8,%rax,4), %ax
+# INTEL: {nf}	xor	ax, word ptr [r8 + 4*rax + 291], dx
+0x62,0xd4,0x7d,0x1c,0x31,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorl	%ecx, %edx
+# INTEL: {evex}	xor	edx, ecx
+0x62,0xf4,0x7c,0x08,0x31,0xca
+
+# ATT:   {nf}	xorl	%ecx, %edx
+# INTEL: {nf}	xor	edx, ecx
+0x62,0xf4,0x7c,0x0c,0x31,0xca
+
+# ATT:   xorl	%ecx, %edx, %r10d
+# INTEL: xor	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x31,0xca
+
+# ATT:   {nf}	xorl	%ecx, %edx, %r10d
+# INTEL: {nf}	xor	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x31,0xca
+
+# ATT:   {evex}	xorl	%ecx, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorl	%ecx, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x7c,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorl	%ecx, 291(%r8,%rax,4), %edx
+# INTEL: {nf}	xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+0x62,0xd4,0x6c,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorq	%r9, %r15
+# INTEL: {evex}	xor	r15, r9
+0x62,0x54,0xfc,0x08,0x31,0xcf
+
+# ATT:   {nf}	xorq	%r9, %r15
+# INTEL: {nf}	xor	r15, r9
+0x62,0x54,0xfc,0x0c,0x31,0xcf
+
+# ATT:   xorq	%r9, %r15, %r11
+# INTEL: xor	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x31,0xcf
+
+# ATT:   {nf}	xorq	%r9, %r15, %r11
+# INTEL: {nf}	xor	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x31,0xcf
+
+# ATT:   {evex}	xorq	%r9, 291(%r8,%rax,4)
+# INTEL: {evex}	xor	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorq	%r9, 291(%r8,%rax,4)
+# INTEL: {nf}	xor	qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0xfc,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: xor	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorq	%r9, 291(%r8,%rax,4), %r15
+# INTEL: {nf}	xor	r15, qword ptr [r8 + 4*rax + 291], r9
+0x62,0x54,0x84,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorb	291(%r8,%rax,4), %bl
+# INTEL: {evex}	xor	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x32,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	xor	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorb	291(%r8,%rax,4), %bl, %cl
+# INTEL: xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0x32,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorb	291(%r8,%rax,4), %bl, %cl
+# INTEL: {nf}	xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorw	291(%r8,%rax,4), %dx
+# INTEL: {evex}	xor	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0x33,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	xor	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0x33,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorw	291(%r8,%rax,4), %dx, %ax
+# INTEL: xor	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x18,0x33,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorw	291(%r8,%rax,4), %dx, %ax
+# INTEL: {nf}	xor	ax, dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x1c,0x33,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorl	291(%r8,%rax,4), %ecx
+# INTEL: {evex}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorl	291(%r8,%rax,4), %ecx, %edx
+# INTEL: {nf}	xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6c,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	xorq	291(%r8,%rax,4), %r9
+# INTEL: {evex}	xor	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0xfc,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   xorq	291(%r8,%rax,4), %r9, %r15
+# INTEL: xor	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	xorq	291(%r8,%rax,4), %r9, %r15
+# INTEL: {nf}	xor	r15, r9, qword ptr [r8 + 4*rax + 291]
+0x62,0x54,0x84,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/X86/apx/adc-att.s b/llvm/test/MC/X86/apx/adc-att.s
new file mode 100644
index 00000000000000..e4862161d1f3d6
--- /dev/null
+++ b/llvm/test/MC/X86/apx/adc-att.s
@@ -0,0 +1,161 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-52: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	adcb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xd3,0x7b]
+         {evex}	adcb	$123, %bl
+# CHECK: adcb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xd3,0x7b]
+         adcb	$123, %bl, %cl
+# CHECK: {evex}	adcw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xd2,0x7b]
+         {evex}	adcw	$123, %dx
+# CHECK: adcw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd2,0x7b]
+         adcw	$123, %dx, %ax
+# CHECK: {evex}	adcl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xd1,0x7b]
+         {evex}	adcl	$123, %ecx
+# CHECK: adcl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xd1,0x7b]
+         adcl	$123, %ecx, %edx
+# CHECK: {evex}	adcq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xd1,0x7b]
+         {evex}	adcq	$123, %r9
+# CHECK: adcq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xd1,0x7b]
+         adcq	$123, %r9, %r15
+# CHECK: {evex}	adcb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adcb	$123, 291(%r8,%rax,4)
+# CHECK: adcb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adcb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	adcw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adcw	$123, 291(%r8,%rax,4)
+# CHECK: adcw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adcw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	adcl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adcl	$123, 291(%r8,%rax,4)
+# CHECK: adcl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adcl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	adcq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adcq	$123, 291(%r8,%rax,4)
+# CHECK: adcq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adcq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	adcw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xd2,0xd2,0x04]
+         {evex}	adcw	$1234, %dx
+# CHECK: adcw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd2,0xd2,0x04]
+         adcw	$1234, %dx, %ax
+# CHECK: {evex}	adcw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	adcw	$1234, 291(%r8,%rax,4)
+# CHECK: adcw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         adcw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	adcl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         {evex}	adcl	$123456, %ecx
+# CHECK: adcl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         adcl	$123456, %ecx, %edx
+# CHECK: {evex}	adcq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         {evex}	adcq	$123456, %r9
+# CHECK: adcq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         adcq	$123456, %r9, %r15
+# CHECK: {evex}	adcl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	adcl	$123456, 291(%r8,%rax,4)
+# CHECK: adcl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         adcl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	adcq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	adcq	$123456, 291(%r8,%rax,4)
+# CHECK: adcq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         adcq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	adcb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x10,0xd9]
+         {evex}	adcb	%bl, %cl
+# CHECK: adcb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x10,0xd9]
+         adcb	%bl, %cl, %r8b
+# CHECK: {evex}	adcb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x10,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcb	%bl, 291(%r8,%rax,4)
+# CHECK: adcb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x10,0x9c,0x80,0x23,0x01,0x00,0x00]
+         adcb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	adcw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x11,0xd0]
+         {evex}	adcw	%dx, %ax
+# CHECK: adcw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x11,0xd0]
+         adcw	%dx, %ax, %r9w
+# CHECK: {evex}	adcw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x11,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcw	%dx, 291(%r8,%rax,4)
+# CHECK: adcw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x11,0x94,0x80,0x23,0x01,0x00,0x00]
+         adcw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	adcl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x11,0xca]
+         {evex}	adcl	%ecx, %edx
+# CHECK: adcl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x11,0xca]
+         adcl	%ecx, %edx, %r10d
+# CHECK: {evex}	adcl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcl	%ecx, 291(%r8,%rax,4)
+# CHECK: adcl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adcl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	adcq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x11,0xcf]
+         {evex}	adcq	%r9, %r15
+# CHECK: adcq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x11,0xcf]
+         adcq	%r9, %r15, %r11
+# CHECK: {evex}	adcq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcq	%r9, 291(%r8,%rax,4)
+# CHECK: adcq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adcq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	adcb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x12,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcb	291(%r8,%rax,4), %bl
+# CHECK: adcb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x12,0x9c,0x80,0x23,0x01,0x00,0x00]
+         adcb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	adcw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x13,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcw	291(%r8,%rax,4), %dx
+# CHECK: adcw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x13,0x94,0x80,0x23,0x01,0x00,0x00]
+         adcw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	adcl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcl	291(%r8,%rax,4), %ecx
+# CHECK: adcl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adcl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	adcq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adcq	291(%r8,%rax,4), %r9
+# CHECK: adcq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adcq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/adc-intel.s b/llvm/test/MC/X86/apx/adc-intel.s
new file mode 100644
index 00000000000000..740b2463bad790
--- /dev/null
+++ b/llvm/test/MC/X86/apx/adc-intel.s
@@ -0,0 +1,158 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	adc	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xd3,0x7b]
+         {evex}	adc	bl, 123
+# CHECK: adc	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xd3,0x7b]
+         adc	cl, bl, 123
+# CHECK: {evex}	adc	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xd2,0x7b]
+         {evex}	adc	dx, 123
+# CHECK: adc	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd2,0x7b]
+         adc	ax, dx, 123
+# CHECK: {evex}	adc	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xd1,0x7b]
+         {evex}	adc	ecx, 123
+# CHECK: adc	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xd1,0x7b]
+         adc	edx, ecx, 123
+# CHECK: {evex}	adc	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xd1,0x7b]
+         {evex}	adc	r9, 123
+# CHECK: adc	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xd1,0x7b]
+         adc	r15, r9, 123
+# CHECK: {evex}	adc	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adc	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: adc	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adc	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	adc	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adc	word ptr [r8 + 4*rax + 291], 123
+# CHECK: adc	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adc	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	adc	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adc	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: adc	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adc	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	adc	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	adc	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: adc	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x94,0x80,0x23,0x01,0x00,0x00,0x7b]
+         adc	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	adc	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xd2,0xd2,0x04]
+         {evex}	adc	dx, 1234
+# CHECK: adc	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd2,0xd2,0x04]
+         adc	ax, dx, 1234
+# CHECK: {evex}	adc	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	adc	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: adc	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         adc	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	adc	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         {evex}	adc	ecx, 123456
+# CHECK: adc	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         adc	edx, ecx, 123456
+# CHECK: {evex}	adc	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         {evex}	adc	r9, 123456
+# CHECK: adc	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xd1,0x40,0xe2,0x01,0x00]
+         adc	r15, r9, 123456
+# CHECK: {evex}	adc	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	adc	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: adc	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         adc	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	adc	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	adc	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: adc	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x94,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         adc	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	adc	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x10,0xd9]
+         {evex}	adc	cl, bl
+# CHECK: adc	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x10,0xd9]
+         adc	r8b, cl, bl
+# CHECK: {evex}	adc	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x10,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: adc	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x10,0x9c,0x80,0x23,0x01,0x00,0x00]
+         adc	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	adc	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x11,0xd0]
+         {evex}	adc	ax, dx
+# CHECK: adc	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x11,0xd0]
+         adc	r9w, ax, dx
+# CHECK: {evex}	adc	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x11,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	word ptr [r8 + 4*rax + 291], dx
+# CHECK: adc	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x11,0x94,0x80,0x23,0x01,0x00,0x00]
+         adc	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	adc	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x11,0xca]
+         {evex}	adc	edx, ecx
+# CHECK: adc	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x11,0xca]
+         adc	r10d, edx, ecx
+# CHECK: {evex}	adc	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: adc	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adc	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	adc	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x11,0xcf]
+         {evex}	adc	r15, r9
+# CHECK: adc	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x11,0xcf]
+         adc	r11, r15, r9
+# CHECK: {evex}	adc	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: adc	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x11,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adc	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	adc	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x12,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: adc	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x12,0x9c,0x80,0x23,0x01,0x00,0x00]
+         adc	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	adc	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x13,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: adc	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x13,0x94,0x80,0x23,0x01,0x00,0x00]
+         adc	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	adc	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: adc	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adc	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	adc	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	adc	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: adc	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x13,0x8c,0x80,0x23,0x01,0x00,0x00]
+         adc	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/add-att.s b/llvm/test/MC/X86/apx/add-att.s
new file mode 100644
index 00000000000000..97c0b036c4338b
--- /dev/null
+++ b/llvm/test/MC/X86/apx/add-att.s
@@ -0,0 +1,317 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-104: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	addb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xc3,0x7b]
+         {evex}	addb	$123, %bl
+# CHECK: {nf}	addb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xc3,0x7b]
+         {nf}	addb	$123, %bl
+# CHECK: addb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xc3,0x7b]
+         addb	$123, %bl, %cl
+# CHECK: {nf}	addb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xc3,0x7b]
+         {nf}	addb	$123, %bl, %cl
+# CHECK: {evex}	addw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xc2,0x7b]
+         {evex}	addw	$123, %dx
+# CHECK: {nf}	addw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xc2,0x7b]
+         {nf}	addw	$123, %dx
+# CHECK: addw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xc2,0x7b]
+         addw	$123, %dx, %ax
+# CHECK: {nf}	addw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xc2,0x7b]
+         {nf}	addw	$123, %dx, %ax
+# CHECK: {evex}	addl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xc1,0x7b]
+         {evex}	addl	$123, %ecx
+# CHECK: {nf}	addl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xc1,0x7b]
+         {nf}	addl	$123, %ecx
+# CHECK: addl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xc1,0x7b]
+         addl	$123, %ecx, %edx
+# CHECK: {nf}	addl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xc1,0x7b]
+         {nf}	addl	$123, %ecx, %edx
+# CHECK: {evex}	addq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xc1,0x7b]
+         {evex}	addq	$123, %r9
+# CHECK: {nf}	addq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xc1,0x7b]
+         {nf}	addq	$123, %r9
+# CHECK: addq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xc1,0x7b]
+         addq	$123, %r9, %r15
+# CHECK: {nf}	addq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xc1,0x7b]
+         {nf}	addq	$123, %r9, %r15
+# CHECK: {evex}	addb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	addb	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	addb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addb	$123, 291(%r8,%rax,4)
+# CHECK: addb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         addb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {nf}	addb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	addw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	addw	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	addw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addw	$123, 291(%r8,%rax,4)
+# CHECK: addw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         addw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	addw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	addl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	addl	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	addl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addl	$123, 291(%r8,%rax,4)
+# CHECK: addl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         addl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	addl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	addq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	addq	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	addq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addq	$123, 291(%r8,%rax,4)
+# CHECK: addq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         addq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	addq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	addq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	addw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xc2,0xd2,0x04]
+         {evex}	addw	$1234, %dx
+# CHECK: {nf}	addw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xc2,0xd2,0x04]
+         {nf}	addw	$1234, %dx
+# CHECK: addw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xc2,0xd2,0x04]
+         addw	$1234, %dx, %ax
+# CHECK: {nf}	addw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xc2,0xd2,0x04]
+         {nf}	addw	$1234, %dx, %ax
+# CHECK: {evex}	addw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	addw	$1234, 291(%r8,%rax,4)
+# CHECK: {nf}	addw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	addw	$1234, 291(%r8,%rax,4)
+# CHECK: addw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         addw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	addw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	addw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	addl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {evex}	addl	$123456, %ecx
+# CHECK: {nf}	addl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	addl	$123456, %ecx
+# CHECK: addl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         addl	$123456, %ecx, %edx
+# CHECK: {nf}	addl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	addl	$123456, %ecx, %edx
+# CHECK: {evex}	addq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {evex}	addq	$123456, %r9
+# CHECK: {nf}	addq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	addq	$123456, %r9
+# CHECK: addq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         addq	$123456, %r9, %r15
+# CHECK: {nf}	addq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	addq	$123456, %r9, %r15
+# CHECK: {evex}	addl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	addl	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	addl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	addl	$123456, 291(%r8,%rax,4)
+# CHECK: addl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         addl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	addl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	addl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	addq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	addq	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	addq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	addq	$123456, 291(%r8,%rax,4)
+# CHECK: addq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         addq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	addq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	addq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	addb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x00,0xd9]
+         {evex}	addb	%bl, %cl
+# CHECK: {nf}	addb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x00,0xd9]
+         {nf}	addb	%bl, %cl
+# CHECK: addb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x00,0xd9]
+         addb	%bl, %cl, %r8b
+# CHECK: {nf}	addb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x00,0xd9]
+         {nf}	addb	%bl, %cl, %r8b
+# CHECK: {evex}	addb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addb	%bl, 291(%r8,%rax,4)
+# CHECK: {nf}	addb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addb	%bl, 291(%r8,%rax,4)
+# CHECK: addb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         addb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {nf}	addb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	addw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x01,0xd0]
+         {evex}	addw	%dx, %ax
+# CHECK: {nf}	addw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x01,0xd0]
+         {nf}	addw	%dx, %ax
+# CHECK: addw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x01,0xd0]
+         addw	%dx, %ax, %r9w
+# CHECK: {nf}	addw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x01,0xd0]
+         {nf}	addw	%dx, %ax, %r9w
+# CHECK: {evex}	addw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addw	%dx, 291(%r8,%rax,4)
+# CHECK: {nf}	addw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addw	%dx, 291(%r8,%rax,4)
+# CHECK: addw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         addw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {nf}	addw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	addl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x01,0xca]
+         {evex}	addl	%ecx, %edx
+# CHECK: {nf}	addl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x01,0xca]
+         {nf}	addl	%ecx, %edx
+# CHECK: addl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x01,0xca]
+         addl	%ecx, %edx, %r10d
+# CHECK: {nf}	addl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x01,0xca]
+         {nf}	addl	%ecx, %edx, %r10d
+# CHECK: {evex}	addl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addl	%ecx, 291(%r8,%rax,4)
+# CHECK: {nf}	addl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addl	%ecx, 291(%r8,%rax,4)
+# CHECK: addl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         addl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {nf}	addl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	addq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x01,0xcf]
+         {evex}	addq	%r9, %r15
+# CHECK: {nf}	addq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x01,0xcf]
+         {nf}	addq	%r9, %r15
+# CHECK: addq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x01,0xcf]
+         addq	%r9, %r15, %r11
+# CHECK: {nf}	addq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x01,0xcf]
+         {nf}	addq	%r9, %r15, %r11
+# CHECK: {evex}	addq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addq	%r9, 291(%r8,%rax,4)
+# CHECK: {nf}	addq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addq	%r9, 291(%r8,%rax,4)
+# CHECK: addq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         addq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {nf}	addq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	addb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	addb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addb	291(%r8,%rax,4), %bl
+# CHECK: addb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         addb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {nf}	addb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	addw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	addw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addw	291(%r8,%rax,4), %dx
+# CHECK: addw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         addw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {nf}	addw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	addl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	addl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addl	291(%r8,%rax,4), %ecx
+# CHECK: addl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         addl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {nf}	addl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	addq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	addq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	addq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addq	291(%r8,%rax,4), %r9
+# CHECK: addq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         addq	291(%r8,%rax,4), %r9, %r15
+# CHECK: {nf}	addq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	addq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/add-intel.s b/llvm/test/MC/X86/apx/add-intel.s
new file mode 100644
index 00000000000000..5f0a931e2ff48e
--- /dev/null
+++ b/llvm/test/MC/X86/apx/add-intel.s
@@ -0,0 +1,314 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	add	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xc3,0x7b]
+         {evex}	add	bl, 123
+# CHECK: {nf}	add	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xc3,0x7b]
+         {nf}	add	bl, 123
+# CHECK: add	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xc3,0x7b]
+         add	cl, bl, 123
+# CHECK: {nf}	add	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xc3,0x7b]
+         {nf}	add	cl, bl, 123
+# CHECK: {evex}	add	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xc2,0x7b]
+         {evex}	add	dx, 123
+# CHECK: {nf}	add	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xc2,0x7b]
+         {nf}	add	dx, 123
+# CHECK: add	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xc2,0x7b]
+         add	ax, dx, 123
+# CHECK: {nf}	add	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xc2,0x7b]
+         {nf}	add	ax, dx, 123
+# CHECK: {evex}	add	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xc1,0x7b]
+         {evex}	add	ecx, 123
+# CHECK: {nf}	add	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xc1,0x7b]
+         {nf}	add	ecx, 123
+# CHECK: add	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xc1,0x7b]
+         add	edx, ecx, 123
+# CHECK: {nf}	add	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xc1,0x7b]
+         {nf}	add	edx, ecx, 123
+# CHECK: {evex}	add	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xc1,0x7b]
+         {evex}	add	r9, 123
+# CHECK: {nf}	add	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xc1,0x7b]
+         {nf}	add	r9, 123
+# CHECK: add	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xc1,0x7b]
+         add	r15, r9, 123
+# CHECK: {nf}	add	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xc1,0x7b]
+         {nf}	add	r15, r9, 123
+# CHECK: {evex}	add	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	add	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: add	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         add	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	add	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	add	word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	word ptr [r8 + 4*rax + 291], 123
+# CHECK: add	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         add	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	add	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	add	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: add	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         add	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	add	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	add	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: add	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         add	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0x84,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	add	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xc2,0xd2,0x04]
+         {evex}	add	dx, 1234
+# CHECK: {nf}	add	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xc2,0xd2,0x04]
+         {nf}	add	dx, 1234
+# CHECK: add	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xc2,0xd2,0x04]
+         add	ax, dx, 1234
+# CHECK: {nf}	add	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xc2,0xd2,0x04]
+         {nf}	add	ax, dx, 1234
+# CHECK: {evex}	add	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	add	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	add	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	add	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: add	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         add	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	add	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	add	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	add	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {evex}	add	ecx, 123456
+# CHECK: {nf}	add	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	add	ecx, 123456
+# CHECK: add	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         add	edx, ecx, 123456
+# CHECK: {nf}	add	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	add	edx, ecx, 123456
+# CHECK: {evex}	add	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {evex}	add	r9, 123456
+# CHECK: {nf}	add	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	add	r9, 123456
+# CHECK: add	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         add	r15, r9, 123456
+# CHECK: {nf}	add	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xc1,0x40,0xe2,0x01,0x00]
+         {nf}	add	r15, r9, 123456
+# CHECK: {evex}	add	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	add	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	add	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	add	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	add	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	add	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	add	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	add	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	add	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: add	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         add	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0x84,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	add	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	add	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x00,0xd9]
+         {evex}	add	cl, bl
+# CHECK: {nf}	add	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x00,0xd9]
+         {nf}	add	cl, bl
+# CHECK: add	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x00,0xd9]
+         add	r8b, cl, bl
+# CHECK: {nf}	add	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x00,0xd9]
+         {nf}	add	r8b, cl, bl
+# CHECK: {evex}	add	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	add	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: add	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         add	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	add	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x00,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	add	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x01,0xd0]
+         {evex}	add	ax, dx
+# CHECK: {nf}	add	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x01,0xd0]
+         {nf}	add	ax, dx
+# CHECK: add	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x01,0xd0]
+         add	r9w, ax, dx
+# CHECK: {nf}	add	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x01,0xd0]
+         {nf}	add	r9w, ax, dx
+# CHECK: {evex}	add	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	add	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	word ptr [r8 + 4*rax + 291], dx
+# CHECK: add	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         add	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	add	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x01,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	add	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x01,0xca]
+         {evex}	add	edx, ecx
+# CHECK: {nf}	add	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x01,0xca]
+         {nf}	add	edx, ecx
+# CHECK: add	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x01,0xca]
+         add	r10d, edx, ecx
+# CHECK: {nf}	add	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x01,0xca]
+         {nf}	add	r10d, edx, ecx
+# CHECK: {evex}	add	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	add	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: add	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         add	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	add	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	add	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x01,0xcf]
+         {evex}	add	r15, r9
+# CHECK: {nf}	add	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x01,0xcf]
+         {nf}	add	r15, r9
+# CHECK: add	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x01,0xcf]
+         add	r11, r15, r9
+# CHECK: {nf}	add	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x01,0xcf]
+         {nf}	add	r11, r15, r9
+# CHECK: {evex}	add	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	add	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: add	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         add	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	add	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x01,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	add	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: add	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         add	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x02,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	add	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: add	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         add	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x03,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	add	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	add	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	add	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: add	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         add	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	add	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x03,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	add	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/and-att.s b/llvm/test/MC/X86/apx/and-att.s
new file mode 100644
index 00000000000000..7b4953756e3bc7
--- /dev/null
+++ b/llvm/test/MC/X86/apx/and-att.s
@@ -0,0 +1,317 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-104: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	andb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xe3,0x7b]
+         {evex}	andb	$123, %bl
+# CHECK: {nf}	andb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xe3,0x7b]
+         {nf}	andb	$123, %bl
+# CHECK: andb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xe3,0x7b]
+         andb	$123, %bl, %cl
+# CHECK: {nf}	andb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xe3,0x7b]
+         {nf}	andb	$123, %bl, %cl
+# CHECK: {evex}	andw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xe2,0x7b]
+         {evex}	andw	$123, %dx
+# CHECK: {nf}	andw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xe2,0x7b]
+         {nf}	andw	$123, %dx
+# CHECK: andw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xe2,0x7b]
+         andw	$123, %dx, %ax
+# CHECK: {nf}	andw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xe2,0x7b]
+         {nf}	andw	$123, %dx, %ax
+# CHECK: {evex}	andl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xe1,0x7b]
+         {evex}	andl	$123, %ecx
+# CHECK: {nf}	andl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xe1,0x7b]
+         {nf}	andl	$123, %ecx
+# CHECK: andl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xe1,0x7b]
+         andl	$123, %ecx, %edx
+# CHECK: {nf}	andl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xe1,0x7b]
+         {nf}	andl	$123, %ecx, %edx
+# CHECK: {evex}	andq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xe1,0x7b]
+         {evex}	andq	$123, %r9
+# CHECK: {nf}	andq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xe1,0x7b]
+         {nf}	andq	$123, %r9
+# CHECK: andq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xe1,0x7b]
+         andq	$123, %r9, %r15
+# CHECK: {nf}	andq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xe1,0x7b]
+         {nf}	andq	$123, %r9, %r15
+# CHECK: {evex}	andb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	andb	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	andb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andb	$123, 291(%r8,%rax,4)
+# CHECK: andb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         andb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {nf}	andb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	andw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	andw	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	andw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andw	$123, 291(%r8,%rax,4)
+# CHECK: andw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         andw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	andw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	andl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	andl	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	andl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andl	$123, 291(%r8,%rax,4)
+# CHECK: andl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         andl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	andl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	andq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	andq	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	andq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andq	$123, 291(%r8,%rax,4)
+# CHECK: andq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         andq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	andq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	andq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	andw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xe2,0xd2,0x04]
+         {evex}	andw	$1234, %dx
+# CHECK: {nf}	andw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xe2,0xd2,0x04]
+         {nf}	andw	$1234, %dx
+# CHECK: andw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xe2,0xd2,0x04]
+         andw	$1234, %dx, %ax
+# CHECK: {nf}	andw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xe2,0xd2,0x04]
+         {nf}	andw	$1234, %dx, %ax
+# CHECK: {evex}	andw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	andw	$1234, 291(%r8,%rax,4)
+# CHECK: {nf}	andw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	andw	$1234, 291(%r8,%rax,4)
+# CHECK: andw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         andw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	andw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	andw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	andl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {evex}	andl	$123456, %ecx
+# CHECK: {nf}	andl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	andl	$123456, %ecx
+# CHECK: andl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         andl	$123456, %ecx, %edx
+# CHECK: {nf}	andl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	andl	$123456, %ecx, %edx
+# CHECK: {evex}	andq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {evex}	andq	$123456, %r9
+# CHECK: {nf}	andq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	andq	$123456, %r9
+# CHECK: andq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         andq	$123456, %r9, %r15
+# CHECK: {nf}	andq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	andq	$123456, %r9, %r15
+# CHECK: {evex}	andl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	andl	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	andl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	andl	$123456, 291(%r8,%rax,4)
+# CHECK: andl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         andl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	andl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	andl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	andq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	andq	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	andq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	andq	$123456, 291(%r8,%rax,4)
+# CHECK: andq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         andq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	andq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	andq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	andb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x20,0xd9]
+         {evex}	andb	%bl, %cl
+# CHECK: {nf}	andb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x20,0xd9]
+         {nf}	andb	%bl, %cl
+# CHECK: andb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x20,0xd9]
+         andb	%bl, %cl, %r8b
+# CHECK: {nf}	andb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x20,0xd9]
+         {nf}	andb	%bl, %cl, %r8b
+# CHECK: {evex}	andb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andb	%bl, 291(%r8,%rax,4)
+# CHECK: {nf}	andb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andb	%bl, 291(%r8,%rax,4)
+# CHECK: andb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         andb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {nf}	andb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	andw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x21,0xd0]
+         {evex}	andw	%dx, %ax
+# CHECK: {nf}	andw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x21,0xd0]
+         {nf}	andw	%dx, %ax
+# CHECK: andw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x21,0xd0]
+         andw	%dx, %ax, %r9w
+# CHECK: {nf}	andw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x21,0xd0]
+         {nf}	andw	%dx, %ax, %r9w
+# CHECK: {evex}	andw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andw	%dx, 291(%r8,%rax,4)
+# CHECK: {nf}	andw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andw	%dx, 291(%r8,%rax,4)
+# CHECK: andw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         andw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {nf}	andw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	andl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x21,0xca]
+         {evex}	andl	%ecx, %edx
+# CHECK: {nf}	andl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x21,0xca]
+         {nf}	andl	%ecx, %edx
+# CHECK: andl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x21,0xca]
+         andl	%ecx, %edx, %r10d
+# CHECK: {nf}	andl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x21,0xca]
+         {nf}	andl	%ecx, %edx, %r10d
+# CHECK: {evex}	andl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andl	%ecx, 291(%r8,%rax,4)
+# CHECK: {nf}	andl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andl	%ecx, 291(%r8,%rax,4)
+# CHECK: andl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         andl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {nf}	andl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	andq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x21,0xcf]
+         {evex}	andq	%r9, %r15
+# CHECK: {nf}	andq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x21,0xcf]
+         {nf}	andq	%r9, %r15
+# CHECK: andq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x21,0xcf]
+         andq	%r9, %r15, %r11
+# CHECK: {nf}	andq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x21,0xcf]
+         {nf}	andq	%r9, %r15, %r11
+# CHECK: {evex}	andq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andq	%r9, 291(%r8,%rax,4)
+# CHECK: {nf}	andq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andq	%r9, 291(%r8,%rax,4)
+# CHECK: andq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         andq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {nf}	andq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	andb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	andb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andb	291(%r8,%rax,4), %bl
+# CHECK: andb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         andb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {nf}	andb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	andw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	andw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andw	291(%r8,%rax,4), %dx
+# CHECK: andw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         andw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {nf}	andw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	andl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	andl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andl	291(%r8,%rax,4), %ecx
+# CHECK: andl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         andl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {nf}	andl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	andq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	andq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	andq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andq	291(%r8,%rax,4), %r9
+# CHECK: andq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         andq	291(%r8,%rax,4), %r9, %r15
+# CHECK: {nf}	andq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	andq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/and-intel.s b/llvm/test/MC/X86/apx/and-intel.s
new file mode 100644
index 00000000000000..fa4a0fbb3006a1
--- /dev/null
+++ b/llvm/test/MC/X86/apx/and-intel.s
@@ -0,0 +1,314 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	and	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xe3,0x7b]
+         {evex}	and	bl, 123
+# CHECK: {nf}	and	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xe3,0x7b]
+         {nf}	and	bl, 123
+# CHECK: and	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xe3,0x7b]
+         and	cl, bl, 123
+# CHECK: {nf}	and	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xe3,0x7b]
+         {nf}	and	cl, bl, 123
+# CHECK: {evex}	and	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xe2,0x7b]
+         {evex}	and	dx, 123
+# CHECK: {nf}	and	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xe2,0x7b]
+         {nf}	and	dx, 123
+# CHECK: and	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xe2,0x7b]
+         and	ax, dx, 123
+# CHECK: {nf}	and	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xe2,0x7b]
+         {nf}	and	ax, dx, 123
+# CHECK: {evex}	and	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xe1,0x7b]
+         {evex}	and	ecx, 123
+# CHECK: {nf}	and	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xe1,0x7b]
+         {nf}	and	ecx, 123
+# CHECK: and	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xe1,0x7b]
+         and	edx, ecx, 123
+# CHECK: {nf}	and	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xe1,0x7b]
+         {nf}	and	edx, ecx, 123
+# CHECK: {evex}	and	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xe1,0x7b]
+         {evex}	and	r9, 123
+# CHECK: {nf}	and	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xe1,0x7b]
+         {nf}	and	r9, 123
+# CHECK: and	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xe1,0x7b]
+         and	r15, r9, 123
+# CHECK: {nf}	and	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xe1,0x7b]
+         {nf}	and	r15, r9, 123
+# CHECK: {evex}	and	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	and	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: and	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         and	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	and	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	and	word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	word ptr [r8 + 4*rax + 291], 123
+# CHECK: and	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         and	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	and	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	and	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: and	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         and	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	and	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	and	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: and	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         and	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xa4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	and	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xe2,0xd2,0x04]
+         {evex}	and	dx, 1234
+# CHECK: {nf}	and	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xe2,0xd2,0x04]
+         {nf}	and	dx, 1234
+# CHECK: and	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xe2,0xd2,0x04]
+         and	ax, dx, 1234
+# CHECK: {nf}	and	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xe2,0xd2,0x04]
+         {nf}	and	ax, dx, 1234
+# CHECK: {evex}	and	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	and	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	and	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	and	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: and	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         and	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	and	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	and	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	and	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {evex}	and	ecx, 123456
+# CHECK: {nf}	and	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	and	ecx, 123456
+# CHECK: and	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         and	edx, ecx, 123456
+# CHECK: {nf}	and	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	and	edx, ecx, 123456
+# CHECK: {evex}	and	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {evex}	and	r9, 123456
+# CHECK: {nf}	and	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	and	r9, 123456
+# CHECK: and	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         and	r15, r9, 123456
+# CHECK: {nf}	and	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xe1,0x40,0xe2,0x01,0x00]
+         {nf}	and	r15, r9, 123456
+# CHECK: {evex}	and	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	and	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	and	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	and	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	and	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	and	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	and	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	and	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	and	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: and	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         and	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xa4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	and	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	and	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x20,0xd9]
+         {evex}	and	cl, bl
+# CHECK: {nf}	and	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x20,0xd9]
+         {nf}	and	cl, bl
+# CHECK: and	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x20,0xd9]
+         and	r8b, cl, bl
+# CHECK: {nf}	and	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x20,0xd9]
+         {nf}	and	r8b, cl, bl
+# CHECK: {evex}	and	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	and	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: and	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         and	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	and	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x20,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	and	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x21,0xd0]
+         {evex}	and	ax, dx
+# CHECK: {nf}	and	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x21,0xd0]
+         {nf}	and	ax, dx
+# CHECK: and	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x21,0xd0]
+         and	r9w, ax, dx
+# CHECK: {nf}	and	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x21,0xd0]
+         {nf}	and	r9w, ax, dx
+# CHECK: {evex}	and	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	and	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	word ptr [r8 + 4*rax + 291], dx
+# CHECK: and	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         and	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	and	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x21,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	and	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x21,0xca]
+         {evex}	and	edx, ecx
+# CHECK: {nf}	and	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x21,0xca]
+         {nf}	and	edx, ecx
+# CHECK: and	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x21,0xca]
+         and	r10d, edx, ecx
+# CHECK: {nf}	and	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x21,0xca]
+         {nf}	and	r10d, edx, ecx
+# CHECK: {evex}	and	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	and	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: and	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         and	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	and	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	and	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x21,0xcf]
+         {evex}	and	r15, r9
+# CHECK: {nf}	and	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x21,0xcf]
+         {nf}	and	r15, r9
+# CHECK: and	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x21,0xcf]
+         and	r11, r15, r9
+# CHECK: {nf}	and	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x21,0xcf]
+         {nf}	and	r11, r15, r9
+# CHECK: {evex}	and	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	and	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: and	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         and	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	and	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x21,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	and	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: and	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         and	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x22,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	and	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: and	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         and	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x23,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	and	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	and	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	and	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: and	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         and	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	and	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x23,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	and	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/or-att.s b/llvm/test/MC/X86/apx/or-att.s
new file mode 100644
index 00000000000000..205d3c397c311a
--- /dev/null
+++ b/llvm/test/MC/X86/apx/or-att.s
@@ -0,0 +1,317 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-104: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	orb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xcb,0x7b]
+         {evex}	orb	$123, %bl
+# CHECK: {nf}	orb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xcb,0x7b]
+         {nf}	orb	$123, %bl
+# CHECK: orb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xcb,0x7b]
+         orb	$123, %bl, %cl
+# CHECK: {nf}	orb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xcb,0x7b]
+         {nf}	orb	$123, %bl, %cl
+# CHECK: {evex}	orw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xca,0x7b]
+         {evex}	orw	$123, %dx
+# CHECK: {nf}	orw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xca,0x7b]
+         {nf}	orw	$123, %dx
+# CHECK: orw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xca,0x7b]
+         orw	$123, %dx, %ax
+# CHECK: {nf}	orw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xca,0x7b]
+         {nf}	orw	$123, %dx, %ax
+# CHECK: {evex}	orl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xc9,0x7b]
+         {evex}	orl	$123, %ecx
+# CHECK: {nf}	orl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xc9,0x7b]
+         {nf}	orl	$123, %ecx
+# CHECK: orl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xc9,0x7b]
+         orl	$123, %ecx, %edx
+# CHECK: {nf}	orl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xc9,0x7b]
+         {nf}	orl	$123, %ecx, %edx
+# CHECK: {evex}	orq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xc9,0x7b]
+         {evex}	orq	$123, %r9
+# CHECK: {nf}	orq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xc9,0x7b]
+         {nf}	orq	$123, %r9
+# CHECK: orq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xc9,0x7b]
+         orq	$123, %r9, %r15
+# CHECK: {nf}	orq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xc9,0x7b]
+         {nf}	orq	$123, %r9, %r15
+# CHECK: {evex}	orb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	orb	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	orb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orb	$123, 291(%r8,%rax,4)
+# CHECK: orb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         orb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {nf}	orb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	orw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	orw	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	orw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orw	$123, 291(%r8,%rax,4)
+# CHECK: orw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         orw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	orw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	orl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	orl	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	orl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orl	$123, 291(%r8,%rax,4)
+# CHECK: orl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         orl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	orl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	orq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	orq	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	orq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orq	$123, 291(%r8,%rax,4)
+# CHECK: orq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         orq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	orq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	orq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	orw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xca,0xd2,0x04]
+         {evex}	orw	$1234, %dx
+# CHECK: {nf}	orw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xca,0xd2,0x04]
+         {nf}	orw	$1234, %dx
+# CHECK: orw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xca,0xd2,0x04]
+         orw	$1234, %dx, %ax
+# CHECK: {nf}	orw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xca,0xd2,0x04]
+         {nf}	orw	$1234, %dx, %ax
+# CHECK: {evex}	orw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	orw	$1234, 291(%r8,%rax,4)
+# CHECK: {nf}	orw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	orw	$1234, 291(%r8,%rax,4)
+# CHECK: orw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         orw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	orw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	orw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	orl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {evex}	orl	$123456, %ecx
+# CHECK: {nf}	orl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	orl	$123456, %ecx
+# CHECK: orl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         orl	$123456, %ecx, %edx
+# CHECK: {nf}	orl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	orl	$123456, %ecx, %edx
+# CHECK: {evex}	orq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {evex}	orq	$123456, %r9
+# CHECK: {nf}	orq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	orq	$123456, %r9
+# CHECK: orq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         orq	$123456, %r9, %r15
+# CHECK: {nf}	orq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	orq	$123456, %r9, %r15
+# CHECK: {evex}	orl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	orl	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	orl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	orl	$123456, 291(%r8,%rax,4)
+# CHECK: orl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         orl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	orl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	orl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	orq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	orq	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	orq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	orq	$123456, 291(%r8,%rax,4)
+# CHECK: orq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         orq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	orq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	orq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	orb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x08,0xd9]
+         {evex}	orb	%bl, %cl
+# CHECK: {nf}	orb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x08,0xd9]
+         {nf}	orb	%bl, %cl
+# CHECK: orb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x08,0xd9]
+         orb	%bl, %cl, %r8b
+# CHECK: {nf}	orb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x08,0xd9]
+         {nf}	orb	%bl, %cl, %r8b
+# CHECK: {evex}	orb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orb	%bl, 291(%r8,%rax,4)
+# CHECK: {nf}	orb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orb	%bl, 291(%r8,%rax,4)
+# CHECK: orb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         orb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {nf}	orb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	orw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x09,0xd0]
+         {evex}	orw	%dx, %ax
+# CHECK: {nf}	orw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x09,0xd0]
+         {nf}	orw	%dx, %ax
+# CHECK: orw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x09,0xd0]
+         orw	%dx, %ax, %r9w
+# CHECK: {nf}	orw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x09,0xd0]
+         {nf}	orw	%dx, %ax, %r9w
+# CHECK: {evex}	orw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orw	%dx, 291(%r8,%rax,4)
+# CHECK: {nf}	orw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orw	%dx, 291(%r8,%rax,4)
+# CHECK: orw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         orw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {nf}	orw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	orl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x09,0xca]
+         {evex}	orl	%ecx, %edx
+# CHECK: {nf}	orl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x09,0xca]
+         {nf}	orl	%ecx, %edx
+# CHECK: orl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x09,0xca]
+         orl	%ecx, %edx, %r10d
+# CHECK: {nf}	orl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x09,0xca]
+         {nf}	orl	%ecx, %edx, %r10d
+# CHECK: {evex}	orl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orl	%ecx, 291(%r8,%rax,4)
+# CHECK: {nf}	orl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orl	%ecx, 291(%r8,%rax,4)
+# CHECK: orl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         orl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {nf}	orl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	orq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x09,0xcf]
+         {evex}	orq	%r9, %r15
+# CHECK: {nf}	orq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x09,0xcf]
+         {nf}	orq	%r9, %r15
+# CHECK: orq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x09,0xcf]
+         orq	%r9, %r15, %r11
+# CHECK: {nf}	orq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x09,0xcf]
+         {nf}	orq	%r9, %r15, %r11
+# CHECK: {evex}	orq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orq	%r9, 291(%r8,%rax,4)
+# CHECK: {nf}	orq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orq	%r9, 291(%r8,%rax,4)
+# CHECK: orq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         orq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {nf}	orq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	orb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	orb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orb	291(%r8,%rax,4), %bl
+# CHECK: orb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         orb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {nf}	orb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	orw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	orw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orw	291(%r8,%rax,4), %dx
+# CHECK: orw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         orw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {nf}	orw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	orl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	orl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orl	291(%r8,%rax,4), %ecx
+# CHECK: orl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         orl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {nf}	orl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	orq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	orq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	orq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orq	291(%r8,%rax,4), %r9
+# CHECK: orq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         orq	291(%r8,%rax,4), %r9, %r15
+# CHECK: {nf}	orq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	orq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/or-intel.s b/llvm/test/MC/X86/apx/or-intel.s
new file mode 100644
index 00000000000000..d631c732f1df1c
--- /dev/null
+++ b/llvm/test/MC/X86/apx/or-intel.s
@@ -0,0 +1,314 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	or	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xcb,0x7b]
+         {evex}	or	bl, 123
+# CHECK: {nf}	or	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xcb,0x7b]
+         {nf}	or	bl, 123
+# CHECK: or	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xcb,0x7b]
+         or	cl, bl, 123
+# CHECK: {nf}	or	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xcb,0x7b]
+         {nf}	or	cl, bl, 123
+# CHECK: {evex}	or	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xca,0x7b]
+         {evex}	or	dx, 123
+# CHECK: {nf}	or	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xca,0x7b]
+         {nf}	or	dx, 123
+# CHECK: or	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xca,0x7b]
+         or	ax, dx, 123
+# CHECK: {nf}	or	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xca,0x7b]
+         {nf}	or	ax, dx, 123
+# CHECK: {evex}	or	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xc9,0x7b]
+         {evex}	or	ecx, 123
+# CHECK: {nf}	or	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xc9,0x7b]
+         {nf}	or	ecx, 123
+# CHECK: or	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xc9,0x7b]
+         or	edx, ecx, 123
+# CHECK: {nf}	or	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xc9,0x7b]
+         {nf}	or	edx, ecx, 123
+# CHECK: {evex}	or	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xc9,0x7b]
+         {evex}	or	r9, 123
+# CHECK: {nf}	or	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xc9,0x7b]
+         {nf}	or	r9, 123
+# CHECK: or	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xc9,0x7b]
+         or	r15, r9, 123
+# CHECK: {nf}	or	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xc9,0x7b]
+         {nf}	or	r15, r9, 123
+# CHECK: {evex}	or	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	or	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: or	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         or	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	or	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	or	word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	word ptr [r8 + 4*rax + 291], 123
+# CHECK: or	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         or	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	or	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	or	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: or	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         or	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	or	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	or	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: or	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         or	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	or	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xca,0xd2,0x04]
+         {evex}	or	dx, 1234
+# CHECK: {nf}	or	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xca,0xd2,0x04]
+         {nf}	or	dx, 1234
+# CHECK: or	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xca,0xd2,0x04]
+         or	ax, dx, 1234
+# CHECK: {nf}	or	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xca,0xd2,0x04]
+         {nf}	or	ax, dx, 1234
+# CHECK: {evex}	or	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	or	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	or	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	or	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: or	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         or	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	or	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	or	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	or	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {evex}	or	ecx, 123456
+# CHECK: {nf}	or	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	or	ecx, 123456
+# CHECK: or	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         or	edx, ecx, 123456
+# CHECK: {nf}	or	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	or	edx, ecx, 123456
+# CHECK: {evex}	or	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {evex}	or	r9, 123456
+# CHECK: {nf}	or	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	or	r9, 123456
+# CHECK: or	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         or	r15, r9, 123456
+# CHECK: {nf}	or	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xc9,0x40,0xe2,0x01,0x00]
+         {nf}	or	r15, r9, 123456
+# CHECK: {evex}	or	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	or	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	or	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	or	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	or	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	or	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	or	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	or	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	or	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: or	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         or	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0x8c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	or	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	or	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x08,0xd9]
+         {evex}	or	cl, bl
+# CHECK: {nf}	or	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x08,0xd9]
+         {nf}	or	cl, bl
+# CHECK: or	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x08,0xd9]
+         or	r8b, cl, bl
+# CHECK: {nf}	or	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x08,0xd9]
+         {nf}	or	r8b, cl, bl
+# CHECK: {evex}	or	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	or	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: or	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         or	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	or	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x08,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	or	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x09,0xd0]
+         {evex}	or	ax, dx
+# CHECK: {nf}	or	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x09,0xd0]
+         {nf}	or	ax, dx
+# CHECK: or	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x09,0xd0]
+         or	r9w, ax, dx
+# CHECK: {nf}	or	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x09,0xd0]
+         {nf}	or	r9w, ax, dx
+# CHECK: {evex}	or	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	or	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	word ptr [r8 + 4*rax + 291], dx
+# CHECK: or	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         or	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	or	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x09,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	or	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x09,0xca]
+         {evex}	or	edx, ecx
+# CHECK: {nf}	or	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x09,0xca]
+         {nf}	or	edx, ecx
+# CHECK: or	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x09,0xca]
+         or	r10d, edx, ecx
+# CHECK: {nf}	or	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x09,0xca]
+         {nf}	or	r10d, edx, ecx
+# CHECK: {evex}	or	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	or	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: or	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         or	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	or	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	or	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x09,0xcf]
+         {evex}	or	r15, r9
+# CHECK: {nf}	or	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x09,0xcf]
+         {nf}	or	r15, r9
+# CHECK: or	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x09,0xcf]
+         or	r11, r15, r9
+# CHECK: {nf}	or	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x09,0xcf]
+         {nf}	or	r11, r15, r9
+# CHECK: {evex}	or	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	or	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: or	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         or	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	or	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x09,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	or	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: or	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         or	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x0a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	or	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: or	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         or	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x0b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	or	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	or	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	or	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: or	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         or	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	or	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x0b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	or	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/sbb-att.s b/llvm/test/MC/X86/apx/sbb-att.s
new file mode 100644
index 00000000000000..80b909edb4e9c9
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sbb-att.s
@@ -0,0 +1,161 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-52: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	sbbb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xdb,0x7b]
+         {evex}	sbbb	$123, %bl
+# CHECK: sbbb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xdb,0x7b]
+         sbbb	$123, %bl, %cl
+# CHECK: {evex}	sbbw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xda,0x7b]
+         {evex}	sbbw	$123, %dx
+# CHECK: sbbw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xda,0x7b]
+         sbbw	$123, %dx, %ax
+# CHECK: {evex}	sbbl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xd9,0x7b]
+         {evex}	sbbl	$123, %ecx
+# CHECK: sbbl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xd9,0x7b]
+         sbbl	$123, %ecx, %edx
+# CHECK: {evex}	sbbq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xd9,0x7b]
+         {evex}	sbbq	$123, %r9
+# CHECK: sbbq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xd9,0x7b]
+         sbbq	$123, %r9, %r15
+# CHECK: {evex}	sbbb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbbb	$123, 291(%r8,%rax,4)
+# CHECK: sbbb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbbb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	sbbw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbbw	$123, 291(%r8,%rax,4)
+# CHECK: sbbw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbbw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	sbbl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbbl	$123, 291(%r8,%rax,4)
+# CHECK: sbbl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbbl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	sbbq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbbq	$123, 291(%r8,%rax,4)
+# CHECK: sbbq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbbq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	sbbw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xda,0xd2,0x04]
+         {evex}	sbbw	$1234, %dx
+# CHECK: sbbw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xda,0xd2,0x04]
+         sbbw	$1234, %dx, %ax
+# CHECK: {evex}	sbbw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	sbbw	$1234, 291(%r8,%rax,4)
+# CHECK: sbbw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         sbbw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	sbbl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         {evex}	sbbl	$123456, %ecx
+# CHECK: sbbl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         sbbl	$123456, %ecx, %edx
+# CHECK: {evex}	sbbq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         {evex}	sbbq	$123456, %r9
+# CHECK: sbbq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         sbbq	$123456, %r9, %r15
+# CHECK: {evex}	sbbl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sbbl	$123456, 291(%r8,%rax,4)
+# CHECK: sbbl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sbbl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	sbbq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sbbq	$123456, 291(%r8,%rax,4)
+# CHECK: sbbq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sbbq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	sbbb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x18,0xd9]
+         {evex}	sbbb	%bl, %cl
+# CHECK: sbbb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x18,0xd9]
+         sbbb	%bl, %cl, %r8b
+# CHECK: {evex}	sbbb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x18,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbb	%bl, 291(%r8,%rax,4)
+# CHECK: sbbb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x18,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sbbb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	sbbw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x19,0xd0]
+         {evex}	sbbw	%dx, %ax
+# CHECK: sbbw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x19,0xd0]
+         sbbw	%dx, %ax, %r9w
+# CHECK: {evex}	sbbw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x19,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbw	%dx, 291(%r8,%rax,4)
+# CHECK: sbbw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x19,0x94,0x80,0x23,0x01,0x00,0x00]
+         sbbw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	sbbl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x19,0xca]
+         {evex}	sbbl	%ecx, %edx
+# CHECK: sbbl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x19,0xca]
+         sbbl	%ecx, %edx, %r10d
+# CHECK: {evex}	sbbl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbl	%ecx, 291(%r8,%rax,4)
+# CHECK: sbbl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbbl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	sbbq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x19,0xcf]
+         {evex}	sbbq	%r9, %r15
+# CHECK: sbbq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x19,0xcf]
+         sbbq	%r9, %r15, %r11
+# CHECK: {evex}	sbbq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbq	%r9, 291(%r8,%rax,4)
+# CHECK: sbbq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbbq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	sbbb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbb	291(%r8,%rax,4), %bl
+# CHECK: sbbb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sbbb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	sbbw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x1b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbw	291(%r8,%rax,4), %dx
+# CHECK: sbbw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x1b,0x94,0x80,0x23,0x01,0x00,0x00]
+         sbbw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	sbbl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbl	291(%r8,%rax,4), %ecx
+# CHECK: sbbl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbbl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	sbbq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbbq	291(%r8,%rax,4), %r9
+# CHECK: sbbq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbbq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/sbb-intel.s b/llvm/test/MC/X86/apx/sbb-intel.s
new file mode 100644
index 00000000000000..57d9c8110368be
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sbb-intel.s
@@ -0,0 +1,158 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	sbb	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xdb,0x7b]
+         {evex}	sbb	bl, 123
+# CHECK: sbb	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xdb,0x7b]
+         sbb	cl, bl, 123
+# CHECK: {evex}	sbb	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xda,0x7b]
+         {evex}	sbb	dx, 123
+# CHECK: sbb	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xda,0x7b]
+         sbb	ax, dx, 123
+# CHECK: {evex}	sbb	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xd9,0x7b]
+         {evex}	sbb	ecx, 123
+# CHECK: sbb	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xd9,0x7b]
+         sbb	edx, ecx, 123
+# CHECK: {evex}	sbb	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xd9,0x7b]
+         {evex}	sbb	r9, 123
+# CHECK: sbb	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xd9,0x7b]
+         sbb	r15, r9, 123
+# CHECK: {evex}	sbb	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbb	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: sbb	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbb	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sbb	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbb	word ptr [r8 + 4*rax + 291], 123
+# CHECK: sbb	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbb	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: sbb	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbb	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: sbb	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0x9c,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sbb	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sbb	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xda,0xd2,0x04]
+         {evex}	sbb	dx, 1234
+# CHECK: sbb	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xda,0xd2,0x04]
+         sbb	ax, dx, 1234
+# CHECK: {evex}	sbb	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	sbb	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: sbb	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         sbb	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	sbb	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         {evex}	sbb	ecx, 123456
+# CHECK: sbb	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         sbb	edx, ecx, 123456
+# CHECK: {evex}	sbb	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         {evex}	sbb	r9, 123456
+# CHECK: sbb	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xd9,0x40,0xe2,0x01,0x00]
+         sbb	r15, r9, 123456
+# CHECK: {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sbb	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: sbb	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sbb	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sbb	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: sbb	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0x9c,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sbb	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	sbb	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x18,0xd9]
+         {evex}	sbb	cl, bl
+# CHECK: sbb	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x18,0xd9]
+         sbb	r8b, cl, bl
+# CHECK: {evex}	sbb	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x18,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: sbb	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x18,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sbb	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	sbb	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x19,0xd0]
+         {evex}	sbb	ax, dx
+# CHECK: sbb	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x19,0xd0]
+         sbb	r9w, ax, dx
+# CHECK: {evex}	sbb	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x19,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	word ptr [r8 + 4*rax + 291], dx
+# CHECK: sbb	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x19,0x94,0x80,0x23,0x01,0x00,0x00]
+         sbb	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	sbb	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x19,0xca]
+         {evex}	sbb	edx, ecx
+# CHECK: sbb	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x19,0xca]
+         sbb	r10d, edx, ecx
+# CHECK: {evex}	sbb	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: sbb	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbb	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	sbb	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x19,0xcf]
+         {evex}	sbb	r15, r9
+# CHECK: sbb	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x19,0xcf]
+         sbb	r11, r15, r9
+# CHECK: {evex}	sbb	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: sbb	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x19,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbb	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	sbb	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: sbb	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x1a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sbb	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sbb	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x1b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: sbb	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x1b,0x94,0x80,0x23,0x01,0x00,0x00]
+         sbb	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sbb	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: sbb	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbb	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sbb	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sbb	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: sbb	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x1b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sbb	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/sub-att.s b/llvm/test/MC/X86/apx/sub-att.s
new file mode 100644
index 00000000000000..4c12a35b0bc2ad
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sub-att.s
@@ -0,0 +1,317 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-104: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	subb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xeb,0x7b]
+         {evex}	subb	$123, %bl
+# CHECK: {nf}	subb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xeb,0x7b]
+         {nf}	subb	$123, %bl
+# CHECK: subb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xeb,0x7b]
+         subb	$123, %bl, %cl
+# CHECK: {nf}	subb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xeb,0x7b]
+         {nf}	subb	$123, %bl, %cl
+# CHECK: {evex}	subw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xea,0x7b]
+         {evex}	subw	$123, %dx
+# CHECK: {nf}	subw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xea,0x7b]
+         {nf}	subw	$123, %dx
+# CHECK: subw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xea,0x7b]
+         subw	$123, %dx, %ax
+# CHECK: {nf}	subw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xea,0x7b]
+         {nf}	subw	$123, %dx, %ax
+# CHECK: {evex}	subl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xe9,0x7b]
+         {evex}	subl	$123, %ecx
+# CHECK: {nf}	subl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xe9,0x7b]
+         {nf}	subl	$123, %ecx
+# CHECK: subl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xe9,0x7b]
+         subl	$123, %ecx, %edx
+# CHECK: {nf}	subl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xe9,0x7b]
+         {nf}	subl	$123, %ecx, %edx
+# CHECK: {evex}	subq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xe9,0x7b]
+         {evex}	subq	$123, %r9
+# CHECK: {nf}	subq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xe9,0x7b]
+         {nf}	subq	$123, %r9
+# CHECK: subq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xe9,0x7b]
+         subq	$123, %r9, %r15
+# CHECK: {nf}	subq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xe9,0x7b]
+         {nf}	subq	$123, %r9, %r15
+# CHECK: {evex}	subb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	subb	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	subb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subb	$123, 291(%r8,%rax,4)
+# CHECK: subb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         subb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {nf}	subb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	subw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	subw	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	subw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subw	$123, 291(%r8,%rax,4)
+# CHECK: subw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         subw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	subw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	subl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	subl	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	subl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subl	$123, 291(%r8,%rax,4)
+# CHECK: subl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         subl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	subl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	subq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	subq	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	subq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subq	$123, 291(%r8,%rax,4)
+# CHECK: subq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         subq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	subq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	subq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	subw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xea,0xd2,0x04]
+         {evex}	subw	$1234, %dx
+# CHECK: {nf}	subw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xea,0xd2,0x04]
+         {nf}	subw	$1234, %dx
+# CHECK: subw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xea,0xd2,0x04]
+         subw	$1234, %dx, %ax
+# CHECK: {nf}	subw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xea,0xd2,0x04]
+         {nf}	subw	$1234, %dx, %ax
+# CHECK: {evex}	subw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	subw	$1234, 291(%r8,%rax,4)
+# CHECK: {nf}	subw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	subw	$1234, 291(%r8,%rax,4)
+# CHECK: subw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         subw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	subw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	subw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	subl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {evex}	subl	$123456, %ecx
+# CHECK: {nf}	subl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	subl	$123456, %ecx
+# CHECK: subl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         subl	$123456, %ecx, %edx
+# CHECK: {nf}	subl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	subl	$123456, %ecx, %edx
+# CHECK: {evex}	subq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {evex}	subq	$123456, %r9
+# CHECK: {nf}	subq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	subq	$123456, %r9
+# CHECK: subq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         subq	$123456, %r9, %r15
+# CHECK: {nf}	subq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	subq	$123456, %r9, %r15
+# CHECK: {evex}	subl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	subl	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	subl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	subl	$123456, 291(%r8,%rax,4)
+# CHECK: subl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         subl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	subl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	subl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	subq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	subq	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	subq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	subq	$123456, 291(%r8,%rax,4)
+# CHECK: subq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         subq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	subq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	subq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	subb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x28,0xd9]
+         {evex}	subb	%bl, %cl
+# CHECK: {nf}	subb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x28,0xd9]
+         {nf}	subb	%bl, %cl
+# CHECK: subb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x28,0xd9]
+         subb	%bl, %cl, %r8b
+# CHECK: {nf}	subb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x28,0xd9]
+         {nf}	subb	%bl, %cl, %r8b
+# CHECK: {evex}	subb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subb	%bl, 291(%r8,%rax,4)
+# CHECK: {nf}	subb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subb	%bl, 291(%r8,%rax,4)
+# CHECK: subb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         subb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {nf}	subb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	subw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x29,0xd0]
+         {evex}	subw	%dx, %ax
+# CHECK: {nf}	subw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x29,0xd0]
+         {nf}	subw	%dx, %ax
+# CHECK: subw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x29,0xd0]
+         subw	%dx, %ax, %r9w
+# CHECK: {nf}	subw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x29,0xd0]
+         {nf}	subw	%dx, %ax, %r9w
+# CHECK: {evex}	subw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subw	%dx, 291(%r8,%rax,4)
+# CHECK: {nf}	subw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subw	%dx, 291(%r8,%rax,4)
+# CHECK: subw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         subw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {nf}	subw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	subl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x29,0xca]
+         {evex}	subl	%ecx, %edx
+# CHECK: {nf}	subl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x29,0xca]
+         {nf}	subl	%ecx, %edx
+# CHECK: subl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x29,0xca]
+         subl	%ecx, %edx, %r10d
+# CHECK: {nf}	subl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x29,0xca]
+         {nf}	subl	%ecx, %edx, %r10d
+# CHECK: {evex}	subl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subl	%ecx, 291(%r8,%rax,4)
+# CHECK: {nf}	subl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subl	%ecx, 291(%r8,%rax,4)
+# CHECK: subl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         subl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {nf}	subl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	subq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x29,0xcf]
+         {evex}	subq	%r9, %r15
+# CHECK: {nf}	subq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x29,0xcf]
+         {nf}	subq	%r9, %r15
+# CHECK: subq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x29,0xcf]
+         subq	%r9, %r15, %r11
+# CHECK: {nf}	subq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x29,0xcf]
+         {nf}	subq	%r9, %r15, %r11
+# CHECK: {evex}	subq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subq	%r9, 291(%r8,%rax,4)
+# CHECK: {nf}	subq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subq	%r9, 291(%r8,%rax,4)
+# CHECK: subq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         subq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {nf}	subq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	subb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	subb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subb	291(%r8,%rax,4), %bl
+# CHECK: subb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         subb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {nf}	subb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	subw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	subw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subw	291(%r8,%rax,4), %dx
+# CHECK: subw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         subw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {nf}	subw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	subl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	subl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subl	291(%r8,%rax,4), %ecx
+# CHECK: subl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         subl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {nf}	subl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	subq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	subq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	subq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subq	291(%r8,%rax,4), %r9
+# CHECK: subq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         subq	291(%r8,%rax,4), %r9, %r15
+# CHECK: {nf}	subq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	subq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/sub-intel.s b/llvm/test/MC/X86/apx/sub-intel.s
new file mode 100644
index 00000000000000..b66fa613d1057d
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sub-intel.s
@@ -0,0 +1,314 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	sub	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xeb,0x7b]
+         {evex}	sub	bl, 123
+# CHECK: {nf}	sub	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xeb,0x7b]
+         {nf}	sub	bl, 123
+# CHECK: sub	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xeb,0x7b]
+         sub	cl, bl, 123
+# CHECK: {nf}	sub	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xeb,0x7b]
+         {nf}	sub	cl, bl, 123
+# CHECK: {evex}	sub	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xea,0x7b]
+         {evex}	sub	dx, 123
+# CHECK: {nf}	sub	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xea,0x7b]
+         {nf}	sub	dx, 123
+# CHECK: sub	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xea,0x7b]
+         sub	ax, dx, 123
+# CHECK: {nf}	sub	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xea,0x7b]
+         {nf}	sub	ax, dx, 123
+# CHECK: {evex}	sub	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xe9,0x7b]
+         {evex}	sub	ecx, 123
+# CHECK: {nf}	sub	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xe9,0x7b]
+         {nf}	sub	ecx, 123
+# CHECK: sub	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xe9,0x7b]
+         sub	edx, ecx, 123
+# CHECK: {nf}	sub	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xe9,0x7b]
+         {nf}	sub	edx, ecx, 123
+# CHECK: {evex}	sub	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xe9,0x7b]
+         {evex}	sub	r9, 123
+# CHECK: {nf}	sub	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xe9,0x7b]
+         {nf}	sub	r9, 123
+# CHECK: sub	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xe9,0x7b]
+         sub	r15, r9, 123
+# CHECK: {nf}	sub	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xe9,0x7b]
+         {nf}	sub	r15, r9, 123
+# CHECK: {evex}	sub	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sub	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: sub	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sub	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sub	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sub	word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	word ptr [r8 + 4*rax + 291], 123
+# CHECK: sub	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sub	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sub	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sub	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sub	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	sub	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: sub	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         sub	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xac,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	sub	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xea,0xd2,0x04]
+         {evex}	sub	dx, 1234
+# CHECK: {nf}	sub	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xea,0xd2,0x04]
+         {nf}	sub	dx, 1234
+# CHECK: sub	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xea,0xd2,0x04]
+         sub	ax, dx, 1234
+# CHECK: {nf}	sub	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xea,0xd2,0x04]
+         {nf}	sub	ax, dx, 1234
+# CHECK: {evex}	sub	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	sub	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	sub	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	sub	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: sub	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         sub	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	sub	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	sub	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {evex}	sub	ecx, 123456
+# CHECK: {nf}	sub	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	sub	ecx, 123456
+# CHECK: sub	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         sub	edx, ecx, 123456
+# CHECK: {nf}	sub	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	sub	edx, ecx, 123456
+# CHECK: {evex}	sub	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {evex}	sub	r9, 123456
+# CHECK: {nf}	sub	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	sub	r9, 123456
+# CHECK: sub	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         sub	r15, r9, 123456
+# CHECK: {nf}	sub	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xe9,0x40,0xe2,0x01,0x00]
+         {nf}	sub	r15, r9, 123456
+# CHECK: {evex}	sub	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sub	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	sub	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	sub	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	sub	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	sub	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	sub	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	sub	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xac,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	sub	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	sub	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x28,0xd9]
+         {evex}	sub	cl, bl
+# CHECK: {nf}	sub	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x28,0xd9]
+         {nf}	sub	cl, bl
+# CHECK: sub	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x28,0xd9]
+         sub	r8b, cl, bl
+# CHECK: {nf}	sub	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x28,0xd9]
+         {nf}	sub	r8b, cl, bl
+# CHECK: {evex}	sub	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	sub	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: sub	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sub	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	sub	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x28,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	sub	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x29,0xd0]
+         {evex}	sub	ax, dx
+# CHECK: {nf}	sub	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x29,0xd0]
+         {nf}	sub	ax, dx
+# CHECK: sub	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x29,0xd0]
+         sub	r9w, ax, dx
+# CHECK: {nf}	sub	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x29,0xd0]
+         {nf}	sub	r9w, ax, dx
+# CHECK: {evex}	sub	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	sub	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	word ptr [r8 + 4*rax + 291], dx
+# CHECK: sub	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         sub	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	sub	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x29,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	sub	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x29,0xca]
+         {evex}	sub	edx, ecx
+# CHECK: {nf}	sub	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x29,0xca]
+         {nf}	sub	edx, ecx
+# CHECK: sub	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x29,0xca]
+         sub	r10d, edx, ecx
+# CHECK: {nf}	sub	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x29,0xca]
+         {nf}	sub	r10d, edx, ecx
+# CHECK: {evex}	sub	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	sub	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	sub	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x29,0xcf]
+         {evex}	sub	r15, r9
+# CHECK: {nf}	sub	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x29,0xcf]
+         {nf}	sub	r15, r9
+# CHECK: sub	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x29,0xcf]
+         sub	r11, r15, r9
+# CHECK: {nf}	sub	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x29,0xcf]
+         {nf}	sub	r11, r15, r9
+# CHECK: {evex}	sub	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	sub	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: sub	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sub	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	sub	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x29,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	sub	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x2a,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sub	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: sub	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         sub	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x2b,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	sub	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	sub	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: sub	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         sub	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	sub	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x2b,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	sub	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/xor-att.s b/llvm/test/MC/X86/apx/xor-att.s
new file mode 100644
index 00000000000000..509cf5b86fe962
--- /dev/null
+++ b/llvm/test/MC/X86/apx/xor-att.s
@@ -0,0 +1,317 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-104: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	xorb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xf3,0x7b]
+         {evex}	xorb	$123, %bl
+# CHECK: {nf}	xorb	$123, %bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xf3,0x7b]
+         {nf}	xorb	$123, %bl
+# CHECK: xorb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xf3,0x7b]
+         xorb	$123, %bl, %cl
+# CHECK: {nf}	xorb	$123, %bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xf3,0x7b]
+         {nf}	xorb	$123, %bl, %cl
+# CHECK: {evex}	xorw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xf2,0x7b]
+         {evex}	xorw	$123, %dx
+# CHECK: {nf}	xorw	$123, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xf2,0x7b]
+         {nf}	xorw	$123, %dx
+# CHECK: xorw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xf2,0x7b]
+         xorw	$123, %dx, %ax
+# CHECK: {nf}	xorw	$123, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xf2,0x7b]
+         {nf}	xorw	$123, %dx, %ax
+# CHECK: {evex}	xorl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xf1,0x7b]
+         {evex}	xorl	$123, %ecx
+# CHECK: {nf}	xorl	$123, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xf1,0x7b]
+         {nf}	xorl	$123, %ecx
+# CHECK: xorl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xf1,0x7b]
+         xorl	$123, %ecx, %edx
+# CHECK: {nf}	xorl	$123, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xf1,0x7b]
+         {nf}	xorl	$123, %ecx, %edx
+# CHECK: {evex}	xorq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xf1,0x7b]
+         {evex}	xorq	$123, %r9
+# CHECK: {nf}	xorq	$123, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xf1,0x7b]
+         {nf}	xorq	$123, %r9
+# CHECK: xorq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xf1,0x7b]
+         xorq	$123, %r9, %r15
+# CHECK: {nf}	xorq	$123, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xf1,0x7b]
+         {nf}	xorq	$123, %r9, %r15
+# CHECK: {evex}	xorb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xorb	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	xorb	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorb	$123, 291(%r8,%rax,4)
+# CHECK: xorb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xorb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {nf}	xorb	$123, 291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorb	$123, 291(%r8,%rax,4), %bl
+# CHECK: {evex}	xorw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xorw	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	xorw	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorw	$123, 291(%r8,%rax,4)
+# CHECK: xorw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xorw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	xorw	$123, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorw	$123, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	xorl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xorl	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	xorl	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorl	$123, 291(%r8,%rax,4)
+# CHECK: xorl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xorl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	xorl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorl	$123, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	xorq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xorq	$123, 291(%r8,%rax,4)
+# CHECK: {nf}	xorq	$123, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorq	$123, 291(%r8,%rax,4)
+# CHECK: xorq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xorq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	xorq	$123, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xorq	$123, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	xorw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xf2,0xd2,0x04]
+         {evex}	xorw	$1234, %dx
+# CHECK: {nf}	xorw	$1234, %dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xf2,0xd2,0x04]
+         {nf}	xorw	$1234, %dx
+# CHECK: xorw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xf2,0xd2,0x04]
+         xorw	$1234, %dx, %ax
+# CHECK: {nf}	xorw	$1234, %dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xf2,0xd2,0x04]
+         {nf}	xorw	$1234, %dx, %ax
+# CHECK: {evex}	xorw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	xorw	$1234, 291(%r8,%rax,4)
+# CHECK: {nf}	xorw	$1234, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	xorw	$1234, 291(%r8,%rax,4)
+# CHECK: xorw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         xorw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {nf}	xorw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	xorw	$1234, 291(%r8,%rax,4), %dx
+# CHECK: {evex}	xorl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {evex}	xorl	$123456, %ecx
+# CHECK: {nf}	xorl	$123456, %ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xorl	$123456, %ecx
+# CHECK: xorl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         xorl	$123456, %ecx, %edx
+# CHECK: {nf}	xorl	$123456, %ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xorl	$123456, %ecx, %edx
+# CHECK: {evex}	xorq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {evex}	xorq	$123456, %r9
+# CHECK: {nf}	xorq	$123456, %r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xorq	$123456, %r9
+# CHECK: xorq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         xorq	$123456, %r9, %r15
+# CHECK: {nf}	xorq	$123456, %r9, %r15
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xorq	$123456, %r9, %r15
+# CHECK: {evex}	xorl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	xorl	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	xorl	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xorl	$123456, 291(%r8,%rax,4)
+# CHECK: xorl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         xorl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {nf}	xorl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xorl	$123456, 291(%r8,%rax,4), %ecx
+# CHECK: {evex}	xorq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	xorq	$123456, 291(%r8,%rax,4)
+# CHECK: {nf}	xorq	$123456, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xorq	$123456, 291(%r8,%rax,4)
+# CHECK: xorq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         xorq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {nf}	xorq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xorq	$123456, 291(%r8,%rax,4), %r9
+# CHECK: {evex}	xorb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x30,0xd9]
+         {evex}	xorb	%bl, %cl
+# CHECK: {nf}	xorb	%bl, %cl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x30,0xd9]
+         {nf}	xorb	%bl, %cl
+# CHECK: xorb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x30,0xd9]
+         xorb	%bl, %cl, %r8b
+# CHECK: {nf}	xorb	%bl, %cl, %r8b
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x30,0xd9]
+         {nf}	xorb	%bl, %cl, %r8b
+# CHECK: {evex}	xorb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorb	%bl, 291(%r8,%rax,4)
+# CHECK: {nf}	xorb	%bl, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorb	%bl, 291(%r8,%rax,4)
+# CHECK: xorb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         xorb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {nf}	xorb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorb	%bl, 291(%r8,%rax,4), %cl
+# CHECK: {evex}	xorw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x31,0xd0]
+         {evex}	xorw	%dx, %ax
+# CHECK: {nf}	xorw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x31,0xd0]
+         {nf}	xorw	%dx, %ax
+# CHECK: xorw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x31,0xd0]
+         xorw	%dx, %ax, %r9w
+# CHECK: {nf}	xorw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x31,0xd0]
+         {nf}	xorw	%dx, %ax, %r9w
+# CHECK: {evex}	xorw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorw	%dx, 291(%r8,%rax,4)
+# CHECK: {nf}	xorw	%dx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorw	%dx, 291(%r8,%rax,4)
+# CHECK: xorw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         xorw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {nf}	xorw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorw	%dx, 291(%r8,%rax,4), %ax
+# CHECK: {evex}	xorl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x31,0xca]
+         {evex}	xorl	%ecx, %edx
+# CHECK: {nf}	xorl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x31,0xca]
+         {nf}	xorl	%ecx, %edx
+# CHECK: xorl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x31,0xca]
+         xorl	%ecx, %edx, %r10d
+# CHECK: {nf}	xorl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x31,0xca]
+         {nf}	xorl	%ecx, %edx, %r10d
+# CHECK: {evex}	xorl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorl	%ecx, 291(%r8,%rax,4)
+# CHECK: {nf}	xorl	%ecx, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorl	%ecx, 291(%r8,%rax,4)
+# CHECK: xorl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xorl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {nf}	xorl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorl	%ecx, 291(%r8,%rax,4), %edx
+# CHECK: {evex}	xorq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x31,0xcf]
+         {evex}	xorq	%r9, %r15
+# CHECK: {nf}	xorq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x31,0xcf]
+         {nf}	xorq	%r9, %r15
+# CHECK: xorq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x31,0xcf]
+         xorq	%r9, %r15, %r11
+# CHECK: {nf}	xorq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x31,0xcf]
+         {nf}	xorq	%r9, %r15, %r11
+# CHECK: {evex}	xorq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorq	%r9, 291(%r8,%rax,4)
+# CHECK: {nf}	xorq	%r9, 291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorq	%r9, 291(%r8,%rax,4)
+# CHECK: xorq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xorq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {nf}	xorq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorq	%r9, 291(%r8,%rax,4), %r15
+# CHECK: {evex}	xorb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	xorb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorb	291(%r8,%rax,4), %bl
+# CHECK: xorb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         xorb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {nf}	xorb	291(%r8,%rax,4), %bl, %cl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorb	291(%r8,%rax,4), %bl, %cl
+# CHECK: {evex}	xorw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	xorw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorw	291(%r8,%rax,4), %dx
+# CHECK: xorw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         xorw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {nf}	xorw	291(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorw	291(%r8,%rax,4), %dx, %ax
+# CHECK: {evex}	xorl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	xorl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorl	291(%r8,%rax,4), %ecx
+# CHECK: xorl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xorl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {nf}	xorl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorl	291(%r8,%rax,4), %ecx, %edx
+# CHECK: {evex}	xorq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xorq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	xorq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorq	291(%r8,%rax,4), %r9
+# CHECK: xorq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xorq	291(%r8,%rax,4), %r9, %r15
+# CHECK: {nf}	xorq	291(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xorq	291(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/xor-intel.s b/llvm/test/MC/X86/apx/xor-intel.s
new file mode 100644
index 00000000000000..8b2e29a3523925
--- /dev/null
+++ b/llvm/test/MC/X86/apx/xor-intel.s
@@ -0,0 +1,314 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	xor	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x80,0xf3,0x7b]
+         {evex}	xor	bl, 123
+# CHECK: {nf}	xor	bl, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x80,0xf3,0x7b]
+         {nf}	xor	bl, 123
+# CHECK: xor	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0x80,0xf3,0x7b]
+         xor	cl, bl, 123
+# CHECK: {nf}	xor	cl, bl, 123
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0x80,0xf3,0x7b]
+         {nf}	xor	cl, bl, 123
+# CHECK: {evex}	xor	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x83,0xf2,0x7b]
+         {evex}	xor	dx, 123
+# CHECK: {nf}	xor	dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x83,0xf2,0x7b]
+         {nf}	xor	dx, 123
+# CHECK: xor	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x83,0xf2,0x7b]
+         xor	ax, dx, 123
+# CHECK: {nf}	xor	ax, dx, 123
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xf2,0x7b]
+         {nf}	xor	ax, dx, 123
+# CHECK: {evex}	xor	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x83,0xf1,0x7b]
+         {evex}	xor	ecx, 123
+# CHECK: {nf}	xor	ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x83,0xf1,0x7b]
+         {nf}	xor	ecx, 123
+# CHECK: xor	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x83,0xf1,0x7b]
+         xor	edx, ecx, 123
+# CHECK: {nf}	xor	edx, ecx, 123
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x83,0xf1,0x7b]
+         {nf}	xor	edx, ecx, 123
+# CHECK: {evex}	xor	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xf1,0x7b]
+         {evex}	xor	r9, 123
+# CHECK: {nf}	xor	r9, 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xf1,0x7b]
+         {nf}	xor	r9, 123
+# CHECK: xor	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x83,0xf1,0x7b]
+         xor	r15, r9, 123
+# CHECK: {nf}	xor	r15, r9, 123
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x83,0xf1,0x7b]
+         {nf}	xor	r15, r9, 123
+# CHECK: {evex}	xor	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xor	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	byte ptr [r8 + 4*rax + 291], 123
+# CHECK: xor	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xor	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0x80,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	bl, byte ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	xor	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xor	word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	word ptr [r8 + 4*rax + 291], 123
+# CHECK: xor	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xor	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	xor	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xor	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	dword ptr [r8 + 4*rax + 291], 123
+# CHECK: xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	xor	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {evex}	xor	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	qword ptr [r8 + 4*rax + 291], 123
+# CHECK: xor	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         xor	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x83,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b]
+         {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123
+# CHECK: {evex}	xor	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x81,0xf2,0xd2,0x04]
+         {evex}	xor	dx, 1234
+# CHECK: {nf}	xor	dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x81,0xf2,0xd2,0x04]
+         {nf}	xor	dx, 1234
+# CHECK: xor	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x81,0xf2,0xd2,0x04]
+         xor	ax, dx, 1234
+# CHECK: {nf}	xor	ax, dx, 1234
+# CHECK: encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xf2,0xd2,0x04]
+         {nf}	xor	ax, dx, 1234
+# CHECK: {evex}	xor	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {evex}	xor	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	xor	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	xor	word ptr [r8 + 4*rax + 291], 1234
+# CHECK: xor	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         xor	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0xd2,0x04]
+         {nf}	xor	dx, word ptr [r8 + 4*rax + 291], 1234
+# CHECK: {evex}	xor	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {evex}	xor	ecx, 123456
+# CHECK: {nf}	xor	ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xor	ecx, 123456
+# CHECK: xor	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         xor	edx, ecx, 123456
+# CHECK: {nf}	xor	edx, ecx, 123456
+# CHECK: encoding: [0x62,0xf4,0x6c,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xor	edx, ecx, 123456
+# CHECK: {evex}	xor	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {evex}	xor	r9, 123456
+# CHECK: {nf}	xor	r9, 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xor	r9, 123456
+# CHECK: xor	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x18,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         xor	r15, r9, 123456
+# CHECK: {nf}	xor	r15, r9, 123456
+# CHECK: encoding: [0x62,0xd4,0x84,0x1c,0x81,0xf1,0x40,0xe2,0x01,0x00]
+         {nf}	xor	r15, r9, 123456
+# CHECK: {evex}	xor	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	xor	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	xor	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xor	dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	xor	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {evex}	xor	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	xor	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xor	qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0x81,0xb4,0x80,0x23,0x01,0x00,0x00,0x40,0xe2,0x01,0x00]
+         {nf}	xor	r9, qword ptr [r8 + 4*rax + 291], 123456
+# CHECK: {evex}	xor	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x30,0xd9]
+         {evex}	xor	cl, bl
+# CHECK: {nf}	xor	cl, bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x30,0xd9]
+         {nf}	xor	cl, bl
+# CHECK: xor	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x18,0x30,0xd9]
+         xor	r8b, cl, bl
+# CHECK: {nf}	xor	r8b, cl, bl
+# CHECK: encoding: [0x62,0xf4,0x3c,0x1c,0x30,0xd9]
+         {nf}	xor	r8b, cl, bl
+# CHECK: {evex}	xor	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	xor	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	byte ptr [r8 + 4*rax + 291], bl
+# CHECK: xor	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         xor	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {nf}	xor	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x30,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	cl, byte ptr [r8 + 4*rax + 291], bl
+# CHECK: {evex}	xor	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x31,0xd0]
+         {evex}	xor	ax, dx
+# CHECK: {nf}	xor	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0x31,0xd0]
+         {nf}	xor	ax, dx
+# CHECK: xor	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x31,0xd0]
+         xor	r9w, ax, dx
+# CHECK: {nf}	xor	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x31,0xd0]
+         {nf}	xor	r9w, ax, dx
+# CHECK: {evex}	xor	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	xor	word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	word ptr [r8 + 4*rax + 291], dx
+# CHECK: xor	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         xor	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {nf}	xor	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x31,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	ax, word ptr [r8 + 4*rax + 291], dx
+# CHECK: {evex}	xor	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x31,0xca]
+         {evex}	xor	edx, ecx
+# CHECK: {nf}	xor	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0x31,0xca]
+         {nf}	xor	edx, ecx
+# CHECK: xor	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x31,0xca]
+         xor	r10d, edx, ecx
+# CHECK: {nf}	xor	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x31,0xca]
+         {nf}	xor	r10d, edx, ecx
+# CHECK: {evex}	xor	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	xor	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {nf}	xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	edx, dword ptr [r8 + 4*rax + 291], ecx
+# CHECK: {evex}	xor	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x31,0xcf]
+         {evex}	xor	r15, r9
+# CHECK: {nf}	xor	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x31,0xcf]
+         {nf}	xor	r15, r9
+# CHECK: xor	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x31,0xcf]
+         xor	r11, r15, r9
+# CHECK: {nf}	xor	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x31,0xcf]
+         {nf}	xor	r11, r15, r9
+# CHECK: {evex}	xor	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	xor	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	qword ptr [r8 + 4*rax + 291], r9
+# CHECK: xor	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xor	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {nf}	xor	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x31,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	r15, qword ptr [r8 + 4*rax + 291], r9
+# CHECK: {evex}	xor	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0x32,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	cl, bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	xor	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: xor	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         xor	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x33,0x94,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	ax, dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	edx, ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	xor	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	xor	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: xor	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         xor	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	xor	r15, r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x33,0x8c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	xor	r15, r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 4f957d104d8dd1..54eed0286c779d 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -21,28 +21,50 @@ static const X86FoldTableEntry Table2Addr[] = {
   {X86::ADC8rr, X86::ADC8mr, TB_NO_REVERSE},
   {X86::ADD16ri, X86::ADD16mi, TB_NO_REVERSE},
   {X86::ADD16ri8, X86::ADD16mi8, TB_NO_REVERSE},
+  {X86::ADD16ri8_NF, X86::ADD16mi8_NF, TB_NO_REVERSE},
+  {X86::ADD16ri_NF, X86::ADD16mi_NF, TB_NO_REVERSE},
   {X86::ADD16rr, X86::ADD16mr, TB_NO_REVERSE},
+  {X86::ADD16rr_NF, X86::ADD16mr_NF, TB_NO_REVERSE},
   {X86::ADD32ri, X86::ADD32mi, TB_NO_REVERSE},
   {X86::ADD32ri8, X86::ADD32mi8, TB_NO_REVERSE},
+  {X86::ADD32ri8_NF, X86::ADD32mi8_NF, TB_NO_REVERSE},
+  {X86::ADD32ri_NF, X86::ADD32mi_NF, TB_NO_REVERSE},
   {X86::ADD32rr, X86::ADD32mr, TB_NO_REVERSE},
+  {X86::ADD32rr_NF, X86::ADD32mr_NF, TB_NO_REVERSE},
   {X86::ADD64ri32, X86::ADD64mi32, TB_NO_REVERSE},
   {X86::ADD64ri8, X86::ADD64mi8, TB_NO_REVERSE},
+  {X86::ADD64ri8_NF, X86::ADD64mi8_NF, TB_NO_REVERSE},
+  {X86::ADD64ri_NF, X86::ADD64mi32_NF, TB_NO_REVERSE},
   {X86::ADD64rr, X86::ADD64mr, TB_NO_REVERSE},
+  {X86::ADD64rr_NF, X86::ADD64mr_NF, TB_NO_REVERSE},
   {X86::ADD8ri, X86::ADD8mi, TB_NO_REVERSE},
   {X86::ADD8ri8, X86::ADD8mi8, TB_NO_REVERSE},
+  {X86::ADD8ri_NF, X86::ADD8mi_NF, TB_NO_REVERSE},
   {X86::ADD8rr, X86::ADD8mr, TB_NO_REVERSE},
+  {X86::ADD8rr_NF, X86::ADD8mr_NF, TB_NO_REVERSE},
   {X86::AND16ri, X86::AND16mi, TB_NO_REVERSE},
   {X86::AND16ri8, X86::AND16mi8, TB_NO_REVERSE},
+  {X86::AND16ri8_NF, X86::AND16mi8_NF, TB_NO_REVERSE},
+  {X86::AND16ri_NF, X86::AND16mi_NF, TB_NO_REVERSE},
   {X86::AND16rr, X86::AND16mr, TB_NO_REVERSE},
+  {X86::AND16rr_NF, X86::AND16mr_NF, TB_NO_REVERSE},
   {X86::AND32ri, X86::AND32mi, TB_NO_REVERSE},
   {X86::AND32ri8, X86::AND32mi8, TB_NO_REVERSE},
+  {X86::AND32ri8_NF, X86::AND32mi8_NF, TB_NO_REVERSE},
+  {X86::AND32ri_NF, X86::AND32mi_NF, TB_NO_REVERSE},
   {X86::AND32rr, X86::AND32mr, TB_NO_REVERSE},
+  {X86::AND32rr_NF, X86::AND32mr_NF, TB_NO_REVERSE},
   {X86::AND64ri32, X86::AND64mi32, TB_NO_REVERSE},
   {X86::AND64ri8, X86::AND64mi8, TB_NO_REVERSE},
+  {X86::AND64ri8_NF, X86::AND64mi8_NF, TB_NO_REVERSE},
+  {X86::AND64ri_NF, X86::AND64mi32_NF, TB_NO_REVERSE},
   {X86::AND64rr, X86::AND64mr, TB_NO_REVERSE},
+  {X86::AND64rr_NF, X86::AND64mr_NF, TB_NO_REVERSE},
   {X86::AND8ri, X86::AND8mi, TB_NO_REVERSE},
   {X86::AND8ri8, X86::AND8mi8, TB_NO_REVERSE},
+  {X86::AND8ri_NF, X86::AND8mi_NF, TB_NO_REVERSE},
   {X86::AND8rr, X86::AND8mr, TB_NO_REVERSE},
+  {X86::AND8rr_NF, X86::AND8mr_NF, TB_NO_REVERSE},
   {X86::BTC16ri8, X86::BTC16mi8, TB_NO_REVERSE},
   {X86::BTC32ri8, X86::BTC32mi8, TB_NO_REVERSE},
   {X86::BTC64ri8, X86::BTC64mi8, TB_NO_REVERSE},
@@ -70,16 +92,27 @@ static const X86FoldTableEntry Table2Addr[] = {
   {X86::NOT8r, X86::NOT8m, TB_NO_REVERSE},
   {X86::OR16ri, X86::OR16mi, TB_NO_REVERSE},
   {X86::OR16ri8, X86::OR16mi8, TB_NO_REVERSE},
+  {X86::OR16ri8_NF, X86::OR16mi8_NF, TB_NO_REVERSE},
+  {X86::OR16ri_NF, X86::OR16mi_NF, TB_NO_REVERSE},
   {X86::OR16rr, X86::OR16mr, TB_NO_REVERSE},
+  {X86::OR16rr_NF, X86::OR16mr_NF, TB_NO_REVERSE},
   {X86::OR32ri, X86::OR32mi, TB_NO_REVERSE},
   {X86::OR32ri8, X86::OR32mi8, TB_NO_REVERSE},
+  {X86::OR32ri8_NF, X86::OR32mi8_NF, TB_NO_REVERSE},
+  {X86::OR32ri_NF, X86::OR32mi_NF, TB_NO_REVERSE},
   {X86::OR32rr, X86::OR32mr, TB_NO_REVERSE},
+  {X86::OR32rr_NF, X86::OR32mr_NF, TB_NO_REVERSE},
   {X86::OR64ri32, X86::OR64mi32, TB_NO_REVERSE},
   {X86::OR64ri8, X86::OR64mi8, TB_NO_REVERSE},
+  {X86::OR64ri8_NF, X86::OR64mi8_NF, TB_NO_REVERSE},
+  {X86::OR64ri_NF, X86::OR64mi32_NF, TB_NO_REVERSE},
   {X86::OR64rr, X86::OR64mr, TB_NO_REVERSE},
+  {X86::OR64rr_NF, X86::OR64mr_NF, TB_NO_REVERSE},
   {X86::OR8ri, X86::OR8mi, TB_NO_REVERSE},
   {X86::OR8ri8, X86::OR8mi8, TB_NO_REVERSE},
+  {X86::OR8ri_NF, X86::OR8mi_NF, TB_NO_REVERSE},
   {X86::OR8rr, X86::OR8mr, TB_NO_REVERSE},
+  {X86::OR8rr_NF, X86::OR8mr_NF, TB_NO_REVERSE},
   {X86::RCL16r1, X86::RCL16m1, TB_NO_REVERSE},
   {X86::RCL16rCL, X86::RCL16mCL, TB_NO_REVERSE},
   {X86::RCL16ri, X86::RCL16mi, TB_NO_REVERSE},
@@ -190,28 +223,50 @@ static const X86FoldTableEntry Table2Addr[] = {
   {X86::SHRD64rri8, X86::SHRD64mri8, TB_NO_REVERSE},
   {X86::SUB16ri, X86::SUB16mi, TB_NO_REVERSE},
   {X86::SUB16ri8, X86::SUB16mi8, TB_NO_REVERSE},
+  {X86::SUB16ri8_NF, X86::SUB16mi8_NF, TB_NO_REVERSE},
+  {X86::SUB16ri_NF, X86::SUB16mi_NF, TB_NO_REVERSE},
   {X86::SUB16rr, X86::SUB16mr, TB_NO_REVERSE},
+  {X86::SUB16rr_NF, X86::SUB16mr_NF, TB_NO_REVERSE},
   {X86::SUB32ri, X86::SUB32mi, TB_NO_REVERSE},
   {X86::SUB32ri8, X86::SUB32mi8, TB_NO_REVERSE},
+  {X86::SUB32ri8_NF, X86::SUB32mi8_NF, TB_NO_REVERSE},
+  {X86::SUB32ri_NF, X86::SUB32mi_NF, TB_NO_REVERSE},
   {X86::SUB32rr, X86::SUB32mr, TB_NO_REVERSE},
+  {X86::SUB32rr_NF, X86::SUB32mr_NF, TB_NO_REVERSE},
   {X86::SUB64ri32, X86::SUB64mi32, TB_NO_REVERSE},
   {X86::SUB64ri8, X86::SUB64mi8, TB_NO_REVERSE},
+  {X86::SUB64ri8_NF, X86::SUB64mi8_NF, TB_NO_REVERSE},
+  {X86::SUB64ri_NF, X86::SUB64mi32_NF, TB_NO_REVERSE},
   {X86::SUB64rr, X86::SUB64mr, TB_NO_REVERSE},
+  {X86::SUB64rr_NF, X86::SUB64mr_NF, TB_NO_REVERSE},
   {X86::SUB8ri, X86::SUB8mi, TB_NO_REVERSE},
   {X86::SUB8ri8, X86::SUB8mi8, TB_NO_REVERSE},
+  {X86::SUB8ri_NF, X86::SUB8mi_NF, TB_NO_REVERSE},
   {X86::SUB8rr, X86::SUB8mr, TB_NO_REVERSE},
+  {X86::SUB8rr_NF, X86::SUB8mr_NF, TB_NO_REVERSE},
   {X86::XOR16ri, X86::XOR16mi, TB_NO_REVERSE},
   {X86::XOR16ri8, X86::XOR16mi8, TB_NO_REVERSE},
+  {X86::XOR16ri8_NF, X86::XOR16mi8_NF, TB_NO_REVERSE},
+  {X86::XOR16ri_NF, X86::XOR16mi_NF, TB_NO_REVERSE},
   {X86::XOR16rr, X86::XOR16mr, TB_NO_REVERSE},
+  {X86::XOR16rr_NF, X86::XOR16mr_NF, TB_NO_REVERSE},
   {X86::XOR32ri, X86::XOR32mi, TB_NO_REVERSE},
   {X86::XOR32ri8, X86::XOR32mi8, TB_NO_REVERSE},
+  {X86::XOR32ri8_NF, X86::XOR32mi8_NF, TB_NO_REVERSE},
+  {X86::XOR32ri_NF, X86::XOR32mi_NF, TB_NO_REVERSE},
   {X86::XOR32rr, X86::XOR32mr, TB_NO_REVERSE},
+  {X86::XOR32rr_NF, X86::XOR32mr_NF, TB_NO_REVERSE},
   {X86::XOR64ri32, X86::XOR64mi32, TB_NO_REVERSE},
   {X86::XOR64ri8, X86::XOR64mi8, TB_NO_REVERSE},
+  {X86::XOR64ri8_NF, X86::XOR64mi8_NF, TB_NO_REVERSE},
+  {X86::XOR64ri_NF, X86::XOR64mi32_NF, TB_NO_REVERSE},
   {X86::XOR64rr, X86::XOR64mr, TB_NO_REVERSE},
+  {X86::XOR64rr_NF, X86::XOR64mr_NF, TB_NO_REVERSE},
   {X86::XOR8ri, X86::XOR8mi, TB_NO_REVERSE},
   {X86::XOR8ri8, X86::XOR8mi8, TB_NO_REVERSE},
+  {X86::XOR8ri_NF, X86::XOR8mi_NF, TB_NO_REVERSE},
   {X86::XOR8rr, X86::XOR8mr, TB_NO_REVERSE},
+  {X86::XOR8rr_NF, X86::XOR8mr_NF, TB_NO_REVERSE},
 };
 
 static const X86FoldTableEntry Table0[] = {
@@ -408,8 +463,63 @@ static const X86FoldTableEntry Table0[] = {
 };
 
 static const X86FoldTableEntry Table1[] = {
+  {X86::ADC16ri8_ND, X86::ADC16mi8_ND, 0},
+  {X86::ADC16ri_ND, X86::ADC16mi_ND, 0},
+  {X86::ADC16rr_ND, X86::ADC16mr_ND, 0},
+  {X86::ADC32ri8_ND, X86::ADC32mi8_ND, 0},
+  {X86::ADC32ri_ND, X86::ADC32mi_ND, 0},
+  {X86::ADC32rr_ND, X86::ADC32mr_ND, 0},
+  {X86::ADC64ri32_ND, X86::ADC64mi32_ND, 0},
+  {X86::ADC64ri8_ND, X86::ADC64mi8_ND, 0},
+  {X86::ADC64rr_ND, X86::ADC64mr_ND, 0},
+  {X86::ADC8ri_ND, X86::ADC8mi_ND, 0},
+  {X86::ADC8rr_ND, X86::ADC8mr_ND, 0},
+  {X86::ADD16ri8_ND, X86::ADD16mi8_ND, 0},
+  {X86::ADD16ri8_NF_ND, X86::ADD16mi8_NF_ND, 0},
+  {X86::ADD16ri_ND, X86::ADD16mi_ND, 0},
+  {X86::ADD16ri_NF_ND, X86::ADD16mi_NF_ND, 0},
+  {X86::ADD16rr_ND, X86::ADD16mr_ND, 0},
+  {X86::ADD16rr_NF_ND, X86::ADD16mr_NF_ND, 0},
+  {X86::ADD32ri8_ND, X86::ADD32mi8_ND, 0},
+  {X86::ADD32ri8_NF_ND, X86::ADD32mi8_NF_ND, 0},
+  {X86::ADD32ri_ND, X86::ADD32mi_ND, 0},
+  {X86::ADD32ri_NF_ND, X86::ADD32mi_NF_ND, 0},
+  {X86::ADD32rr_ND, X86::ADD32mr_ND, 0},
+  {X86::ADD32rr_NF_ND, X86::ADD32mr_NF_ND, 0},
+  {X86::ADD64ri32_ND, X86::ADD64mi32_ND, 0},
+  {X86::ADD64ri8_ND, X86::ADD64mi8_ND, 0},
+  {X86::ADD64ri8_NF_ND, X86::ADD64mi8_NF_ND, 0},
+  {X86::ADD64ri_NF_ND, X86::ADD64mi32_NF_ND, 0},
+  {X86::ADD64rr_ND, X86::ADD64mr_ND, 0},
+  {X86::ADD64rr_NF_ND, X86::ADD64mr_NF_ND, 0},
+  {X86::ADD8ri_ND, X86::ADD8mi_ND, 0},
+  {X86::ADD8ri_NF_ND, X86::ADD8mi_NF_ND, 0},
+  {X86::ADD8rr_ND, X86::ADD8mr_ND, 0},
+  {X86::ADD8rr_NF_ND, X86::ADD8mr_NF_ND, 0},
   {X86::AESIMCrr, X86::AESIMCrm, TB_ALIGN_16},
   {X86::AESKEYGENASSIST128rr, X86::AESKEYGENASSIST128rm, TB_ALIGN_16},
+  {X86::AND16ri8_ND, X86::AND16mi8_ND, 0},
+  {X86::AND16ri8_NF_ND, X86::AND16mi8_NF_ND, 0},
+  {X86::AND16ri_ND, X86::AND16mi_ND, 0},
+  {X86::AND16ri_NF_ND, X86::AND16mi_NF_ND, 0},
+  {X86::AND16rr_ND, X86::AND16mr_ND, 0},
+  {X86::AND16rr_NF_ND, X86::AND16mr_NF_ND, 0},
+  {X86::AND32ri8_ND, X86::AND32mi8_ND, 0},
+  {X86::AND32ri8_NF_ND, X86::AND32mi8_NF_ND, 0},
+  {X86::AND32ri_ND, X86::AND32mi_ND, 0},
+  {X86::AND32ri_NF_ND, X86::AND32mi_NF_ND, 0},
+  {X86::AND32rr_ND, X86::AND32mr_ND, 0},
+  {X86::AND32rr_NF_ND, X86::AND32mr_NF_ND, 0},
+  {X86::AND64ri32_ND, X86::AND64mi32_ND, 0},
+  {X86::AND64ri8_ND, X86::AND64mi8_ND, 0},
+  {X86::AND64ri8_NF_ND, X86::AND64mi8_NF_ND, 0},
+  {X86::AND64ri_NF_ND, X86::AND64mi32_NF_ND, 0},
+  {X86::AND64rr_ND, X86::AND64mr_ND, 0},
+  {X86::AND64rr_NF_ND, X86::AND64mr_NF_ND, 0},
+  {X86::AND8ri_ND, X86::AND8mi_ND, 0},
+  {X86::AND8ri_NF_ND, X86::AND8mi_NF_ND, 0},
+  {X86::AND8rr_ND, X86::AND8mr_ND, 0},
+  {X86::AND8rr_NF_ND, X86::AND8mr_NF_ND, 0},
   {X86::BEXTR32rr, X86::BEXTR32rm, 0},
   {X86::BEXTR32rr_EVEX, X86::BEXTR32rm_EVEX, 0},
   {X86::BEXTR64rr, X86::BEXTR64rm, 0},
@@ -555,6 +665,28 @@ static const X86FoldTableEntry Table1[] = {
   {X86::MOVZX32rr8_NOREX, X86::MOVZX32rm8_NOREX, 0},
   {X86::MOVZX64rr16, X86::MOVZX64rm16, 0},
   {X86::MOVZX64rr8, X86::MOVZX64rm8, 0},
+  {X86::OR16ri8_ND, X86::OR16mi8_ND, 0},
+  {X86::OR16ri8_NF_ND, X86::OR16mi8_NF_ND, 0},
+  {X86::OR16ri_ND, X86::OR16mi_ND, 0},
+  {X86::OR16ri_NF_ND, X86::OR16mi_NF_ND, 0},
+  {X86::OR16rr_ND, X86::OR16mr_ND, 0},
+  {X86::OR16rr_NF_ND, X86::OR16mr_NF_ND, 0},
+  {X86::OR32ri8_ND, X86::OR32mi8_ND, 0},
+  {X86::OR32ri8_NF_ND, X86::OR32mi8_NF_ND, 0},
+  {X86::OR32ri_ND, X86::OR32mi_ND, 0},
+  {X86::OR32ri_NF_ND, X86::OR32mi_NF_ND, 0},
+  {X86::OR32rr_ND, X86::OR32mr_ND, 0},
+  {X86::OR32rr_NF_ND, X86::OR32mr_NF_ND, 0},
+  {X86::OR64ri32_ND, X86::OR64mi32_ND, 0},
+  {X86::OR64ri8_ND, X86::OR64mi8_ND, 0},
+  {X86::OR64ri8_NF_ND, X86::OR64mi8_NF_ND, 0},
+  {X86::OR64ri_NF_ND, X86::OR64mi32_NF_ND, 0},
+  {X86::OR64rr_ND, X86::OR64mr_ND, 0},
+  {X86::OR64rr_NF_ND, X86::OR64mr_NF_ND, 0},
+  {X86::OR8ri_ND, X86::OR8mi_ND, 0},
+  {X86::OR8ri_NF_ND, X86::OR8mi_NF_ND, 0},
+  {X86::OR8rr_ND, X86::OR8mr_ND, 0},
+  {X86::OR8rr_NF_ND, X86::OR8mr_NF_ND, 0},
   {X86::PABSBrr, X86::PABSBrm, TB_ALIGN_16},
   {X86::PABSDrr, X86::PABSDrm, TB_ALIGN_16},
   {X86::PABSWrr, X86::PABSWrm, TB_ALIGN_16},
@@ -605,6 +737,17 @@ static const X86FoldTableEntry Table1[] = {
   {X86::SARX32rr_EVEX, X86::SARX32rm_EVEX, 0},
   {X86::SARX64rr, X86::SARX64rm, 0},
   {X86::SARX64rr_EVEX, X86::SARX64rm_EVEX, 0},
+  {X86::SBB16ri8_ND, X86::SBB16mi8_ND, 0},
+  {X86::SBB16ri_ND, X86::SBB16mi_ND, 0},
+  {X86::SBB16rr_ND, X86::SBB16mr_ND, 0},
+  {X86::SBB32ri8_ND, X86::SBB32mi8_ND, 0},
+  {X86::SBB32ri_ND, X86::SBB32mi_ND, 0},
+  {X86::SBB32rr_ND, X86::SBB32mr_ND, 0},
+  {X86::SBB64ri32_ND, X86::SBB64mi32_ND, 0},
+  {X86::SBB64ri8_ND, X86::SBB64mi8_ND, 0},
+  {X86::SBB64rr_ND, X86::SBB64mr_ND, 0},
+  {X86::SBB8ri_ND, X86::SBB8mi_ND, 0},
+  {X86::SBB8rr_ND, X86::SBB8mr_ND, 0},
   {X86::SHLX32rr, X86::SHLX32rm, 0},
   {X86::SHLX32rr_EVEX, X86::SHLX32rm_EVEX, 0},
   {X86::SHLX64rr, X86::SHLX64rm, 0},
@@ -617,6 +760,28 @@ static const X86FoldTableEntry Table1[] = {
   {X86::SQRTPSr, X86::SQRTPSm, TB_ALIGN_16},
   {X86::SQRTSDr, X86::SQRTSDm, 0},
   {X86::SQRTSSr, X86::SQRTSSm, 0},
+  {X86::SUB16ri8_ND, X86::SUB16mi8_ND, 0},
+  {X86::SUB16ri8_NF_ND, X86::SUB16mi8_NF_ND, 0},
+  {X86::SUB16ri_ND, X86::SUB16mi_ND, 0},
+  {X86::SUB16ri_NF_ND, X86::SUB16mi_NF_ND, 0},
+  {X86::SUB16rr_ND, X86::SUB16mr_ND, 0},
+  {X86::SUB16rr_NF_ND, X86::SUB16mr_NF_ND, 0},
+  {X86::SUB32ri8_ND, X86::SUB32mi8_ND, 0},
+  {X86::SUB32ri8_NF_ND, X86::SUB32mi8_NF_ND, 0},
+  {X86::SUB32ri_ND, X86::SUB32mi_ND, 0},
+  {X86::SUB32ri_NF_ND, X86::SUB32mi_NF_ND, 0},
+  {X86::SUB32rr_ND, X86::SUB32mr_ND, 0},
+  {X86::SUB32rr_NF_ND, X86::SUB32mr_NF_ND, 0},
+  {X86::SUB64ri32_ND, X86::SUB64mi32_ND, 0},
+  {X86::SUB64ri8_ND, X86::SUB64mi8_ND, 0},
+  {X86::SUB64ri8_NF_ND, X86::SUB64mi8_NF_ND, 0},
+  {X86::SUB64ri_NF_ND, X86::SUB64mi32_NF_ND, 0},
+  {X86::SUB64rr_ND, X86::SUB64mr_ND, 0},
+  {X86::SUB64rr_NF_ND, X86::SUB64mr_NF_ND, 0},
+  {X86::SUB8ri_ND, X86::SUB8mi_ND, 0},
+  {X86::SUB8ri_NF_ND, X86::SUB8mi_NF_ND, 0},
+  {X86::SUB8rr_ND, X86::SUB8mr_ND, 0},
+  {X86::SUB8rr_NF_ND, X86::SUB8mr_NF_ND, 0},
   {X86::T1MSKC32rr, X86::T1MSKC32rm, 0},
   {X86::T1MSKC64rr, X86::T1MSKC64rm, 0},
   {X86::TZCNT16rr, X86::TZCNT16rm, 0},
@@ -1314,6 +1479,28 @@ static const X86FoldTableEntry Table1[] = {
   {X86::VUCOMISSZrr_Int, X86::VUCOMISSZrm_Int, TB_NO_REVERSE},
   {X86::VUCOMISSrr, X86::VUCOMISSrm, 0},
   {X86::VUCOMISSrr_Int, X86::VUCOMISSrm_Int, TB_NO_REVERSE},
+  {X86::XOR16ri8_ND, X86::XOR16mi8_ND, 0},
+  {X86::XOR16ri8_NF_ND, X86::XOR16mi8_NF_ND, 0},
+  {X86::XOR16ri_ND, X86::XOR16mi_ND, 0},
+  {X86::XOR16ri_NF_ND, X86::XOR16mi_NF_ND, 0},
+  {X86::XOR16rr_ND, X86::XOR16mr_ND, 0},
+  {X86::XOR16rr_NF_ND, X86::XOR16mr_NF_ND, 0},
+  {X86::XOR32ri8_ND, X86::XOR32mi8_ND, 0},
+  {X86::XOR32ri8_NF_ND, X86::XOR32mi8_NF_ND, 0},
+  {X86::XOR32ri_ND, X86::XOR32mi_ND, 0},
+  {X86::XOR32ri_NF_ND, X86::XOR32mi_NF_ND, 0},
+  {X86::XOR32rr_ND, X86::XOR32mr_ND, 0},
+  {X86::XOR32rr_NF_ND, X86::XOR32mr_NF_ND, 0},
+  {X86::XOR64ri32_ND, X86::XOR64mi32_ND, 0},
+  {X86::XOR64ri8_ND, X86::XOR64mi8_ND, 0},
+  {X86::XOR64ri8_NF_ND, X86::XOR64mi8_NF_ND, 0},
+  {X86::XOR64ri_NF_ND, X86::XOR64mi32_NF_ND, 0},
+  {X86::XOR64rr_ND, X86::XOR64mr_ND, 0},
+  {X86::XOR64rr_NF_ND, X86::XOR64mr_NF_ND, 0},
+  {X86::XOR8ri_ND, X86::XOR8mi_ND, 0},
+  {X86::XOR8ri_NF_ND, X86::XOR8mi_NF_ND, 0},
+  {X86::XOR8rr_ND, X86::XOR8mr_ND, 0},
+  {X86::XOR8rr_NF_ND, X86::XOR8mr_NF_ND, 0},
 };
 
 static const X86FoldTableEntry Table2[] = {
@@ -1322,15 +1509,31 @@ static const X86FoldTableEntry Table2[] = {
   {X86::ADD64rr_DB, X86::ADD64rm, TB_NO_REVERSE},
   {X86::ADD8rr_DB, X86::ADD8rm, TB_NO_REVERSE},
   {X86::ADC16rr, X86::ADC16rm, 0},
+  {X86::ADC16rr_ND, X86::ADC16rm_ND, 0},
   {X86::ADC32rr, X86::ADC32rm, 0},
+  {X86::ADC32rr_ND, X86::ADC32rm_ND, 0},
   {X86::ADC64rr, X86::ADC64rm, 0},
+  {X86::ADC64rr_ND, X86::ADC64rm_ND, 0},
   {X86::ADC8rr, X86::ADC8rm, 0},
+  {X86::ADC8rr_ND, X86::ADC8rm_ND, 0},
   {X86::ADCX32rr, X86::ADCX32rm, 0},
   {X86::ADCX64rr, X86::ADCX64rm, 0},
   {X86::ADD16rr, X86::ADD16rm, 0},
+  {X86::ADD16rr_ND, X86::ADD16rm_ND, 0},
+  {X86::ADD16rr_NF, X86::ADD16rm_NF, 0},
+  {X86::ADD16rr_NF_ND, X86::ADD16rm_NF_ND, 0},
   {X86::ADD32rr, X86::ADD32rm, 0},
+  {X86::ADD32rr_ND, X86::ADD32rm_ND, 0},
+  {X86::ADD32rr_NF, X86::ADD32rm_NF, 0},
+  {X86::ADD32rr_NF_ND, X86::ADD32rm_NF_ND, 0},
   {X86::ADD64rr, X86::ADD64rm, 0},
+  {X86::ADD64rr_ND, X86::ADD64rm_ND, 0},
+  {X86::ADD64rr_NF, X86::ADD64rm_NF, 0},
+  {X86::ADD64rr_NF_ND, X86::ADD64rm_NF_ND, 0},
   {X86::ADD8rr, X86::ADD8rm, 0},
+  {X86::ADD8rr_ND, X86::ADD8rm_ND, 0},
+  {X86::ADD8rr_NF, X86::ADD8rm_NF, 0},
+  {X86::ADD8rr_NF_ND, X86::ADD8rm_NF_ND, 0},
   {X86::ADDPDrr, X86::ADDPDrm, TB_ALIGN_16},
   {X86::ADDPSrr, X86::ADDPSrm, TB_ALIGN_16},
   {X86::ADDSDrr, X86::ADDSDrm, 0},
@@ -1346,9 +1549,21 @@ static const X86FoldTableEntry Table2[] = {
   {X86::AESENCLASTrr, X86::AESENCLASTrm, TB_ALIGN_16},
   {X86::AESENCrr, X86::AESENCrm, TB_ALIGN_16},
   {X86::AND16rr, X86::AND16rm, 0},
+  {X86::AND16rr_ND, X86::AND16rm_ND, 0},
+  {X86::AND16rr_NF, X86::AND16rm_NF, 0},
+  {X86::AND16rr_NF_ND, X86::AND16rm_NF_ND, 0},
   {X86::AND32rr, X86::AND32rm, 0},
+  {X86::AND32rr_ND, X86::AND32rm_ND, 0},
+  {X86::AND32rr_NF, X86::AND32rm_NF, 0},
+  {X86::AND32rr_NF_ND, X86::AND32rm_NF_ND, 0},
   {X86::AND64rr, X86::AND64rm, 0},
+  {X86::AND64rr_ND, X86::AND64rm_ND, 0},
+  {X86::AND64rr_NF, X86::AND64rm_NF, 0},
+  {X86::AND64rr_NF_ND, X86::AND64rm_NF_ND, 0},
   {X86::AND8rr, X86::AND8rm, 0},
+  {X86::AND8rr_ND, X86::AND8rm_ND, 0},
+  {X86::AND8rr_NF, X86::AND8rm_NF, 0},
+  {X86::AND8rr_NF_ND, X86::AND8rm_NF_ND, 0},
   {X86::ANDN32rr, X86::ANDN32rm, 0},
   {X86::ANDN32rr_EVEX, X86::ANDN32rm_EVEX, 0},
   {X86::ANDN64rr, X86::ANDN64rm, 0},
@@ -1503,9 +1718,21 @@ static const X86FoldTableEntry Table2[] = {
   {X86::MULX64rr, X86::MULX64rm, 0},
   {X86::MULX64rr_EVEX, X86::MULX64rm_EVEX, 0},
   {X86::OR16rr, X86::OR16rm, 0},
+  {X86::OR16rr_ND, X86::OR16rm_ND, 0},
+  {X86::OR16rr_NF, X86::OR16rm_NF, 0},
+  {X86::OR16rr_NF_ND, X86::OR16rm_NF_ND, 0},
   {X86::OR32rr, X86::OR32rm, 0},
+  {X86::OR32rr_ND, X86::OR32rm_ND, 0},
+  {X86::OR32rr_NF, X86::OR32rm_NF, 0},
+  {X86::OR32rr_NF_ND, X86::OR32rm_NF_ND, 0},
   {X86::OR64rr, X86::OR64rm, 0},
+  {X86::OR64rr_ND, X86::OR64rm_ND, 0},
+  {X86::OR64rr_NF, X86::OR64rm_NF, 0},
+  {X86::OR64rr_NF_ND, X86::OR64rm_NF_ND, 0},
   {X86::OR8rr, X86::OR8rm, 0},
+  {X86::OR8rr_ND, X86::OR8rm_ND, 0},
+  {X86::OR8rr_NF, X86::OR8rm_NF, 0},
+  {X86::OR8rr_NF_ND, X86::OR8rm_NF_ND, 0},
   {X86::ORPDrr, X86::ORPDrm, TB_ALIGN_16},
   {X86::ORPSrr, X86::ORPSrm, TB_ALIGN_16},
   {X86::PACKSSDWrr, X86::PACKSSDWrm, TB_ALIGN_16},
@@ -1628,9 +1855,13 @@ static const X86FoldTableEntry Table2[] = {
   {X86::ROUNDSSr_Int, X86::ROUNDSSm_Int, TB_NO_REVERSE},
   {X86::RSQRTSSr_Int, X86::RSQRTSSm_Int, TB_NO_REVERSE},
   {X86::SBB16rr, X86::SBB16rm, 0},
+  {X86::SBB16rr_ND, X86::SBB16rm_ND, 0},
   {X86::SBB32rr, X86::SBB32rm, 0},
+  {X86::SBB32rr_ND, X86::SBB32rm_ND, 0},
   {X86::SBB64rr, X86::SBB64rm, 0},
+  {X86::SBB64rr_ND, X86::SBB64rm_ND, 0},
   {X86::SBB8rr, X86::SBB8rm, 0},
+  {X86::SBB8rr_ND, X86::SBB8rm_ND, 0},
   {X86::SHA1MSG1rr, X86::SHA1MSG1rm, TB_ALIGN_16},
   {X86::SHA1MSG1rr_EVEX, X86::SHA1MSG1rm_EVEX, TB_ALIGN_16},
   {X86::SHA1MSG2rr, X86::SHA1MSG2rm, TB_ALIGN_16},
@@ -1650,9 +1881,21 @@ static const X86FoldTableEntry Table2[] = {
   {X86::SQRTSDr_Int, X86::SQRTSDm_Int, TB_NO_REVERSE},
   {X86::SQRTSSr_Int, X86::SQRTSSm_Int, TB_NO_REVERSE},
   {X86::SUB16rr, X86::SUB16rm, 0},
+  {X86::SUB16rr_ND, X86::SUB16rm_ND, 0},
+  {X86::SUB16rr_NF, X86::SUB16rm_NF, 0},
+  {X86::SUB16rr_NF_ND, X86::SUB16rm_NF_ND, 0},
   {X86::SUB32rr, X86::SUB32rm, 0},
+  {X86::SUB32rr_ND, X86::SUB32rm_ND, 0},
+  {X86::SUB32rr_NF, X86::SUB32rm_NF, 0},
+  {X86::SUB32rr_NF_ND, X86::SUB32rm_NF_ND, 0},
   {X86::SUB64rr, X86::SUB64rm, 0},
+  {X86::SUB64rr_ND, X86::SUB64rm_ND, 0},
+  {X86::SUB64rr_NF, X86::SUB64rm_NF, 0},
+  {X86::SUB64rr_NF_ND, X86::SUB64rm_NF_ND, 0},
   {X86::SUB8rr, X86::SUB8rm, 0},
+  {X86::SUB8rr_ND, X86::SUB8rm_ND, 0},
+  {X86::SUB8rr_NF, X86::SUB8rm_NF, 0},
+  {X86::SUB8rr_NF_ND, X86::SUB8rm_NF_ND, 0},
   {X86::SUBPDrr, X86::SUBPDrm, TB_ALIGN_16},
   {X86::SUBPSrr, X86::SUBPSrm, TB_ALIGN_16},
   {X86::SUBSDrr, X86::SUBSDrm, 0},
@@ -3281,9 +3524,21 @@ static const X86FoldTableEntry Table2[] = {
   {X86::VXORPSZrr, X86::VXORPSZrm, 0},
   {X86::VXORPSrr, X86::VXORPSrm, 0},
   {X86::XOR16rr, X86::XOR16rm, 0},
+  {X86::XOR16rr_ND, X86::XOR16rm_ND, 0},
+  {X86::XOR16rr_NF, X86::XOR16rm_NF, 0},
+  {X86::XOR16rr_NF_ND, X86::XOR16rm_NF_ND, 0},
   {X86::XOR32rr, X86::XOR32rm, 0},
+  {X86::XOR32rr_ND, X86::XOR32rm_ND, 0},
+  {X86::XOR32rr_NF, X86::XOR32rm_NF, 0},
+  {X86::XOR32rr_NF_ND, X86::XOR32rm_NF_ND, 0},
   {X86::XOR64rr, X86::XOR64rm, 0},
+  {X86::XOR64rr_ND, X86::XOR64rm_ND, 0},
+  {X86::XOR64rr_NF, X86::XOR64rm_NF, 0},
+  {X86::XOR64rr_NF_ND, X86::XOR64rm_NF_ND, 0},
   {X86::XOR8rr, X86::XOR8rm, 0},
+  {X86::XOR8rr_ND, X86::XOR8rm_ND, 0},
+  {X86::XOR8rr_NF, X86::XOR8rm_NF, 0},
+  {X86::XOR8rr_NF_ND, X86::XOR8rm_NF_ND, 0},
   {X86::XORPDrr, X86::XORPDrm, TB_ALIGN_16},
   {X86::XORPSrr, X86::XORPSrm, TB_ALIGN_16},
 };
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp
index 06e7ec3b923075..9ee1472bdf5cc1 100644
--- a/llvm/utils/TableGen/X86DisassemblerTables.cpp
+++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp
@@ -563,6 +563,13 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_L2_W_XD_KZ_B:
   case IC_EVEX_L2_W_OPSIZE_KZ_B:
     return false;
+  case IC_EVEX_NF:
+  case IC_EVEX_B_NF:
+  case IC_EVEX_OPSIZE_NF:
+  case IC_EVEX_OPSIZE_B_NF:
+  case IC_EVEX_W_NF:
+  case IC_EVEX_W_B_NF:
+    return false;
   default:
     errs() << "Unknown instruction class: "
            << stringForContext((InstructionContext)parent) << "\n";
@@ -889,7 +896,19 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
 
     if ((index & ATTR_EVEX) && (index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
       o << "IC_EVEX_OPSIZE_ADSIZE";
-    else if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) {
+    else if (index & ATTR_EVEXNF) {
+      o << "IC_EVEX";
+      if (index & ATTR_REXW)
+        o << "_W";
+      else if (index & ATTR_OPSIZE)
+        o << "_OPSIZE";
+
+      if (index & ATTR_EVEXB)
+        o << "_B";
+
+      o << "_NF";
+    } else if ((index & ATTR_EVEX) || (index & ATTR_VEX) ||
+               (index & ATTR_VEXL)) {
       if (index & ATTR_EVEX)
         o << "IC_EVEX";
       else
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index d3299e28103166..101b75e2f087e6 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -348,7 +348,9 @@ class IsMatch {
     // memory form: broadcast
     if (IsBroadcast && (RegRI.HasEVEX_B || !MemRI.HasEVEX_B))
       return false;
-    if (!IsBroadcast && (RegRI.HasEVEX_B || MemRI.HasEVEX_B))
+    // EVEX_B indicates NDD for MAP4 instructions
+    if (!IsBroadcast && (RegRI.HasEVEX_B || MemRI.HasEVEX_B) &&
+        RegRI.OpMap != X86Local::T_MAP4)
       return false;
 
     if (!mayFoldFromLeftToRight(RegRI.Form, MemRI.Form))
@@ -369,7 +371,8 @@ class IsMatch {
                         RegRI.OpMap, RegRI.OpSize, RegRI.AdSize, RegRI.HasREX_W,
                         RegRI.HasVEX_4V, RegRI.HasVEX_L, RegRI.IgnoresVEX_L,
                         RegRI.IgnoresW, RegRI.HasEVEX_K, RegRI.HasEVEX_KZ,
-                        RegRI.HasEVEX_L2, RegRec->getValueAsBit("hasEVEX_RC"),
+                        RegRI.HasEVEX_L2, RegRI.HasEVEX_NF,
+                        RegRec->getValueAsBit("hasEVEX_RC"),
                         RegRec->getValueAsBit("hasLockPrefix"),
                         RegRec->getValueAsBit("hasNoTrackPrefix"),
                         RegRec->getValueAsBit("EVEX_W1_VEX_W0")) !=
@@ -377,7 +380,8 @@ class IsMatch {
                         MemRI.OpMap, MemRI.OpSize, MemRI.AdSize, MemRI.HasREX_W,
                         MemRI.HasVEX_4V, MemRI.HasVEX_L, MemRI.IgnoresVEX_L,
                         MemRI.IgnoresW, MemRI.HasEVEX_K, MemRI.HasEVEX_KZ,
-                        MemRI.HasEVEX_L2, MemRec->getValueAsBit("hasEVEX_RC"),
+                        MemRI.HasEVEX_L2, MemRI.HasEVEX_NF,
+                        MemRec->getValueAsBit("hasEVEX_RC"),
                         MemRec->getValueAsBit("hasLockPrefix"),
                         MemRec->getValueAsBit("hasNoTrackPrefix"),
                         MemRec->getValueAsBit("EVEX_W1_VEX_W0")))
@@ -668,6 +672,14 @@ void X86FoldTablesEmitter::run(raw_ostream &O) {
     if (NoFoldSet.find(Rec->getName()) != NoFoldSet.end())
       continue;
 
+    // Promoted legacy instruction is in EVEX space, and has REX2-encoding
+    // alternative. It's added due to HW design and never emitted by compiler.
+    if (byteFromBitsInit(Rec->getValueAsBitsInit("OpMapBits")) ==
+            X86Local::T_MAP4 &&
+        byteFromBitsInit(Rec->getValueAsBitsInit("explicitOpPrefixBits")) ==
+            X86Local::ExplicitEVEX)
+      continue;
+
     // - Instructions including RST register class operands are not relevant
     //   for memory folding (for further details check the explanation in
     //   lib/Target/X86/X86InstrFPStack.td file).
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 47ee9544f32337..fb430676c504b9 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -125,6 +125,7 @@ RecognizableInstrBase::RecognizableInstrBase(const CodeGenInstruction &insn) {
   HasEVEX_K = Rec->getValueAsBit("hasEVEX_K");
   HasEVEX_KZ = Rec->getValueAsBit("hasEVEX_Z");
   HasEVEX_B = Rec->getValueAsBit("hasEVEX_B");
+  HasEVEX_NF = Rec->getValueAsBit("hasEVEX_NF");
   IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
   IsAsmParserOnly = Rec->getValueAsBit("isAsmParserOnly");
   ForceDisassemble = Rec->getValueAsBit("ForceDisassemble");
@@ -185,6 +186,9 @@ void RecognizableInstr::processInstr(DisassemblerTables &tables,
               : (HasEVEX_KZ ? n##_KZ                                           \
                             : (HasEVEX_K ? n##_K : (HasEVEX_B ? n##_B : n)))))
 
+#define EVEX_NF(n) (HasEVEX_NF ? n##_NF : n)
+#define EVEX_B_NF(n) (HasEVEX_B ? EVEX_NF(n##_B) : EVEX_NF(n))
+
 InstructionContext RecognizableInstr::insnContext() const {
   InstructionContext insnContext;
 
@@ -193,8 +197,15 @@ InstructionContext RecognizableInstr::insnContext() const {
       errs() << "Don't support VEX.L if EVEX_L2 is enabled: " << Name << "\n";
       llvm_unreachable("Don't support VEX.L if EVEX_L2 is enabled");
     }
-    // VEX_L & VEX_W
-    if (!EncodeRC && HasVEX_L && HasREX_W) {
+    if (HasEVEX_NF) {
+      if (OpPrefix == X86Local::PD)
+        insnContext = EVEX_B_NF(IC_EVEX_OPSIZE);
+      else if (HasREX_W)
+        insnContext = EVEX_B_NF(IC_EVEX_W);
+      else
+        insnContext = EVEX_B_NF(IC_EVEX);
+    } else if (!EncodeRC && HasVEX_L && HasREX_W) {
+      // VEX_L & VEX_W
       if (OpPrefix == X86Local::PD)
         insnContext = EVEX_KB(IC_EVEX_L_W_OPSIZE);
       else if (OpPrefix == X86Local::XS)
@@ -486,6 +497,7 @@ void RecognizableInstr::emitInstructionSpecifier() {
     ++additionalOperands;
 #endif
 
+  bool IsND = OpMap == X86Local::T_MAP4 && HasEVEX_B && HasVEX_4V;
   switch (Form) {
   default:
     llvm_unreachable("Unhandled form");
@@ -536,11 +548,14 @@ void RecognizableInstr::emitInstructionSpecifier() {
            numPhysicalOperands <= 3 + additionalOperands &&
            "Unexpected number of operands for MRMDestReg");
 
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
+
     HANDLE_OPERAND(rmRegister)
     if (HasEVEX_K)
       HANDLE_OPERAND(writemaskRegister)
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       // FIXME: In AVX, the register below becomes the one encoded
       // in ModRMVEX and the one above the one in the VEX.VVVV field
       HANDLE_OPERAND(vvvvRegister)
@@ -570,12 +585,15 @@ void RecognizableInstr::emitInstructionSpecifier() {
            numPhysicalOperands <= 3 + additionalOperands &&
            "Unexpected number of operands for MRMDestMemFrm with VEX_4V");
 
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
+
     HANDLE_OPERAND(memory)
 
     if (HasEVEX_K)
       HANDLE_OPERAND(writemaskRegister)
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       // FIXME: In AVX, the register below becomes the one encoded
       // in ModRMVEX and the one above the one in the VEX.VVVV field
       HANDLE_OPERAND(vvvvRegister)
@@ -594,12 +612,15 @@ void RecognizableInstr::emitInstructionSpecifier() {
            numPhysicalOperands <= 4 + additionalOperands &&
            "Unexpected number of operands for MRMSrcRegFrm");
 
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
+
     HANDLE_OPERAND(roRegister)
 
     if (HasEVEX_K)
       HANDLE_OPERAND(writemaskRegister)
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       // FIXME: In AVX, the register below becomes the one encoded
       // in ModRMVEX and the one above the one in the VEX.VVVV field
       HANDLE_OPERAND(vvvvRegister)
@@ -641,13 +662,15 @@ void RecognizableInstr::emitInstructionSpecifier() {
     assert(numPhysicalOperands >= 2 + additionalOperands &&
            numPhysicalOperands <= 4 + additionalOperands &&
            "Unexpected number of operands for MRMSrcMemFrm");
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
 
     HANDLE_OPERAND(roRegister)
 
     if (HasEVEX_K)
       HANDLE_OPERAND(writemaskRegister)
 
-    if (HasVEX_4V)
+    if (!IsND && HasVEX_4V)
       // FIXME: In AVX, the register below becomes the one encoded
       // in ModRMVEX and the one above the one in the VEX.VVVV field
       HANDLE_OPERAND(vvvvRegister)
@@ -1216,6 +1239,8 @@ RecognizableInstr::roRegisterEncodingFromString(const std::string &s,
 OperandEncoding
 RecognizableInstr::vvvvRegisterEncodingFromString(const std::string &s,
                                                   uint8_t OpSize) {
+  ENCODING("GR8", ENCODING_VVVV)
+  ENCODING("GR16", ENCODING_VVVV)
   ENCODING("GR32", ENCODING_VVVV)
   ENCODING("GR64", ENCODING_VVVV)
   ENCODING("FR32", ENCODING_VVVV)
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index 61ad5e32b3fb0a..0fb056973c9363 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -172,7 +172,7 @@ enum { PD = 1, XS = 2, XD = 3, PS = 4 };
 enum { VEX = 1, XOP = 2, EVEX = 3 };
 enum { OpSize16 = 1, OpSize32 = 2 };
 enum { AdSize16 = 1, AdSize32 = 2, AdSize64 = 3 };
-enum { ExplicitREX2 = 1 };
+enum { ExplicitREX2 = 1, ExplicitVEX = 2, ExplicitEVEX = 3 };
 } // namespace X86Local
 
 namespace X86Disassembler {
@@ -212,6 +212,8 @@ struct RecognizableInstrBase {
   bool HasEVEX_KZ;
   /// The hasEVEX_B field from the record
   bool HasEVEX_B;
+  /// The hasEVEX_NF field from the record
+  bool HasEVEX_NF;
   /// Indicates that the instruction uses the L and L' fields for RC.
   bool EncodeRC;
   /// The isCodeGenOnly field from the record

>From f79afd444ed1d897aaa7b80137bbadabfcbf907f Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 16:42:32 +0800
Subject: [PATCH 2/7] Support encoding/decoding for NEG/NOT

---
 llvm/lib/Target/X86/X86InstrArithmetic.td | 136 ++++++++++++++++++----
 llvm/lib/Target/X86/X86InstrUtils.td      |   7 +-
 llvm/test/MC/Disassembler/X86/apx/neg.txt | 130 +++++++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/not.txt |  66 +++++++++++
 llvm/test/MC/X86/apx/neg-att.s            | 101 ++++++++++++++++
 llvm/test/MC/X86/apx/neg-intel.s          |  98 ++++++++++++++++
 llvm/test/MC/X86/apx/not-att.s            |  53 +++++++++
 llvm/test/MC/X86/apx/not-intel.s          |  50 ++++++++
 llvm/test/TableGen/x86-fold-tables.inc    |  16 +++
 9 files changed, 630 insertions(+), 27 deletions(-)
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/neg.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/not.txt
 create mode 100644 llvm/test/MC/X86/apx/neg-att.s
 create mode 100644 llvm/test/MC/X86/apx/neg-intel.s
 create mode 100644 llvm/test/MC/X86/apx/not-att.s
 create mode 100644 llvm/test/MC/X86/apx/not-intel.s

diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 86fbe5d9d1bbe3..17a70c70ef77a5 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -363,30 +363,44 @@ class BinOpAIF_AF<bits<8> o, string m, X86TypeInfo t, Register areg,
 // UnaryOpR - Instructions that read "reg".
 class UnaryOpR<bits<8> o, Format f, string m, string args, X86TypeInfo t,
                dag out, list<dag> p>
-  : ITy<o, f, t, out, (ins t.RegClass:$src), m, args, p>, Sched<[WriteALU]>;
+  : ITy<o, f, t, out, (ins t.RegClass:$src1), m, args, p>, Sched<[WriteALU]>;
 // UnaryOpR_R - Instructions that read "reg" and write "reg".
 class UnaryOpR_R<bits<8> o, Format f, string m, X86TypeInfo t,
-                  SDPatternOperator node>
-  : UnaryOpR<o, f, m, unaryop_args, t, (outs t.RegClass:$dst),
-             [(set t.RegClass:$dst, (node t.RegClass:$src))]>;
+                  SDPatternOperator node, bit ndd = 0>
+  : UnaryOpR<o, f, m, !if(!eq(ndd, 0), unaryop_args, unaryop_ndd_args), t,
+             (outs t.RegClass:$dst),
+             [(set t.RegClass:$dst, (node t.RegClass:$src1))]>, NDD<ndd>;
 // UnaryOpR_RF - Instructions that read "reg" and write "reg"/EFLAGS.
 class UnaryOpR_RF<bits<8> o, Format f, string m, X86TypeInfo t,
-                  SDPatternOperator node>
-  : UnaryOpR<o, f, m, unaryop_args, t, (outs t.RegClass:$dst),
-             [(set t.RegClass:$dst, (node t.RegClass:$src)),
-              (implicit EFLAGS)]>, DefEFLAGS;
+                  SDPatternOperator node, bit ndd = 0>
+  : UnaryOpR<o, f, m, !if(!eq(ndd, 0), unaryop_args, unaryop_ndd_args), t,
+             (outs t.RegClass:$dst),
+             [(set t.RegClass:$dst, (node t.RegClass:$src1)),
+              (implicit EFLAGS)]>, DefEFLAGS, NDD<ndd>;
 
 // UnaryOpM - Instructions that read "[mem]".
 class UnaryOpM<bits<8> o, Format f, string m, string args, X86TypeInfo t,
                dag out, list<dag> p>
-  : ITy<o, f, t, out, (ins t.MemOperand:$src), m, args, p> {
+  : ITy<o, f, t, out, (ins t.MemOperand:$src1), m, args, p> {
   let mayLoad = 1;
 }
+// UnaryOpM_R - Instructions that read "[mem]" and writes "reg".
+class UnaryOpM_R<bits<8> o, Format f, string m, X86TypeInfo t,
+                  SDPatternOperator node>
+  : UnaryOpM<o, f, m, unaryop_ndd_args, t, (outs t.RegClass:$dst),
+             [(set t.RegClass:$dst, (node (t.LoadNode addr:$src1)))]>,
+    Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, NDD<1>;
+// UnaryOpM_RF - Instructions that read "[mem]" and writes "reg"/EFLAGS.
+class UnaryOpM_RF<bits<8> o, Format f, string m, X86TypeInfo t,
+                  SDPatternOperator node>
+  : UnaryOpM<o, f, m, unaryop_ndd_args, t, (outs t.RegClass:$dst),
+             [(set t.RegClass:$dst, EFLAGS, (node (t.LoadNode addr:$src1)))]>,
+    Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>, DefEFLAGS, NDD<1>;
 // UnaryOpM_M - Instructions that read "[mem]" and writes "[mem]".
 class UnaryOpM_M<bits<8> o, Format f, string m, X86TypeInfo t,
                   SDPatternOperator node>
   : UnaryOpM<o, f, m, unaryop_args, t, (outs),
-             [(store (node (t.LoadNode addr:$src)), addr:$src)]>,
+             [(store (node (t.LoadNode addr:$src1)), addr:$src1)]>,
     Sched<[WriteALURMW]>{
   let mayStore = 1;
 }
@@ -394,7 +408,7 @@ class UnaryOpM_M<bits<8> o, Format f, string m, X86TypeInfo t,
 class UnaryOpM_MF<bits<8> o, Format f, string m, X86TypeInfo t,
                   SDPatternOperator node>
   : UnaryOpM<o, f, m, unaryop_args, t, (outs),
-             [(store (node (t.LoadNode addr:$src)), addr:$src),
+             [(store (node (t.LoadNode addr:$src1)), addr:$src1),
               (implicit EFLAGS)]>, Sched<[WriteALURMW]>, DefEFLAGS {
   let mayStore = 1;
 }
@@ -404,13 +418,13 @@ class UnaryOpM_MF<bits<8> o, Format f, string m, X86TypeInfo t,
 //
 class MulDivOpR<bits<8> o, Format f, string m, X86TypeInfo t,
              X86FoldableSchedWrite sched, list<dag> p>
-  : UnaryOpR<o, f, m, "$src", t, (outs), p> {
+  : UnaryOpR<o, f, m, "$src1", t, (outs), p> {
   let SchedRW = [sched];
 }
 
 class MulDivOpM<bits<8> o, Format f, string m, X86TypeInfo t,
              X86FoldableSchedWrite sched, list<dag> p>
-  : UnaryOpM<o, f, m, "$src", t, (outs), p> {
+  : UnaryOpM<o, f, m, "$src1", t, (outs), p> {
   let SchedRW =
     [sched.Folded,
      // Memory operand.
@@ -428,7 +442,7 @@ multiclass Mul<bits<8> o, string m, Format RegMRM, Format MemMRM, SDPatternOpera
   // syntax can be accepted.
   let Defs = [AL,EFLAGS,AX], Uses = [AL] in
   def 8r : MulDivOpR<o, RegMRM, m, Xi8, WriteIMul8,
-                  [(set AL, (node AL, GR8:$src)), (implicit EFLAGS)]>;
+                  [(set AL, (node AL, GR8:$src1)), (implicit EFLAGS)]>;
   let Defs = [AX,DX,EFLAGS], Uses = [AX] in
   def 16r : MulDivOpR<o, RegMRM, m, Xi16, WriteIMul16, []>, OpSize16;
   let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
@@ -437,7 +451,7 @@ multiclass Mul<bits<8> o, string m, Format RegMRM, Format MemMRM, SDPatternOpera
   def 64r : MulDivOpR<o, RegMRM, m, Xi64, WriteIMul64, []>;
   let Defs = [AL,EFLAGS,AX], Uses = [AL] in
   def 8m : MulDivOpM<o, MemMRM, m, Xi8, WriteIMul8,
-                  [(set AL, (node AL, (loadi8 addr:$src))), (implicit EFLAGS)]>;
+                  [(set AL, (node AL, (loadi8 addr:$src1))), (implicit EFLAGS)]>;
   let Defs = [AX,DX,EFLAGS], Uses = [AX] in
   def 16m : MulDivOpM<o, MemMRM, m, Xi16, WriteIMul16, []>, OpSize16;
   let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
@@ -543,18 +557,18 @@ def IMUL64rmi32 : IMulOpMI_R<Xi64, WriteIMul64Imm>;
 //
 class IncOpR_RF<X86TypeInfo t> : UnaryOpR_RF<0xFF, MRM0r, "inc", t, null_frag> {
   let Pattern = [(set t.RegClass:$dst, EFLAGS,
-                 (X86add_flag_nocf t.RegClass:$src, 1))];
+                 (X86add_flag_nocf t.RegClass:$src1, 1))];
 }
 class DecOpR_RF<X86TypeInfo t> : UnaryOpR_RF<0xFF, MRM1r, "dec", t, null_frag> {
   let Pattern = [(set t.RegClass:$dst, EFLAGS,
-                 (X86sub_flag_nocf t.RegClass:$src, 1))];
+                 (X86sub_flag_nocf t.RegClass:$src1, 1))];
 }
 class IncOpM_M<X86TypeInfo t> : UnaryOpM_MF<0xFF, MRM0m, "inc", t, null_frag> {
-  let Pattern = [(store (add (t.LoadNode addr:$src), 1), addr:$src),
+  let Pattern = [(store (add (t.LoadNode addr:$src1), 1), addr:$src1),
                  (implicit EFLAGS)];
 }
 class DecOpM_M<X86TypeInfo t> : UnaryOpM_MF<0xFF, MRM1m, "dec", t, null_frag> {
-  let Pattern = [(store (add (t.LoadNode addr:$src), -1), addr:$src),
+  let Pattern = [(store (add (t.LoadNode addr:$src1), -1), addr:$src1),
                  (implicit EFLAGS)];
 }
 // IncDec_Alt - Instructions like "inc reg" short forms.
@@ -562,7 +576,7 @@ class DecOpM_M<X86TypeInfo t> : UnaryOpM_MF<0xFF, MRM1m, "dec", t, null_frag> {
 class IncDec_Alt<bits<8> o, string m, X86TypeInfo t>
   : UnaryOpR_RF<o, AddRegFrm, m, t, null_frag>, Requires<[Not64BitMode]>;
 
-let Constraints = "$src = $dst", isConvertibleToThreeAddress = 1 in {
+let isConvertibleToThreeAddress = 1 in {
 def INC16r_alt : IncDec_Alt<0x40, "inc", Xi16>, OpSize16;
 def INC32r_alt : IncDec_Alt<0x40, "inc", Xi32>, OpSize32;
 def DEC16r_alt : IncDec_Alt<0x48, "dec", Xi16>, OpSize16;
@@ -592,34 +606,108 @@ def DEC64m : DecOpM_M<Xi64>;
 //===----------------------------------------------------------------------===//
 // NEG and NOT Instructions
 //
-class NegOpR_RF<X86TypeInfo t> : UnaryOpR_RF<0xF7, MRM3r, "neg", t, ineg>;
+class NegOpR_R<X86TypeInfo t, bit ndd = 0>
+  : UnaryOpR_R<0xF7, MRM3r, "neg", t, ineg, ndd>;
+class NegOpR_RF<X86TypeInfo t, bit ndd = 0>
+  : UnaryOpR_RF<0xF7, MRM3r, "neg", t, ineg, ndd>;
+class NegOpM_M<X86TypeInfo t> : UnaryOpM_M<0xF7, MRM3m, "neg", t, null_frag>;
 class NegOpM_MF<X86TypeInfo t> : UnaryOpM_MF<0xF7, MRM3m, "neg", t, ineg>;
+class NegOpM_R<X86TypeInfo t> : UnaryOpM_R<0xF7, MRM3m, "neg", t, null_frag>;
+class NegOpM_RF<X86TypeInfo t> : UnaryOpM_RF<0xF7, MRM3m, "neg", t, ineg>;
 
-class NotOpR_R<X86TypeInfo t> : UnaryOpR_R<0xF7, MRM2r, "not", t, not>;
+class NotOpR_R<X86TypeInfo t, bit ndd = 0>
+  : UnaryOpR_R<0xF7, MRM2r, "not", t, not, ndd>;
 class NotOpM_M<X86TypeInfo t> : UnaryOpM_M<0xF7, MRM2m, "not", t, not>;
+class NotOpM_R<X86TypeInfo t> : UnaryOpM_R<0xF7, MRM2m, "not", t, not>;
 
-let Constraints = "$src = $dst" in {
+let Predicates = [NoNDD] in {
 def NEG8r  : NegOpR_RF<Xi8>;
 def NEG16r : NegOpR_RF<Xi16>, OpSize16;
 def NEG32r : NegOpR_RF<Xi32>, OpSize32;
 def NEG64r : NegOpR_RF<Xi64>;
-
 def NOT8r  : NotOpR_R<Xi8>;
 def NOT16r : NotOpR_R<Xi16>, OpSize16;
 def NOT32r : NotOpR_R<Xi32>, OpSize32;
 def NOT64r : NotOpR_R<Xi64>;
 }
 
+let Predicates = [HasNDD, In64BitMode] in {
+def NEG8r_ND  : NegOpR_RF<Xi8, 1>;
+def NEG16r_ND : NegOpR_RF<Xi16, 1>, PD;
+def NEG32r_ND : NegOpR_RF<Xi32, 1>;
+def NEG64r_ND : NegOpR_RF<Xi64, 1>;
+
+def NOT8r_ND  : NotOpR_R<Xi8, 1>;
+def NOT16r_ND : NotOpR_R<Xi16, 1>, PD;
+def NOT32r_ND : NotOpR_R<Xi32, 1>;
+def NOT64r_ND : NotOpR_R<Xi64, 1>;
+
+def NEG8r_NF_ND  : NegOpR_R<Xi8, 1>, EVEX_NF;
+def NEG16r_NF_ND : NegOpR_R<Xi16, 1>, EVEX_NF, PD;
+def NEG32r_NF_ND : NegOpR_R<Xi32, 1>, EVEX_NF;
+def NEG64r_NF_ND : NegOpR_R<Xi64, 1>, EVEX_NF;
+}
+
 def NEG8m  : NegOpM_MF<Xi8>;
 def NEG16m : NegOpM_MF<Xi16>, OpSize16;
 def NEG32m : NegOpM_MF<Xi32>, OpSize32;
 def NEG64m : NegOpM_MF<Xi64>, Requires<[In64BitMode]>;
 
+let Predicates = [HasNDD, In64BitMode] in {
+def NEG8m_ND  : NegOpM_RF<Xi8>;
+def NEG16m_ND : NegOpM_RF<Xi16>, PD;
+def NEG32m_ND : NegOpM_RF<Xi32>;
+def NEG64m_ND : NegOpM_RF<Xi64>;
+
+def NEG8m_NF_ND  : NegOpM_R<Xi8>, EVEX_NF;
+def NEG16m_NF_ND : NegOpM_R<Xi16>, EVEX_NF, PD;
+def NEG32m_NF_ND : NegOpM_R<Xi32>, EVEX_NF;
+def NEG64m_NF_ND : NegOpM_R<Xi64>, EVEX_NF;
+}
+
 def NOT8m  : NotOpM_M<Xi8>;
 def NOT16m : NotOpM_M<Xi16>, OpSize16;
 def NOT32m : NotOpM_M<Xi32>, OpSize32;
 def NOT64m : NotOpM_M<Xi64>, Requires<[In64BitMode]>;
 
+let Predicates = [HasNDD, In64BitMode] in {
+def NOT8m_ND  : NotOpM_R<Xi8>;
+def NOT16m_ND : NotOpM_R<Xi16>, PD;
+def NOT32m_ND : NotOpM_R<Xi32>;
+def NOT64m_ND : NotOpM_R<Xi64>;
+}
+
+let Predicates = [In64BitMode], Pattern = [(null_frag)] in {
+def NEG8r_NF  : NegOpR_R<Xi8>, NF;
+def NEG16r_NF : NegOpR_R<Xi16>, NF, PD;
+def NEG32r_NF : NegOpR_R<Xi32>, NF;
+def NEG64r_NF : NegOpR_R<Xi64>, NF;
+def NEG8m_NF  : NegOpM_M<Xi8>, NF;
+def NEG16m_NF : NegOpM_M<Xi16>, NF, PD;
+def NEG32m_NF : NegOpM_M<Xi32>, NF;
+def NEG64m_NF : NegOpM_M<Xi64>, NF;
+
+def NEG8r_EVEX  : NegOpR_RF<Xi8>, PL;
+def NEG16r_EVEX : NegOpR_RF<Xi16>, PL, PD;
+def NEG32r_EVEX : NegOpR_RF<Xi32>, PL;
+def NEG64r_EVEX : NegOpR_RF<Xi64>, PL;
+
+def NOT8r_EVEX  : NotOpR_R<Xi8>, PL;
+def NOT16r_EVEX : NotOpR_R<Xi16>, PL, PD;
+def NOT32r_EVEX : NotOpR_R<Xi32>, PL;
+def NOT64r_EVEX : NotOpR_R<Xi64>, PL;
+
+def NEG8m_EVEX  : NegOpM_MF<Xi8>, PL;
+def NEG16m_EVEX : NegOpM_MF<Xi16>, PL, PD;
+def NEG32m_EVEX : NegOpM_MF<Xi32>, PL;
+def NEG64m_EVEX : NegOpM_MF<Xi64>, PL;
+
+def NOT8m_EVEX  : NotOpM_M<Xi8>, PL;
+def NOT16m_EVEX : NotOpM_M<Xi16>, PL, PD;
+def NOT32m_EVEX : NotOpM_M<Xi32>, PL;
+def NOT64m_EVEX : NotOpM_M<Xi64>, PL;
+}
+
 /// ArithBinOp_RF - This is an arithmetic binary operator where the pattern is
 /// defined with "(set GPR:$dst, EFLAGS, (...".
 ///
diff --git a/llvm/lib/Target/X86/X86InstrUtils.td b/llvm/lib/Target/X86/X86InstrUtils.td
index e6089420679e89..03b6e111bcf749 100644
--- a/llvm/lib/Target/X86/X86InstrUtils.td
+++ b/llvm/lib/Target/X86/X86InstrUtils.td
@@ -956,14 +956,15 @@ class ITy<bits<8> o, Format f, X86TypeInfo t, dag outs, dag ins, string m,
   let hasREX_W  = t.HasREX_W;
 }
 
-defvar unaryop_args = "$src";
+defvar unaryop_args = "$src1";
+defvar unaryop_ndd_args = "{$src1, $dst|$dst, $src1}";
 defvar binop_args = "{$src2, $src1|$src1, $src2}";
 defvar binop_ndd_args = "{$src2, $src1, $dst|$dst, $src1, $src2}";
-defvar binop_constraint = "$src1 = $dst";
+defvar tie_dst_src1 = "$src1 = $dst";
 
 // NDD - Helper for new data destination instructions
 class NDD<bit ndd> {
-  string Constraints = !if(!eq(ndd, 0), binop_constraint, "");
+  string Constraints = !if(!eq(ndd, 0), tie_dst_src1, "");
   Encoding OpEnc = !if(!eq(ndd, 0), EncNormal, EncEVEX);
   bit hasEVEX_B = ndd;
   bit hasVEX_4V = ndd;
diff --git a/llvm/test/MC/Disassembler/X86/apx/neg.txt b/llvm/test/MC/Disassembler/X86/apx/neg.txt
new file mode 100644
index 00000000000000..91cffb3b4b13b6
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/neg.txt
@@ -0,0 +1,130 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	negb	%bl
+# INTEL: {evex}	neg	bl
+0x62,0xf4,0x7c,0x08,0xf6,0xdb
+
+# ATT:   {nf}	negb	%bl
+# INTEL: {nf}	neg	bl
+0x62,0xf4,0x7c,0x0c,0xf6,0xdb
+
+# ATT:   negb	%bl, %bl
+# INTEL: neg	bl, bl
+0x62,0xf4,0x64,0x18,0xf6,0xdb
+
+# ATT:   {nf}	negb	%bl, %bl
+# INTEL: {nf}	neg	bl, bl
+0x62,0xf4,0x64,0x1c,0xf6,0xdb
+
+# ATT:   {evex}	negw	%dx
+# INTEL: {evex}	neg	dx
+0x62,0xf4,0x7d,0x08,0xf7,0xda
+
+# ATT:   {nf}	negw	%dx
+# INTEL: {nf}	neg	dx
+0x62,0xf4,0x7d,0x0c,0xf7,0xda
+
+# ATT:   negw	%dx, %dx
+# INTEL: neg	dx, dx
+0x62,0xf4,0x6d,0x18,0xf7,0xda
+
+# ATT:   {nf}	negw	%dx, %dx
+# INTEL: {nf}	neg	dx, dx
+0x62,0xf4,0x6d,0x1c,0xf7,0xda
+
+# ATT:   {evex}	negl	%ecx
+# INTEL: {evex}	neg	ecx
+0x62,0xf4,0x7c,0x08,0xf7,0xd9
+
+# ATT:   {nf}	negl	%ecx
+# INTEL: {nf}	neg	ecx
+0x62,0xf4,0x7c,0x0c,0xf7,0xd9
+
+# ATT:   negl	%ecx, %ecx
+# INTEL: neg	ecx, ecx
+0x62,0xf4,0x74,0x18,0xf7,0xd9
+
+# ATT:   {nf}	negl	%ecx, %ecx
+# INTEL: {nf}	neg	ecx, ecx
+0x62,0xf4,0x74,0x1c,0xf7,0xd9
+
+# ATT:   {evex}	negq	%r9
+# INTEL: {evex}	neg	r9
+0x62,0xd4,0xfc,0x08,0xf7,0xd9
+
+# ATT:   {nf}	negq	%r9
+# INTEL: {nf}	neg	r9
+0x62,0xd4,0xfc,0x0c,0xf7,0xd9
+
+# ATT:   negq	%r9, %r9
+# INTEL: neg	r9, r9
+0x62,0xd4,0xb4,0x18,0xf7,0xd9
+
+# ATT:   {nf}	negq	%r9, %r9
+# INTEL: {nf}	neg	r9, r9
+0x62,0xd4,0xb4,0x1c,0xf7,0xd9
+
+# ATT:   {evex}	negb	291(%r8,%rax,4)
+# INTEL: {evex}	neg	byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negb	291(%r8,%rax,4)
+# INTEL: {nf}	neg	byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   negb	291(%r8,%rax,4), %bl
+# INTEL: neg	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x64,0x18,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negb	291(%r8,%rax,4), %bl
+# INTEL: {nf}	neg	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x64,0x1c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	negw	291(%r8,%rax,4)
+# INTEL: {evex}	neg	word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negw	291(%r8,%rax,4)
+# INTEL: {nf}	neg	word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   negw	291(%r8,%rax,4), %dx
+# INTEL: neg	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6d,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negw	291(%r8,%rax,4), %dx
+# INTEL: {nf}	neg	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6d,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	negl	291(%r8,%rax,4)
+# INTEL: {evex}	neg	dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negl	291(%r8,%rax,4)
+# INTEL: {nf}	neg	dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   negl	291(%r8,%rax,4), %ecx
+# INTEL: neg	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negl	291(%r8,%rax,4), %ecx
+# INTEL: {nf}	neg	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	negq	291(%r8,%rax,4)
+# INTEL: {evex}	neg	qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xfc,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negq	291(%r8,%rax,4)
+# INTEL: {nf}	neg	qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xfc,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   negq	291(%r8,%rax,4), %r9
+# INTEL: neg	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xb4,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {nf}	negq	291(%r8,%rax,4), %r9
+# INTEL: {nf}	neg	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xb4,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/not.txt b/llvm/test/MC/Disassembler/X86/apx/not.txt
new file mode 100644
index 00000000000000..e2c4d57fc69da0
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/not.txt
@@ -0,0 +1,66 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   {evex}	notb	%bl
+# INTEL: {evex}	not	bl
+0x62,0xf4,0x7c,0x08,0xf6,0xd3
+
+# ATT:   notb	%bl, %bl
+# INTEL: not	bl, bl
+0x62,0xf4,0x64,0x18,0xf6,0xd3
+
+# ATT:   {evex}	notw	%dx
+# INTEL: {evex}	not	dx
+0x62,0xf4,0x7d,0x08,0xf7,0xd2
+
+# ATT:   notw	%dx, %dx
+# INTEL: not	dx, dx
+0x62,0xf4,0x6d,0x18,0xf7,0xd2
+
+# ATT:   {evex}	notl	%ecx
+# INTEL: {evex}	not	ecx
+0x62,0xf4,0x7c,0x08,0xf7,0xd1
+
+# ATT:   notl	%ecx, %ecx
+# INTEL: not	ecx, ecx
+0x62,0xf4,0x74,0x18,0xf7,0xd1
+
+# ATT:   {evex}	notq	%r9
+# INTEL: {evex}	not	r9
+0x62,0xd4,0xfc,0x08,0xf7,0xd1
+
+# ATT:   notq	%r9, %r9
+# INTEL: not	r9, r9
+0x62,0xd4,0xb4,0x18,0xf7,0xd1
+
+# ATT:   {evex}	notb	291(%r8,%rax,4)
+# INTEL: {evex}	not	byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0xf6,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   notb	291(%r8,%rax,4), %bl
+# INTEL: not	bl, byte ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x64,0x18,0xf6,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	notw	291(%r8,%rax,4)
+# INTEL: {evex}	not	word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7d,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   notw	291(%r8,%rax,4), %dx
+# INTEL: not	dx, word ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x6d,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	notl	291(%r8,%rax,4)
+# INTEL: {evex}	not	dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x7c,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   notl	291(%r8,%rax,4), %ecx
+# INTEL: not	ecx, dword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0x74,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   {evex}	notq	291(%r8,%rax,4)
+# INTEL: {evex}	not	qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xfc,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   notq	291(%r8,%rax,4), %r9
+# INTEL: not	r9, qword ptr [r8 + 4*rax + 291]
+0x62,0xd4,0xb4,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/X86/apx/neg-att.s b/llvm/test/MC/X86/apx/neg-att.s
new file mode 100644
index 00000000000000..c40241b7960d01
--- /dev/null
+++ b/llvm/test/MC/X86/apx/neg-att.s
@@ -0,0 +1,101 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-32: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	negb	%bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf6,0xdb]
+         {evex}	negb	%bl
+# CHECK: {nf}	negb	%bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xf6,0xdb]
+         {nf}	negb	%bl
+# CHECK: negb	%bl, %bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x18,0xf6,0xdb]
+         negb	%bl, %bl
+# CHECK: {nf}	negb	%bl, %bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x1c,0xf6,0xdb]
+         {nf}	negb	%bl, %bl
+# CHECK: {evex}	negw	%dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf7,0xda]
+         {evex}	negw	%dx
+# CHECK: {nf}	negw	%dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0xf7,0xda]
+         {nf}	negw	%dx
+# CHECK: negw	%dx, %dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x18,0xf7,0xda]
+         negw	%dx, %dx
+# CHECK: {nf}	negw	%dx, %dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x1c,0xf7,0xda]
+         {nf}	negw	%dx, %dx
+# CHECK: {evex}	negl	%ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf7,0xd9]
+         {evex}	negl	%ecx
+# CHECK: {nf}	negl	%ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xf7,0xd9]
+         {nf}	negl	%ecx
+# CHECK: negl	%ecx, %ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0xf7,0xd9]
+         negl	%ecx, %ecx
+# CHECK: {nf}	negl	%ecx, %ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0xf7,0xd9]
+         {nf}	negl	%ecx, %ecx
+# CHECK: {evex}	negq	%r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0xd9]
+         {evex}	negq	%r9
+# CHECK: {nf}	negq	%r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0xf7,0xd9]
+         {nf}	negq	%r9
+# CHECK: negq	%r9, %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0xd9]
+         negq	%r9, %r9
+# CHECK: {nf}	negq	%r9, %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0xf7,0xd9]
+         {nf}	negq	%r9, %r9
+# CHECK: {evex}	negb	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	negb	291(%r8,%rax,4)
+# CHECK: {nf}	negb	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negb	291(%r8,%rax,4)
+# CHECK: negb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         negb	291(%r8,%rax,4), %bl
+# CHECK: {nf}	negb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negb	291(%r8,%rax,4), %bl
+# CHECK: {evex}	negw	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	negw	291(%r8,%rax,4)
+# CHECK: {nf}	negw	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negw	291(%r8,%rax,4)
+# CHECK: negw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         negw	291(%r8,%rax,4), %dx
+# CHECK: {nf}	negw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negw	291(%r8,%rax,4), %dx
+# CHECK: {evex}	negl	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	negl	291(%r8,%rax,4)
+# CHECK: {nf}	negl	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negl	291(%r8,%rax,4)
+# CHECK: negl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         negl	291(%r8,%rax,4), %ecx
+# CHECK: {nf}	negl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negl	291(%r8,%rax,4), %ecx
+# CHECK: {evex}	negq	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	negq	291(%r8,%rax,4)
+# CHECK: {nf}	negq	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negq	291(%r8,%rax,4)
+# CHECK: negq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         negq	291(%r8,%rax,4), %r9
+# CHECK: {nf}	negq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	negq	291(%r8,%rax,4), %r9
diff --git a/llvm/test/MC/X86/apx/neg-intel.s b/llvm/test/MC/X86/apx/neg-intel.s
new file mode 100644
index 00000000000000..528c1ba74c1553
--- /dev/null
+++ b/llvm/test/MC/X86/apx/neg-intel.s
@@ -0,0 +1,98 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	neg	bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf6,0xdb]
+         {evex}	neg	bl
+# CHECK: {nf}	neg	bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xf6,0xdb]
+         {nf}	neg	bl
+# CHECK: neg	bl, bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x18,0xf6,0xdb]
+         neg	bl, bl
+# CHECK: {nf}	neg	bl, bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x1c,0xf6,0xdb]
+         {nf}	neg	bl, bl
+# CHECK: {evex}	neg	dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf7,0xda]
+         {evex}	neg	dx
+# CHECK: {nf}	neg	dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0xf7,0xda]
+         {nf}	neg	dx
+# CHECK: neg	dx, dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x18,0xf7,0xda]
+         neg	dx, dx
+# CHECK: {nf}	neg	dx, dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x1c,0xf7,0xda]
+         {nf}	neg	dx, dx
+# CHECK: {evex}	neg	ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf7,0xd9]
+         {evex}	neg	ecx
+# CHECK: {nf}	neg	ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xf7,0xd9]
+         {nf}	neg	ecx
+# CHECK: neg	ecx, ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0xf7,0xd9]
+         neg	ecx, ecx
+# CHECK: {nf}	neg	ecx, ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x1c,0xf7,0xd9]
+         {nf}	neg	ecx, ecx
+# CHECK: {evex}	neg	r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0xd9]
+         {evex}	neg	r9
+# CHECK: {nf}	neg	r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0xf7,0xd9]
+         {nf}	neg	r9
+# CHECK: neg	r9, r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0xd9]
+         neg	r9, r9
+# CHECK: {nf}	neg	r9, r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0xf7,0xd9]
+         {nf}	neg	r9, r9
+# CHECK: {evex}	neg	byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	neg	byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	byte ptr [r8 + 4*rax + 291]
+# CHECK: neg	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         neg	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x64,0x1c,0xf6,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	neg	word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	neg	word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	word ptr [r8 + 4*rax + 291]
+# CHECK: neg	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         neg	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6d,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	neg	dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	neg	dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	dword ptr [r8 + 4*rax + 291]
+# CHECK: neg	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         neg	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	neg	qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {evex}	neg	qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xfc,0x0c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	qword ptr [r8 + 4*rax + 291]
+# CHECK: neg	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         neg	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: {nf}	neg	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xb4,0x1c,0xf7,0x9c,0x80,0x23,0x01,0x00,0x00]
+         {nf}	neg	r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/MC/X86/apx/not-att.s b/llvm/test/MC/X86/apx/not-att.s
new file mode 100644
index 00000000000000..d5b7a406544df1
--- /dev/null
+++ b/llvm/test/MC/X86/apx/not-att.s
@@ -0,0 +1,53 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-16: error:
+# ERROR-NOT: error:
+# CHECK: {evex}	notb	%bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf6,0xd3]
+         {evex}	notb	%bl
+# CHECK: notb	%bl, %bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x18,0xf6,0xd3]
+         notb	%bl, %bl
+# CHECK: {evex}	notw	%dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf7,0xd2]
+         {evex}	notw	%dx
+# CHECK: notw	%dx, %dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x18,0xf7,0xd2]
+         notw	%dx, %dx
+# CHECK: {evex}	notl	%ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf7,0xd1]
+         {evex}	notl	%ecx
+# CHECK: notl	%ecx, %ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0xf7,0xd1]
+         notl	%ecx, %ecx
+# CHECK: {evex}	notq	%r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0xd1]
+         {evex}	notq	%r9
+# CHECK: notq	%r9, %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0xd1]
+         notq	%r9, %r9
+# CHECK: {evex}	notb	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf6,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	notb	291(%r8,%rax,4)
+# CHECK: notb	291(%r8,%rax,4), %bl
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0xf6,0x94,0x80,0x23,0x01,0x00,0x00]
+         notb	291(%r8,%rax,4), %bl
+# CHECK: {evex}	notw	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	notw	291(%r8,%rax,4)
+# CHECK: notw	291(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         notw	291(%r8,%rax,4), %dx
+# CHECK: {evex}	notl	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	notl	291(%r8,%rax,4)
+# CHECK: notl	291(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         notl	291(%r8,%rax,4), %ecx
+# CHECK: {evex}	notq	291(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	notq	291(%r8,%rax,4)
+# CHECK: notq	291(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         notq	291(%r8,%rax,4), %r9
diff --git a/llvm/test/MC/X86/apx/not-intel.s b/llvm/test/MC/X86/apx/not-intel.s
new file mode 100644
index 00000000000000..5e106559a0cb88
--- /dev/null
+++ b/llvm/test/MC/X86/apx/not-intel.s
@@ -0,0 +1,50 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: {evex}	not	bl
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf6,0xd3]
+         {evex}	not	bl
+# CHECK: not	bl, bl
+# CHECK: encoding: [0x62,0xf4,0x64,0x18,0xf6,0xd3]
+         not	bl, bl
+# CHECK: {evex}	not	dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf7,0xd2]
+         {evex}	not	dx
+# CHECK: not	dx, dx
+# CHECK: encoding: [0x62,0xf4,0x6d,0x18,0xf7,0xd2]
+         not	dx, dx
+# CHECK: {evex}	not	ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf7,0xd1]
+         {evex}	not	ecx
+# CHECK: not	ecx, ecx
+# CHECK: encoding: [0x62,0xf4,0x74,0x18,0xf7,0xd1]
+         not	ecx, ecx
+# CHECK: {evex}	not	r9
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0xd1]
+         {evex}	not	r9
+# CHECK: not	r9, r9
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0xd1]
+         not	r9, r9
+# CHECK: {evex}	not	byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf6,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	not	byte ptr [r8 + 4*rax + 291]
+# CHECK: not	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x64,0x18,0xf6,0x94,0x80,0x23,0x01,0x00,0x00]
+         not	bl, byte ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	not	word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	not	word ptr [r8 + 4*rax + 291]
+# CHECK: not	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x6d,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         not	dx, word ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	not	dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	not	dword ptr [r8 + 4*rax + 291]
+# CHECK: not	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0x74,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         not	ecx, dword ptr [r8 + 4*rax + 291]
+# CHECK: {evex}	not	qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xfc,0x08,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         {evex}	not	qword ptr [r8 + 4*rax + 291]
+# CHECK: not	r9, qword ptr [r8 + 4*rax + 291]
+# CHECK: encoding: [0x62,0xd4,0xb4,0x18,0xf7,0x94,0x80,0x23,0x01,0x00,0x00]
+         not	r9, qword ptr [r8 + 4*rax + 291]
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 54eed0286c779d..4e2ba21861d219 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -83,9 +83,13 @@ static const X86FoldTableEntry Table2Addr[] = {
   {X86::INC64r, X86::INC64m, TB_NO_REVERSE},
   {X86::INC8r, X86::INC8m, TB_NO_REVERSE},
   {X86::NEG16r, X86::NEG16m, TB_NO_REVERSE},
+  {X86::NEG16r_NF, X86::NEG16m_NF, TB_NO_REVERSE},
   {X86::NEG32r, X86::NEG32m, TB_NO_REVERSE},
+  {X86::NEG32r_NF, X86::NEG32m_NF, TB_NO_REVERSE},
   {X86::NEG64r, X86::NEG64m, TB_NO_REVERSE},
+  {X86::NEG64r_NF, X86::NEG64m_NF, TB_NO_REVERSE},
   {X86::NEG8r, X86::NEG8m, TB_NO_REVERSE},
+  {X86::NEG8r_NF, X86::NEG8m_NF, TB_NO_REVERSE},
   {X86::NOT16r, X86::NOT16m, TB_NO_REVERSE},
   {X86::NOT32r, X86::NOT32m, TB_NO_REVERSE},
   {X86::NOT64r, X86::NOT64m, TB_NO_REVERSE},
@@ -665,6 +669,18 @@ static const X86FoldTableEntry Table1[] = {
   {X86::MOVZX32rr8_NOREX, X86::MOVZX32rm8_NOREX, 0},
   {X86::MOVZX64rr16, X86::MOVZX64rm16, 0},
   {X86::MOVZX64rr8, X86::MOVZX64rm8, 0},
+  {X86::NEG16r_ND, X86::NEG16m_ND, 0},
+  {X86::NEG16r_NF_ND, X86::NEG16m_NF_ND, 0},
+  {X86::NEG32r_ND, X86::NEG32m_ND, 0},
+  {X86::NEG32r_NF_ND, X86::NEG32m_NF_ND, 0},
+  {X86::NEG64r_ND, X86::NEG64m_ND, 0},
+  {X86::NEG64r_NF_ND, X86::NEG64m_NF_ND, 0},
+  {X86::NEG8r_ND, X86::NEG8m_ND, 0},
+  {X86::NEG8r_NF_ND, X86::NEG8m_NF_ND, 0},
+  {X86::NOT16r_ND, X86::NOT16m_ND, 0},
+  {X86::NOT32r_ND, X86::NOT32m_ND, 0},
+  {X86::NOT64r_ND, X86::NOT64m_ND, 0},
+  {X86::NOT8r_ND, X86::NOT8m_ND, 0},
   {X86::OR16ri8_ND, X86::OR16mi8_ND, 0},
   {X86::OR16ri8_NF_ND, X86::OR16mi8_NF_ND, 0},
   {X86::OR16ri_ND, X86::OR16mi_ND, 0},

>From 1e29dd6ef52f07bde4faac6a8d302777beef3f25 Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 18:01:00 +0800
Subject: [PATCH 3/7] Address review comments

---
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp        | 2 +-
 llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h        | 4 ++--
 llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 6 +++---
 llvm/utils/TableGen/X86RecognizableInstr.h            | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 446a46d0a0443b..051f6caa8c047f 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4001,7 +4001,7 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
-  if (ForcedNoFlag != static_cast<bool>(MCID.TSFlags & X86II::EVEX_NF))
+  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF))
     return Match_Unsupported;
 
   if (ForcedVEXEncoding == VEXEncoding_EVEX &&
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index 43a9ac14954452..90040e99fbdd9a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -996,7 +996,7 @@ inline unsigned getOperandBias(const MCInstrDesc &Desc) {
 }
 
 /// \returns true if the instruction has a NDD (new data destination).
-inline bool isND(uint64_t TSFlags) {
+inline bool hasNewDataDestination(uint64_t TSFlags) {
   return (TSFlags & X86II::OpMapMask) == X86II::T_MAP4 &&
          (TSFlags & X86II::EVEX_B) && (TSFlags & X86II::VEX_4V);
 }
@@ -1027,7 +1027,7 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     return -1;
   case X86II::MRMDestMem:
   case X86II::MRMDestMemFSIB:
-    return isND(TSFlags);
+    return hasNewDataDestination(TSFlags);
   case X86II::MRMSrcMem:
   case X86II::MRMSrcMemFSIB:
     // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 071f415117f30f..b6b41ab21e27af 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1051,7 +1051,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   bool EncodeRC = false;
   uint8_t EVEX_rc = 0;
-  bool IsND = X86II::isND(TSFlags);
+  bool IsND = X86II::hasNewDataDestination(TSFlags);
 
   unsigned CurOp = X86II::getOperandBias(Desc);
 
@@ -1078,7 +1078,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //  MemAddr, src1(ModR/M), imm8
     //
     // NDD:
-    // dst(VEX_4V), MemAddr, src1(ModR/M)
+    //  dst(VEX_4V), MemAddr, src1(ModR/M)
     Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg);
     Prefix.setXX2(MI, MemOperand + X86::AddrIndexReg);
     Prefix.setV2(MI, MemOperand + X86::AddrIndexReg, HasVEX_4V);
@@ -1533,7 +1533,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
 
   unsigned OpcodeOffset = 0;
 
-  bool IsND = X86II::isND(TSFlags);
+  bool IsND = X86II::hasNewDataDestination(TSFlags);
 
   uint64_t Form = TSFlags & X86II::FormMask;
   switch (Form) {
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index 0fb056973c9363..007c700cdfaf76 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -172,7 +172,7 @@ enum { PD = 1, XS = 2, XD = 3, PS = 4 };
 enum { VEX = 1, XOP = 2, EVEX = 3 };
 enum { OpSize16 = 1, OpSize32 = 2 };
 enum { AdSize16 = 1, AdSize32 = 2, AdSize64 = 3 };
-enum { ExplicitREX2 = 1, ExplicitVEX = 2, ExplicitEVEX = 3 };
+enum { ExplicitREX2 = 1, ExplicitEVEX = 3 };
 } // namespace X86Local
 
 namespace X86Disassembler {

>From 57f16f56c44c97d44f4d654255e5413363edd023 Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 18:04:41 +0800
Subject: [PATCH 4/7] hasNewDataDestination -> hasNewDataDest

---
 llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h        | 4 ++--
 llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index 90040e99fbdd9a..e006dd8773609f 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -996,7 +996,7 @@ inline unsigned getOperandBias(const MCInstrDesc &Desc) {
 }
 
 /// \returns true if the instruction has a NDD (new data destination).
-inline bool hasNewDataDestination(uint64_t TSFlags) {
+inline bool hasNewDataDest(uint64_t TSFlags) {
   return (TSFlags & X86II::OpMapMask) == X86II::T_MAP4 &&
          (TSFlags & X86II::EVEX_B) && (TSFlags & X86II::VEX_4V);
 }
@@ -1027,7 +1027,7 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     return -1;
   case X86II::MRMDestMem:
   case X86II::MRMDestMemFSIB:
-    return hasNewDataDestination(TSFlags);
+    return hasNewDataDest(TSFlags);
   case X86II::MRMSrcMem:
   case X86II::MRMSrcMemFSIB:
     // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index b6b41ab21e27af..cb54904f6adec2 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1051,7 +1051,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   bool EncodeRC = false;
   uint8_t EVEX_rc = 0;
-  bool IsND = X86II::hasNewDataDestination(TSFlags);
+  bool IsND = X86II::hasNewDataDest(TSFlags);
 
   unsigned CurOp = X86II::getOperandBias(Desc);
 
@@ -1533,7 +1533,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
 
   unsigned OpcodeOffset = 0;
 
-  bool IsND = X86II::hasNewDataDestination(TSFlags);
+  bool IsND = X86II::hasNewDataDest(TSFlags);
 
   uint64_t Form = TSFlags & X86II::FormMask;
   switch (Form) {

>From a70b2e75f2a3d90aebc59ff9844a0ac9e4349939 Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 18:38:41 +0800
Subject: [PATCH 5/7] Add comments "IsND implies HasVEX_4V"

---
 llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index cb54904f6adec2..924956295e7c60 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -992,6 +992,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   bool HasEVEX_K = TSFlags & X86II::EVEX_K;
   bool HasVEX_4V = TSFlags & X86II::VEX_4V;
+  bool IsND = X86II::hasNewDataDest(TSFlags); // IsND implies HasVEX_4V
   bool HasEVEX_RC = TSFlags & X86II::EVEX_RC;
 
   switch (TSFlags & X86II::OpMapMask) {
@@ -1051,7 +1052,6 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   bool EncodeRC = false;
   uint8_t EVEX_rc = 0;
-  bool IsND = X86II::hasNewDataDest(TSFlags);
 
   unsigned CurOp = X86II::getOperandBias(Desc);
 

>From d1f25f5a3f24f990caae2cc1f24129dd5cfc7d52 Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 18:58:15 +0800
Subject: [PATCH 6/7] Address review comment - Indent code

---
 llvm/lib/Target/X86/X86InstrArithmetic.td | 456 +++++++++++-----------
 1 file changed, 228 insertions(+), 228 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 17a70c70ef77a5..1e8295c5948954 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -721,152 +721,152 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
   let isCommutable = CommutableRR,
       isConvertibleToThreeAddress = ConvertibleToThreeAddressRR in {
     let Predicates = [NoNDD] in {
-    def NAME#8rr  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag>;
-    def NAME#16rr : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag>, OpSize16;
-    def NAME#32rr : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag>, OpSize32;
-    def NAME#64rr : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag>;
+      def NAME#8rr  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag>;
+      def NAME#16rr : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag>, OpSize16;
+      def NAME#32rr : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag>, OpSize32;
+      def NAME#64rr : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag>;
     }
     let Predicates = [HasNDD, In64BitMode] in {
-    def NAME#8rr_ND  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag, 1>;
-    def NAME#16rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag, 1>, PD;
-    def NAME#32rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag, 1>;
-    def NAME#64rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag, 1>;
-    def NAME#8rr_NF_ND  : BinOpRR_R<BaseOpc, mnemonic, Xi8, 1>, EVEX_NF;
-    def NAME#16rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi16, 1>, EVEX_NF, PD;
-    def NAME#32rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi32, 1>, EVEX_NF;
-    def NAME#64rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi64, 1>, EVEX_NF;
+      def NAME#8rr_ND  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , opnodeflag, 1>;
+      def NAME#16rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi16, opnodeflag, 1>, PD;
+      def NAME#32rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi32, opnodeflag, 1>;
+      def NAME#64rr_ND : BinOpRR_RF<BaseOpc, mnemonic, Xi64, opnodeflag, 1>;
+      def NAME#8rr_NF_ND  : BinOpRR_R<BaseOpc, mnemonic, Xi8, 1>, EVEX_NF;
+      def NAME#16rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi16, 1>, EVEX_NF, PD;
+      def NAME#32rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi32, 1>, EVEX_NF;
+      def NAME#64rr_NF_ND : BinOpRR_R<BaseOpc, mnemonic, Xi64, 1>, EVEX_NF;
     }
     let Predicates = [In64BitMode] in {
-    def NAME#8rr_NF  : BinOpRR_R<BaseOpc, mnemonic, Xi8>, NF;
-    def NAME#16rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi16>, NF, PD;
-    def NAME#32rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi32>, NF;
-    def NAME#64rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi64>, NF;
-    def NAME#8rr_EVEX  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
-    def NAME#16rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
-    def NAME#32rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
-    def NAME#64rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+      def NAME#8rr_NF  : BinOpRR_R<BaseOpc, mnemonic, Xi8>, NF;
+      def NAME#16rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi16>, NF, PD;
+      def NAME#32rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi32>, NF;
+      def NAME#64rr_NF : BinOpRR_R<BaseOpc, mnemonic, Xi64>, NF;
+      def NAME#8rr_EVEX  : BinOpRR_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+      def NAME#16rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+      def NAME#32rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+      def NAME#64rr_EVEX : BinOpRR_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
     }
   }
 
-  def NAME#8rr_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>;
-  def NAME#16rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, OpSize16;
-  def NAME#32rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, OpSize32;
-  def NAME#64rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>;
+    def NAME#8rr_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>;
+    def NAME#16rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, OpSize16;
+    def NAME#32rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, OpSize32;
+    def NAME#64rr_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>;
     let Predicates = [In64BitMode] in {
-    def NAME#8rr_EVEX_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
-    def NAME#16rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
-    def NAME#32rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
-    def NAME#64rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
-    def NAME#8rr_ND_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
-    def NAME#16rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
-    def NAME#32rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
-    def NAME#64rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
-    def NAME#8rr_NF_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8>, NF;
-    def NAME#16rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16>, NF, PD;
-    def NAME#32rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32>, NF;
-    def NAME#64rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64>, NF;
-    def NAME#8rr_NF_ND_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
-    def NAME#16rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
-    def NAME#32rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
-    def NAME#64rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
+      def NAME#8rr_EVEX_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
+      def NAME#16rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
+      def NAME#32rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
+      def NAME#64rr_EVEX_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
+      def NAME#8rr_ND_REV  : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
+      def NAME#16rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
+      def NAME#32rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
+      def NAME#64rr_ND_REV : BinOpRR_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
+      def NAME#8rr_NF_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8>, NF;
+      def NAME#16rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16>, NF, PD;
+      def NAME#32rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32>, NF;
+      def NAME#64rr_NF_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64>, NF;
+      def NAME#8rr_NF_ND_REV  : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
+      def NAME#16rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
+      def NAME#32rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
+      def NAME#64rr_NF_ND_REV : BinOpRR_R_Rev<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
     }
 
     let Predicates = [NoNDD] in {
-    def NAME#8rm   : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag>;
-    def NAME#16rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag>, OpSize16;
-    def NAME#32rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag>, OpSize32;
-    def NAME#64rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag>;
+      def NAME#8rm   : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag>;
+      def NAME#16rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag>, OpSize16;
+      def NAME#32rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag>, OpSize32;
+      def NAME#64rm  : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag>;
     }
     let Predicates = [HasNDD, In64BitMode] in {
-    def NAME#8rm_ND  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag, 1>;
-    def NAME#16rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag, 1>, PD;
-    def NAME#32rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag, 1>;
-    def NAME#64rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag, 1>;
-    def NAME#8rm_NF_ND  : BinOpRM_R<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
-    def NAME#16rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
-    def NAME#32rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
-    def NAME#64rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
+      def NAME#8rm_ND  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , opnodeflag, 1>;
+      def NAME#16rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, opnodeflag, 1>, PD;
+      def NAME#32rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, opnodeflag, 1>;
+      def NAME#64rm_ND : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, opnodeflag, 1>;
+      def NAME#8rm_NF_ND  : BinOpRM_R<BaseOpc2, mnemonic, Xi8, 1>, EVEX_NF;
+      def NAME#16rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi16, 1>, EVEX_NF, PD;
+      def NAME#32rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi32, 1>, EVEX_NF;
+      def NAME#64rm_NF_ND : BinOpRM_R<BaseOpc2, mnemonic, Xi64, 1>, EVEX_NF;
     }
     let Predicates = [In64BitMode] in {
-    def NAME#8rm_NF  : BinOpRM_R<BaseOpc2, mnemonic, Xi8>, NF;
-    def NAME#16rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi16>, NF, PD;
-    def NAME#32rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi32>, NF;
-    def NAME#64rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi64>, NF;
-    def NAME#8rm_EVEX  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , null_frag>, PL;
-    def NAME#16rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, null_frag>, PL, PD;
-    def NAME#32rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, null_frag>, PL;
-    def NAME#64rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, null_frag>, PL;
+      def NAME#8rm_NF  : BinOpRM_R<BaseOpc2, mnemonic, Xi8>, NF;
+      def NAME#16rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi16>, NF, PD;
+      def NAME#32rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi32>, NF;
+      def NAME#64rm_NF : BinOpRM_R<BaseOpc2, mnemonic, Xi64>, NF;
+      def NAME#8rm_EVEX  : BinOpRM_RF<BaseOpc2, mnemonic, Xi8 , null_frag>, PL;
+      def NAME#16rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi16, null_frag>, PL, PD;
+      def NAME#32rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi32, null_frag>, PL;
+      def NAME#64rm_EVEX : BinOpRM_RF<BaseOpc2, mnemonic, Xi64, null_frag>, PL;
     }
 
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
       let Predicates = [NoNDD] in {
-      def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
-      // NOTE: These are order specific, we want the ri8 forms to be listed
-      // first so that they are slightly preferred to the ri forms.
-      def NAME#16ri8 : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
-      def NAME#32ri8 : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
-      def NAME#64ri8 : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>;
-      def NAME#16ri  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM>, OpSize16;
-      def NAME#32ri  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM>, OpSize32;
-      def NAME#64ri32: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM>;
+        def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
+        // NOTE: These are order specific, we want the ri8 forms to be listed
+        // first so that they are slightly preferred to the ri forms.
+        def NAME#16ri8 : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
+        def NAME#32ri8 : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
+        def NAME#64ri8 : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>;
+        def NAME#16ri  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM>, OpSize16;
+        def NAME#32ri  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM>, OpSize32;
+        def NAME#64ri32: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM>;
       }
       let Predicates = [HasNDD, In64BitMode] in {
-      def NAME#8ri_ND   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM, 1>;
-      def NAME#16ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
-      def NAME#32ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
-      def NAME#64ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
-      def NAME#16ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM, 1>, PD;
-      def NAME#32ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM, 1>;
-      def NAME#64ri32_ND: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM, 1>;
-      def NAME#8ri_NF_ND  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
-      def NAME#16ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
-      def NAME#32ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
-      def NAME#64ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
-      def NAME#16ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
-      def NAME#32ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
-      def NAME#64ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+        def NAME#8ri_ND   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM, 1>;
+        def NAME#16ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
+        def NAME#32ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
+        def NAME#64ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
+        def NAME#16ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM, 1>, PD;
+        def NAME#32ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM, 1>;
+        def NAME#64ri32_ND: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM, 1>;
+        def NAME#8ri_NF_ND  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
+        def NAME#16ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
+        def NAME#32ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
+        def NAME#64ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+        def NAME#16ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
+        def NAME#32ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
+        def NAME#64ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
       }
       let Predicates = [In64BitMode] in {
-      def NAME#8ri_NF  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
-      def NAME#16ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM>, NF, PD;
-      def NAME#32ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM>, NF;
-      def NAME#64ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM>, NF;
-      def NAME#16ri_NF : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM>, NF, PD;
-      def NAME#32ri_NF : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM>, NF;
-      def NAME#64ri_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
-      def NAME#8ri_EVEX   : BinOpRI_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
-      def NAME#16ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
-      def NAME#32ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
-      def NAME#64ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
-      def NAME#16ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi16, null_frag, RegMRM>, PL, PD;
-      def NAME#32ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi32, null_frag, RegMRM>, PL;
-      def NAME#64ri32_EVEX: BinOpRI_RF<0x81, mnemonic, Xi64, null_frag, RegMRM>, PL;
+        def NAME#8ri_NF  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
+        def NAME#16ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM>, NF, PD;
+        def NAME#32ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM>, NF;
+        def NAME#64ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM>, NF;
+        def NAME#16ri_NF : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM>, NF, PD;
+        def NAME#32ri_NF : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM>, NF;
+        def NAME#64ri_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
+        def NAME#8ri_EVEX   : BinOpRI_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
+        def NAME#16ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
+        def NAME#32ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
+        def NAME#64ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
+        def NAME#16ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi16, null_frag, RegMRM>, PL, PD;
+        def NAME#32ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi32, null_frag, RegMRM>, PL;
+        def NAME#64ri32_EVEX: BinOpRI_RF<0x81, mnemonic, Xi64, null_frag, RegMRM>, PL;
       }
     }
 
-  def NAME#8mr    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , opnode>;
-  def NAME#16mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
-  def NAME#32mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
-  def NAME#64mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, opnode>;
-  let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8mr_ND    : BinOpMR_RF<BaseOpc, mnemonic, Xi8 , opnode>;
-  def NAME#16mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
-  def NAME#32mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi32, opnode>;
-  def NAME#64mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi64, opnode>;
-  def NAME#8mr_NF_ND    : BinOpMR_R<BaseOpc, mnemonic, Xi8>, EVEX_NF;
-  def NAME#16mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi16>, EVEX_NF, PD;
-  def NAME#32mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi32>, EVEX_NF;
-  def NAME#64mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi64>, EVEX_NF;
+    def NAME#8mr    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , opnode>;
+    def NAME#16mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
+    def NAME#32mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
+    def NAME#64mr   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, opnode>;
+    let Predicates = [HasNDD, In64BitMode] in {
+    def NAME#8mr_ND    : BinOpMR_RF<BaseOpc, mnemonic, Xi8 , opnode>;
+    def NAME#16mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
+    def NAME#32mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi32, opnode>;
+    def NAME#64mr_ND   : BinOpMR_RF<BaseOpc, mnemonic, Xi64, opnode>;
+    def NAME#8mr_NF_ND    : BinOpMR_R<BaseOpc, mnemonic, Xi8>, EVEX_NF;
+    def NAME#16mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi16>, EVEX_NF, PD;
+    def NAME#32mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi32>, EVEX_NF;
+    def NAME#64mr_NF_ND   : BinOpMR_R<BaseOpc, mnemonic, Xi64>, EVEX_NF;
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8mr_NF    : BinOpMR_M<BaseOpc, mnemonic, Xi8>, NF;
-  def NAME#16mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi16>, NF, PD;
-  def NAME#32mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi32>, NF;
-  def NAME#64mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi64>, NF;
-  def NAME#8mr_EVEX    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
-  def NAME#16mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
-  def NAME#32mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
-  def NAME#64mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+    def NAME#8mr_NF    : BinOpMR_M<BaseOpc, mnemonic, Xi8>, NF;
+    def NAME#16mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi16>, NF, PD;
+    def NAME#32mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi32>, NF;
+    def NAME#64mr_NF   : BinOpMR_M<BaseOpc, mnemonic, Xi64>, NF;
+    def NAME#8mr_EVEX    : BinOpMR_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+    def NAME#16mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+    def NAME#32mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+    def NAME#64mr_EVEX   : BinOpMR_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
   }
 
   // NOTE: These are order specific, we want the mi8 forms to be listed
@@ -875,42 +875,42 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
   def NAME#16mi8  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, OpSize16;
   def NAME#32mi8  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
-  def NAME#64mi8  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>;
+    def NAME#64mi8  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>;
   def NAME#16mi   : BinOpMI_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, OpSize16;
   def NAME#32mi   : BinOpMI_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
-  def NAME#64mi32 : BinOpMI_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+    def NAME#64mi32 : BinOpMI_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
   let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8mi_ND    : BinOpMI_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
-  def NAME#16mi8_ND  : BinOpMI8_RF<mnemonic, Xi16, MemMRM>, PD;
-  def NAME#32mi8_ND  : BinOpMI8_RF<mnemonic, Xi32, MemMRM>;
-  def NAME#64mi8_ND  : BinOpMI8_RF<mnemonic, Xi64, MemMRM>;
-  def NAME#16mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
-  def NAME#32mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
-  def NAME#64mi32_ND : BinOpMI_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
-  def NAME#8mi_NF_ND    : BinOpMI_R<0x80, mnemonic, Xi8, MemMRM>, NF;
-  def NAME#16mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi16, MemMRM>, NF, PD;
-  def NAME#32mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi32, MemMRM>, NF;
-  def NAME#64mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi64, MemMRM>, NF;
-  def NAME#16mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
-  def NAME#32mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi32, MemMRM>, NF;
-  def NAME#64mi32_NF_ND : BinOpMI_R<0x81, mnemonic, Xi64, MemMRM>, NF;
+    def NAME#8mi_ND    : BinOpMI_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
+    def NAME#16mi8_ND  : BinOpMI8_RF<mnemonic, Xi16, MemMRM>, PD;
+    def NAME#32mi8_ND  : BinOpMI8_RF<mnemonic, Xi32, MemMRM>;
+    def NAME#64mi8_ND  : BinOpMI8_RF<mnemonic, Xi64, MemMRM>;
+    def NAME#16mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
+    def NAME#32mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
+    def NAME#64mi32_ND : BinOpMI_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+    def NAME#8mi_NF_ND    : BinOpMI_R<0x80, mnemonic, Xi8, MemMRM>, NF;
+    def NAME#16mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi16, MemMRM>, NF, PD;
+    def NAME#32mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi32, MemMRM>, NF;
+    def NAME#64mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi64, MemMRM>, NF;
+    def NAME#16mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
+    def NAME#32mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi32, MemMRM>, NF;
+    def NAME#64mi32_NF_ND : BinOpMI_R<0x81, mnemonic, Xi64, MemMRM>, NF;
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8mi_NF    : BinOpMI_M<0x80, mnemonic, Xi8, MemMRM>, NF;
-  def NAME#16mi8_NF  : BinOpMI8_M<mnemonic, Xi16, MemMRM>, NF, PD;
-  def NAME#32mi8_NF  : BinOpMI8_M<mnemonic, Xi32, MemMRM>, NF;
-  def NAME#64mi8_NF  : BinOpMI8_M<mnemonic, Xi64, MemMRM>, NF;
-  def NAME#16mi_NF   : BinOpMI_M<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
-  def NAME#32mi_NF   : BinOpMI_M<0x81, mnemonic, Xi32, MemMRM>, NF;
-  def NAME#64mi32_NF : BinOpMI_M<0x81, mnemonic, Xi64, MemMRM>, NF;
-  def NAME#8mi_EVEX    : BinOpMI_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
-  def NAME#16mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, PL, PD;
-  def NAME#32mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, PL;
-  def NAME#64mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>, PL;
-  def NAME#16mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi16, null_frag, MemMRM>, PL, PD;
-  def NAME#32mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi32, null_frag, MemMRM>, PL;
-  def NAME#64mi32_EVEX : BinOpMI_MF<0x81, mnemonic, Xi64, null_frag, MemMRM>, PL;
+    def NAME#8mi_NF    : BinOpMI_M<0x80, mnemonic, Xi8, MemMRM>, NF;
+    def NAME#16mi8_NF  : BinOpMI8_M<mnemonic, Xi16, MemMRM>, NF, PD;
+    def NAME#32mi8_NF  : BinOpMI8_M<mnemonic, Xi32, MemMRM>, NF;
+    def NAME#64mi8_NF  : BinOpMI8_M<mnemonic, Xi64, MemMRM>, NF;
+    def NAME#16mi_NF   : BinOpMI_M<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
+    def NAME#32mi_NF   : BinOpMI_M<0x81, mnemonic, Xi32, MemMRM>, NF;
+    def NAME#64mi32_NF : BinOpMI_M<0x81, mnemonic, Xi64, MemMRM>, NF;
+    def NAME#8mi_EVEX    : BinOpMI_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
+    def NAME#16mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, PL, PD;
+    def NAME#32mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, PL;
+    def NAME#64mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>, PL;
+    def NAME#16mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi16, null_frag, MemMRM>, PL, PD;
+    def NAME#32mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi32, null_frag, MemMRM>, PL;
+    def NAME#64mi32_EVEX : BinOpMI_MF<0x81, mnemonic, Xi64, null_frag, MemMRM>, PL;
   }
 
   // These are for the disassembler since 0x82 opcode behaves like 0x80, but
@@ -943,28 +943,28 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
                            bit ConvertibleToThreeAddress> {
   let isCommutable = CommutableRR in {
     let Predicates = [NoNDD] in {
-    def NAME#8rr  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
+      def NAME#8rr  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
       let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
-      def NAME#16rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
-      def NAME#32rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
-      def NAME#64rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
+        def NAME#16rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode>, OpSize16;
+        def NAME#32rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
+        def NAME#64rr : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
       }
     }
     let Predicates = [HasNDD, In64BitMode] in {
-    def NAME#8rr_ND  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode, 1>;
+      def NAME#8rr_ND  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , opnode, 1>;
       let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
-      def NAME#16rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode, 1>, PD;
-      def NAME#32rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode, 1>;
-      def NAME#64rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode, 1>;
+        def NAME#16rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, opnode, 1>, PD;
+        def NAME#32rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, opnode, 1>;
+        def NAME#64rr_ND : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, opnode, 1>;
       }
     }
   } // isCommutable
 
   let Predicates = [In64BitMode] in {
-  def NAME#8rr_EVEX  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
-  def NAME#16rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
-  def NAME#32rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
-  def NAME#64rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+    def NAME#8rr_EVEX  : BinOpRRF_RF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+    def NAME#16rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+    def NAME#32rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+    def NAME#64rr_EVEX : BinOpRRF_RF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
   }
 
   def NAME#8rr_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8>;
@@ -972,69 +972,69 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
   def NAME#32rr_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32>, OpSize32;
   def NAME#64rr_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64>;
   let Predicates = [In64BitMode] in {
-  def NAME#8rr_ND_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
-  def NAME#16rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
-  def NAME#32rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
-  def NAME#64rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
-  def NAME#8rr_EVEX_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
-  def NAME#16rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
-  def NAME#32rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
-  def NAME#64rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
+    def NAME#8rr_ND_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8, 1>;
+    def NAME#16rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16, 1>, PD;
+    def NAME#32rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32, 1>;
+    def NAME#64rr_ND_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64, 1>;
+    def NAME#8rr_EVEX_REV  : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi8>, PL;
+    def NAME#16rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi16>, PL, PD;
+    def NAME#32rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi32>, PL;
+    def NAME#64rr_EVEX_REV : BinOpRRF_RF_Rev<BaseOpc2, mnemonic, Xi64>, PL;
   }
 
   let Predicates = [NoNDD] in {
-  def NAME#8rm   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>;
-  def NAME#16rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, OpSize16;
-  def NAME#32rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, OpSize32;
-  def NAME#64rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>;
+    def NAME#8rm   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>;
+    def NAME#16rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, OpSize16;
+    def NAME#32rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, OpSize32;
+    def NAME#64rm  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>;
   }
   let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8rm_ND   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode, 1>;
-  def NAME#16rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode, 1>, PD;
-  def NAME#32rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode, 1>;
-  def NAME#64rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode, 1>;
+    def NAME#8rm_ND   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode, 1>;
+    def NAME#16rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode, 1>, PD;
+    def NAME#32rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode, 1>;
+    def NAME#64rm_ND  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode, 1>;
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8rm_EVEX   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>, PL;
-  def NAME#16rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, PL, PD;
-  def NAME#32rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, PL;
-  def NAME#64rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>, PL;
+    def NAME#8rm_EVEX   : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>, PL;
+    def NAME#16rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, PL, PD;
+    def NAME#32rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, PL;
+    def NAME#64rm_EVEX  : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>, PL;
   }
 
   let Predicates = [NoNDD] in {
-  def NAME#8ri   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>;
+    def NAME#8ri   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>;
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
-    // NOTE: These are order specific, we want the ri8 forms to be listed
-    // first so that they are slightly preferred to the ri forms.
-    def NAME#16ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
-    def NAME#32ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
-    def NAME#64ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>;
-
-    def NAME#16ri  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, OpSize16;
-    def NAME#32ri  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, OpSize32;
-    def NAME#64ri32: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>;
+      // NOTE: These are order specific, we want the ri8 forms to be listed
+      // first so that they are slightly preferred to the ri forms.
+      def NAME#16ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
+      def NAME#32ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
+      def NAME#64ri8 : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>;
+
+      def NAME#16ri  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, OpSize16;
+      def NAME#32ri  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, OpSize32;
+      def NAME#64ri32: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>;
     }
   }
 
   let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8ri_ND   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM, 1>;
+    def NAME#8ri_ND   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM, 1>;
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
-    def NAME#16ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
-    def NAME#32ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
-    def NAME#64ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
-    def NAME#16ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM, 1>, PD;
-    def NAME#32ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM, 1>;
-    def NAME#64ri32_ND: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM, 1>;
+      def NAME#16ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
+      def NAME#32ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
+      def NAME#64ri8_ND : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
+      def NAME#16ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM, 1>, PD;
+      def NAME#32ri_ND  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM, 1>;
+      def NAME#64ri32_ND: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM, 1>;
     }
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8ri_EVEX   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>, PL;
-  def NAME#16ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
-  def NAME#32ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
-  def NAME#64ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
-  def NAME#16ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, PL, PD;
-  def NAME#32ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, PL;
-  def NAME#64ri32_EVEX: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>, PL;
+    def NAME#8ri_EVEX   : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>, PL;
+    def NAME#16ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
+    def NAME#32ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
+    def NAME#64ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
+    def NAME#16ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, PL, PD;
+    def NAME#32ri_EVEX  : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, PL;
+    def NAME#64ri32_EVEX: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>, PL;
   }
 
   def NAME#8mr    : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , opnode>;
@@ -1042,16 +1042,16 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
   def NAME#32mr   : BinOpMRF_MF<BaseOpc, mnemonic, Xi32, opnode>, OpSize32;
   def NAME#64mr   : BinOpMRF_MF<BaseOpc, mnemonic, Xi64, opnode>;
   let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8mr_ND    : BinOpMRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
-  def NAME#16mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
-  def NAME#32mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi32, opnode>;
-  def NAME#64mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
+    def NAME#8mr_ND    : BinOpMRF_RF<BaseOpc, mnemonic, Xi8 , opnode>;
+    def NAME#16mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi16, opnode>, PD;
+    def NAME#32mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi32, opnode>;
+    def NAME#64mr_ND   : BinOpMRF_RF<BaseOpc, mnemonic, Xi64, opnode>;
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8mr_EVEX    : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
-  def NAME#16mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
-  def NAME#32mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
-  def NAME#64mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
+    def NAME#8mr_EVEX    : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , null_frag>, PL;
+    def NAME#16mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi16, null_frag>, PL, PD;
+    def NAME#32mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi32, null_frag>, PL;
+    def NAME#64mr_EVEX   : BinOpMRF_MF<BaseOpc, mnemonic, Xi64, null_frag>, PL;
   }
 
   // NOTE: These are order specific, we want the mi8 forms to be listed
@@ -1060,29 +1060,29 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
   def NAME#16mi8  : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, OpSize16;
   def NAME#32mi8  : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
-  def NAME#64mi8  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>;
+    def NAME#64mi8  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>;
   def NAME#16mi   : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, OpSize16;
   def NAME#32mi   : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
-  def NAME#64mi32 : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+    def NAME#64mi32 : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
 
   let Predicates = [HasNDD, In64BitMode] in {
-  def NAME#8mi_ND    : BinOpMIF_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
-  def NAME#16mi8_ND  : BinOpMI8F_RF<mnemonic, Xi16, MemMRM>, PD;
-  def NAME#32mi8_ND  : BinOpMI8F_RF<mnemonic, Xi32, MemMRM>;
-  def NAME#64mi8_ND  : BinOpMI8F_RF<mnemonic, Xi64, MemMRM>;
-  def NAME#16mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
-  def NAME#32mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
-  def NAME#64mi32_ND : BinOpMIF_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
+    def NAME#8mi_ND    : BinOpMIF_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
+    def NAME#16mi8_ND  : BinOpMI8F_RF<mnemonic, Xi16, MemMRM>, PD;
+    def NAME#32mi8_ND  : BinOpMI8F_RF<mnemonic, Xi32, MemMRM>;
+    def NAME#64mi8_ND  : BinOpMI8F_RF<mnemonic, Xi64, MemMRM>;
+    def NAME#16mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
+    def NAME#32mi_ND   : BinOpMIF_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
+    def NAME#64mi32_ND : BinOpMIF_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
   }
   let Predicates = [In64BitMode] in {
-  def NAME#8mi_EVEX    : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>, PL;
-  def NAME#16mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, PL, PD;
-  def NAME#32mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, PL;
-  def NAME#64mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>, PL;
-  def NAME#16mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, PL, PD;
-  def NAME#32mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, PL;
-  def NAME#64mi32_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>, PL;
+    def NAME#8mi_EVEX    : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>, PL;
+    def NAME#16mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, PL, PD;
+    def NAME#32mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, PL;
+    def NAME#64mi8_EVEX  : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>, PL;
+    def NAME#16mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, PL, PD;
+    def NAME#32mi_EVEX   : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, PL;
+    def NAME#64mi32_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>, PL;
   }
 
   // These are for the disassembler since 0x82 opcode behaves like 0x80, but

>From 26e9e46663c99c446a3cac9323d549fd96265e75 Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Wed, 27 Dec 2023 20:39:51 +0800
Subject: [PATCH 7/7] reorder  NAME#8mi

---
 llvm/lib/Target/X86/X86InstrArithmetic.td | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 1e8295c5948954..cd9ad091143cdf 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -800,44 +800,44 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
 
     let isConvertibleToThreeAddress = ConvertibleToThreeAddress in {
       let Predicates = [NoNDD] in {
-        def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
         // NOTE: These are order specific, we want the ri8 forms to be listed
         // first so that they are slightly preferred to the ri forms.
         def NAME#16ri8 : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, OpSize16;
         def NAME#32ri8 : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, OpSize32;
         def NAME#64ri8 : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>;
+        def NAME#8ri   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>;
         def NAME#16ri  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM>, OpSize16;
         def NAME#32ri  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM>, OpSize32;
         def NAME#64ri32: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM>;
       }
       let Predicates = [HasNDD, In64BitMode] in {
-        def NAME#8ri_ND   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM, 1>;
         def NAME#16ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM, 1>, PD;
         def NAME#32ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM, 1>;
         def NAME#64ri8_ND : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM, 1>;
+        def NAME#8ri_ND   : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM, 1>;
         def NAME#16ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi16, opnodeflag, RegMRM, 1>, PD;
         def NAME#32ri_ND  : BinOpRI_RF<0x81, mnemonic, Xi32, opnodeflag, RegMRM, 1>;
         def NAME#64ri32_ND: BinOpRI_RF<0x81, mnemonic, Xi64, opnodeflag, RegMRM, 1>;
-        def NAME#8ri_NF_ND  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
         def NAME#16ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
         def NAME#32ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
         def NAME#64ri8_NF_ND : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
+        def NAME#8ri_NF_ND  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM, 1>, EVEX_NF;
         def NAME#16ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM, 1>, EVEX_NF, PD;
         def NAME#32ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM, 1>, EVEX_NF;
         def NAME#64ri_NF_ND : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM, 1>, EVEX_NF;
       }
       let Predicates = [In64BitMode] in {
-        def NAME#8ri_NF  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
         def NAME#16ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi16, RegMRM>, NF, PD;
         def NAME#32ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi32, RegMRM>, NF;
         def NAME#64ri8_NF : BinOpRI8_R<0x83, mnemonic, Xi64, RegMRM>, NF;
+        def NAME#8ri_NF  : BinOpRI_R<0x80, mnemonic, Xi8, RegMRM>, NF;
         def NAME#16ri_NF : BinOpRI_R<0x81, mnemonic, Xi16, RegMRM>, NF, PD;
         def NAME#32ri_NF : BinOpRI_R<0x81, mnemonic, Xi32, RegMRM>, NF;
         def NAME#64ri_NF : BinOpRI_R<0x81, mnemonic, Xi64, RegMRM>, NF;
-        def NAME#8ri_EVEX   : BinOpRI_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
         def NAME#16ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
         def NAME#32ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
         def NAME#64ri8_EVEX : BinOpRI8_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
+        def NAME#8ri_EVEX   : BinOpRI_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
         def NAME#16ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi16, null_frag, RegMRM>, PL, PD;
         def NAME#32ri_EVEX  : BinOpRI_RF<0x81, mnemonic, Xi32, null_frag, RegMRM>, PL;
         def NAME#64ri32_EVEX: BinOpRI_RF<0x81, mnemonic, Xi64, null_frag, RegMRM>, PL;
@@ -871,43 +871,43 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
 
   // NOTE: These are order specific, we want the mi8 forms to be listed
   // first so that they are slightly preferred to the mi forms.
-  def NAME#8mi    : BinOpMI_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi8  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, OpSize16;
   def NAME#32mi8  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
     def NAME#64mi8  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>;
+  def NAME#8mi    : BinOpMI_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
   def NAME#16mi   : BinOpMI_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, OpSize16;
   def NAME#32mi   : BinOpMI_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, OpSize32;
   let Predicates = [In64BitMode] in
     def NAME#64mi32 : BinOpMI_MF<0x81, mnemonic, Xi64, opnode, MemMRM>;
   let Predicates = [HasNDD, In64BitMode] in {
-    def NAME#8mi_ND    : BinOpMI_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
     def NAME#16mi8_ND  : BinOpMI8_RF<mnemonic, Xi16, MemMRM>, PD;
     def NAME#32mi8_ND  : BinOpMI8_RF<mnemonic, Xi32, MemMRM>;
     def NAME#64mi8_ND  : BinOpMI8_RF<mnemonic, Xi64, MemMRM>;
+    def NAME#8mi_ND    : BinOpMI_RF<0x80, mnemonic, Xi8 , opnode, MemMRM>;
     def NAME#16mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi16, opnode, MemMRM>, PD;
     def NAME#32mi_ND   : BinOpMI_RF<0x81, mnemonic, Xi32, opnode, MemMRM>;
     def NAME#64mi32_ND : BinOpMI_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
-    def NAME#8mi_NF_ND    : BinOpMI_R<0x80, mnemonic, Xi8, MemMRM>, NF;
     def NAME#16mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi16, MemMRM>, NF, PD;
     def NAME#32mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi32, MemMRM>, NF;
     def NAME#64mi8_NF_ND  : BinOpMI8_R<mnemonic, Xi64, MemMRM>, NF;
+    def NAME#8mi_NF_ND    : BinOpMI_R<0x80, mnemonic, Xi8, MemMRM>, NF;
     def NAME#16mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
     def NAME#32mi_NF_ND   : BinOpMI_R<0x81, mnemonic, Xi32, MemMRM>, NF;
     def NAME#64mi32_NF_ND : BinOpMI_R<0x81, mnemonic, Xi64, MemMRM>, NF;
   }
   let Predicates = [In64BitMode] in {
-    def NAME#8mi_NF    : BinOpMI_M<0x80, mnemonic, Xi8, MemMRM>, NF;
     def NAME#16mi8_NF  : BinOpMI8_M<mnemonic, Xi16, MemMRM>, NF, PD;
     def NAME#32mi8_NF  : BinOpMI8_M<mnemonic, Xi32, MemMRM>, NF;
     def NAME#64mi8_NF  : BinOpMI8_M<mnemonic, Xi64, MemMRM>, NF;
+    def NAME#8mi_NF    : BinOpMI_M<0x80, mnemonic, Xi8, MemMRM>, NF;
     def NAME#16mi_NF   : BinOpMI_M<0x81, mnemonic, Xi16, MemMRM>, NF, PD;
     def NAME#32mi_NF   : BinOpMI_M<0x81, mnemonic, Xi32, MemMRM>, NF;
     def NAME#64mi32_NF : BinOpMI_M<0x81, mnemonic, Xi64, MemMRM>, NF;
-    def NAME#8mi_EVEX    : BinOpMI_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
     def NAME#16mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi16, MemMRM>, PL, PD;
     def NAME#32mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi32, MemMRM>, PL;
     def NAME#64mi8_EVEX  : BinOpMI8_MF<mnemonic, Xi64, MemMRM>, PL;
+    def NAME#8mi_EVEX    : BinOpMI_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
     def NAME#16mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi16, null_frag, MemMRM>, PL, PD;
     def NAME#32mi_EVEX   : BinOpMI_MF<0x81, mnemonic, Xi32, null_frag, MemMRM>, PL;
     def NAME#64mi32_EVEX : BinOpMI_MF<0x81, mnemonic, Xi64, null_frag, MemMRM>, PL;



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