[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 27 01:31:47 PST 2023
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@@ -172,7 +172,7 @@ enum { PD = 1, XS = 2, XD = 3, PS = 4 };
enum { VEX = 1, XOP = 2, EVEX = 3 };
enum { OpSize16 = 1, OpSize32 = 2 };
enum { AdSize16 = 1, AdSize32 = 2, AdSize64 = 3 };
-enum { ExplicitREX2 = 1 };
+enum { ExplicitREX2 = 1, ExplicitVEX = 2, ExplicitEVEX = 3 };
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KanRobert wrote:
It's not used. Let me remove it.
https://github.com/llvm/llvm-project/pull/76319
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