[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 27 01:19:34 PST 2023


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@@ -1576,6 +1603,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
 
     if (HasVEX_4V) // Skip 1st src (which is encoded in VEX_VVVV)
       ++SrcRegNum;
+    if (IsND) // Skip the NDD operand encoded in EVEX_VVVV
+      ++CurOp;
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KanRobert wrote:

It's already updated. `IsND` implies `HasVEX_4V`.

https://github.com/llvm/llvm-project/pull/76319


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