[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 27 00:53:30 PST 2023


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@@ -3996,6 +4001,8 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
+  if (ForcedNoFlag != static_cast<bool>(MCID.TSFlags & X86II::EVEX_NF))
----------------
KanRobert wrote:

Will use `!!`.  No, the logic is 

1. NF instruction can be matched only when {nf} exsits
2.  non-NF instruction can not be matched when {nf} exists

so the suggested code does not work. 

https://github.com/llvm/llvm-project/pull/76319


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