[llvm] [RISCV] Update DecoderMethod and MCOperandPredicate of spimm. (PR #76061)

[Yeting Kuo via llvm-commits]

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@@ -462,10 +462,10 @@ static DecodeStatus decodeRegReg(MCInst &Inst, uint32_t Insn, uint64_t Address,
   return MCDisassembler::Success;
 }
 
-// spimm is based on rlist now.
 static DecodeStatus decodeZcmpSpimm(MCInst &Inst, unsigned Imm,
                                     uint64_t Address, const void *Decoder) {
-  // TODO: check if spimm matches rlist
+  if (!isShiftedUInt<2, 4>(Imm))
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yetingk wrote:

Done. Sorry I didn't survey enough code about this.

https://github.com/llvm/llvm-project/pull/76061