[llvm] [X86][MC] Support Enc/Dec for EGPR for promoted AMX-TILE instruction (PR #76210)

via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 24 19:13:39 PST 2023


https://github.com/XinWang10 updated https://github.com/llvm/llvm-project/pull/76210

>From e45a4027edf6bc411de7215e803d74f91afb52d5 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Thu, 21 Dec 2023 19:30:53 -0800
Subject: [PATCH 1/2] [X86][MC] Support Enc/Dec for EGPR for promoted AMX-TILE
 instruction

---
 llvm/lib/Target/X86/X86InstrAMX.td            | 65 ++++++++++++++-----
 .../MC/Disassembler/X86/apx/ldtilecfg.txt     |  6 ++
 .../MC/Disassembler/X86/apx/sttilecfg.txt     |  6 ++
 .../MC/Disassembler/X86/apx/tileloadd.txt     |  6 ++
 .../MC/Disassembler/X86/apx/tileloaddt1.txt   |  6 ++
 .../MC/Disassembler/X86/apx/tilestored.txt    |  6 ++
 llvm/test/MC/X86/apx/ldtilecfg-att.s          |  5 ++
 llvm/test/MC/X86/apx/ldtilecfg-intel.s        |  5 ++
 llvm/test/MC/X86/apx/sttilecfg-att.s          |  5 ++
 llvm/test/MC/X86/apx/sttilecfg-intel.s        |  5 ++
 llvm/test/MC/X86/apx/tileloadd-att.s          |  5 ++
 llvm/test/MC/X86/apx/tileloadd-intel.s        |  5 ++
 llvm/test/MC/X86/apx/tileloaddt1-att.s        |  5 ++
 llvm/test/MC/X86/apx/tileloaddt1-intel.s      |  5 ++
 llvm/test/MC/X86/apx/tilestored-att.s         |  5 ++
 llvm/test/MC/X86/apx/tilestored-intel.s       |  5 ++
 16 files changed, 129 insertions(+), 16 deletions(-)
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/tilestored.txt
 create mode 100644 llvm/test/MC/X86/apx/ldtilecfg-att.s
 create mode 100644 llvm/test/MC/X86/apx/ldtilecfg-intel.s
 create mode 100644 llvm/test/MC/X86/apx/sttilecfg-att.s
 create mode 100644 llvm/test/MC/X86/apx/sttilecfg-intel.s
 create mode 100644 llvm/test/MC/X86/apx/tileloadd-att.s
 create mode 100644 llvm/test/MC/X86/apx/tileloadd-intel.s
 create mode 100644 llvm/test/MC/X86/apx/tileloaddt1-att.s
 create mode 100644 llvm/test/MC/X86/apx/tileloaddt1-intel.s
 create mode 100644 llvm/test/MC/X86/apx/tilestored-att.s
 create mode 100644 llvm/test/MC/X86/apx/tilestored-intel.s

diff --git a/llvm/lib/Target/X86/X86InstrAMX.td b/llvm/lib/Target/X86/X86InstrAMX.td
index a4292b99511bbd..8319e99216f4f6 100644
--- a/llvm/lib/Target/X86/X86InstrAMX.td
+++ b/llvm/lib/Target/X86/X86InstrAMX.td
@@ -14,35 +14,68 @@
 //===----------------------------------------------------------------------===//
 // AMX instructions
 
-let Predicates = [HasAMXTILE, In64BitMode] in {
-  let SchedRW = [WriteSystem] in {
+let SchedRW = [WriteSystem] in {
+  let Predicates = [HasAMXTILE, NoEGPR, In64BitMode] in {
     let hasSideEffects = 1,
         Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
-    def LDTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
-                       "ldtilecfg\t$src",
-                       [(int_x86_ldtilecfg addr:$src)]>, VEX, T8, PS;
+    def LDTILECFG : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+                      "ldtilecfg\t$src",
+                      [(int_x86_ldtilecfg addr:$src)]>,
+                    VEX, T8, PS;
     let hasSideEffects = 1 in
-    def STTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
-                       "sttilecfg\t$src",
-                       [(int_x86_sttilecfg addr:$src)]>, VEX, T8, PD;
+    def STTILECFG : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+                      "sttilecfg\t$src",
+                      [(int_x86_sttilecfg addr:$src)]>,
+                    VEX, T8, PD;
     let mayLoad = 1 in
     def TILELOADD : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
                       (ins sibmem:$src),
                       "tileloadd\t{$src, $dst|$dst, $src}", []>,
-                      VEX, T8, XD;
+                    VEX, T8, XD;
     let mayLoad = 1 in
     def TILELOADDT1 : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
                         (ins sibmem:$src),
                         "tileloaddt1\t{$src, $dst|$dst, $src}", []>,
-                        VEX, T8, PD;
-    let Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
-    def TILERELEASE : I<0x49, MRM_C0, (outs), (ins),
-                        "tilerelease", [(int_x86_tilerelease)]>, VEX, T8, PS;
+                      VEX, T8, PD;
     let mayStore = 1 in
     def TILESTORED : I<0x4b, MRMDestMemFSIB, (outs),
                        (ins sibmem:$dst, TILE:$src),
                        "tilestored\t{$src, $dst|$dst, $src}", []>,
-                       VEX, T8, XS;
+                      VEX, T8, XS;
+  } // HasAMXTILE, NoEGPR
+  let Predicates = [HasAMXTILE, HasEGPR, In64BitMode] in {
+    let hasSideEffects = 1,
+        Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
+    def LDTILECFG_EVEX : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+                           "ldtilecfg\t$src",
+                           [(int_x86_ldtilecfg addr:$src)]>,
+                         EVEX, NoCD8, T8, PS;
+    let hasSideEffects = 1 in
+    def STTILECFG_EVEX : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+                           "sttilecfg\t$src",
+                           [(int_x86_sttilecfg addr:$src)]>,
+                         EVEX, NoCD8, T8, PD;
+    let mayLoad = 1 in
+    def TILELOADD_EVEX : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
+                           (ins sibmem:$src),
+                           "tileloadd\t{$src, $dst|$dst, $src}", []>,
+                         EVEX, NoCD8, T8, XD;
+    let mayLoad = 1 in
+    def TILELOADDT1_EVEX : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
+                             (ins sibmem:$src),
+                             "tileloaddt1\t{$src, $dst|$dst, $src}", []>,
+                           EVEX, NoCD8, T8, PD;
+    let mayStore = 1 in
+    def TILESTORED_EVEX : I<0x4b, MRMDestMemFSIB, (outs),
+                            (ins sibmem:$dst, TILE:$src),
+                            "tilestored\t{$src, $dst|$dst, $src}", []>,
+                          EVEX, NoCD8, T8, XS;
+  } // HasAMXTILE, HasEGPR
+  let Predicates = [HasAMXTILE, In64BitMode] in {
+    let Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
+    def TILERELEASE : I<0x49, MRM_C0, (outs), (ins),
+                        "tilerelease", [(int_x86_tilerelease)]>,
+                      VEX, T8, PS;
     def TILEZERO : I<0x49, MRMr0, (outs TILE:$dst), (ins),
                      "tilezero\t$dst", []>,
                      VEX, T8, XD;
@@ -82,8 +115,8 @@ let Predicates = [HasAMXTILE, In64BitMode] in {
       def PTILEZERO : PseudoI<(outs), (ins u8imm:$src),
                               [(int_x86_tilezero timm:$src)]>;
     }
-  } // SchedRW
-} // HasAMXTILE
+  } // HasAMXTILE
+} // SchedRW
 
 let Predicates = [HasAMXINT8, In64BitMode] in {
   let SchedRW = [WriteSystem] in {
diff --git a/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt b/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
new file mode 100644
index 00000000000000..f5313b4026cbae
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   ldtilecfg	291(%r28,%r29,4)
+# INTEL: ldtilecfg	[r28 + 4*r29 + 291]
+0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt b/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
new file mode 100644
index 00000000000000..75afe12a907ef7
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   sttilecfg	291(%r28,%r29,4)
+# INTEL: sttilecfg	[r28 + 4*r29 + 291]
+0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt b/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
new file mode 100644
index 00000000000000..029e0d30d3b835
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   tileloadd	291(%r28,%r29,4), %tmm6
+# INTEL: tileloadd	tmm6, [r28 + 4*r29 + 291]
+0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt b/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
new file mode 100644
index 00000000000000..a5ba5bb630e46f
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   tileloaddt1	291(%r28,%r29,4), %tmm6
+# INTEL: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
+0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tilestored.txt b/llvm/test/MC/Disassembler/X86/apx/tilestored.txt
new file mode 100644
index 00000000000000..344dec34ef6015
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/tilestored.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   tilestored	%tmm6, 291(%r28,%r29,4)
+# INTEL: tilestored	[r28 + 4*r29 + 291], tmm6
+0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/X86/apx/ldtilecfg-att.s b/llvm/test/MC/X86/apx/ldtilecfg-att.s
new file mode 100644
index 00000000000000..a7e5991b5f9bea
--- /dev/null
+++ b/llvm/test/MC/X86/apx/ldtilecfg-att.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: ldtilecfg	291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         ldtilecfg	291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/ldtilecfg-intel.s b/llvm/test/MC/X86/apx/ldtilecfg-intel.s
new file mode 100644
index 00000000000000..861af446f693af
--- /dev/null
+++ b/llvm/test/MC/X86/apx/ldtilecfg-intel.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: ldtilecfg	[r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         ldtilecfg	[r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/sttilecfg-att.s b/llvm/test/MC/X86/apx/sttilecfg-att.s
new file mode 100644
index 00000000000000..27253966b5af34
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sttilecfg-att.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: sttilecfg	291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         sttilecfg	291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/sttilecfg-intel.s b/llvm/test/MC/X86/apx/sttilecfg-intel.s
new file mode 100644
index 00000000000000..27f47348107226
--- /dev/null
+++ b/llvm/test/MC/X86/apx/sttilecfg-intel.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: sttilecfg	[r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         sttilecfg	[r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tileloadd-att.s b/llvm/test/MC/X86/apx/tileloadd-att.s
new file mode 100644
index 00000000000000..a31f2b7f3fd41e
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tileloadd-att.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: tileloadd	291(%r28,%r29,4), %tmm6
+# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloadd	291(%r28,%r29,4), %tmm6
diff --git a/llvm/test/MC/X86/apx/tileloadd-intel.s b/llvm/test/MC/X86/apx/tileloadd-intel.s
new file mode 100644
index 00000000000000..48d7f124f8a332
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tileloadd-intel.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: tileloadd	tmm6, [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloadd	tmm6, [r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tileloaddt1-att.s b/llvm/test/MC/X86/apx/tileloaddt1-att.s
new file mode 100644
index 00000000000000..55acafd6c15db4
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tileloaddt1-att.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: tileloaddt1	291(%r28,%r29,4), %tmm6
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloaddt1	291(%r28,%r29,4), %tmm6
diff --git a/llvm/test/MC/X86/apx/tileloaddt1-intel.s b/llvm/test/MC/X86/apx/tileloaddt1-intel.s
new file mode 100644
index 00000000000000..953ca49af64fc0
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tileloaddt1-intel.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloaddt1	tmm6, [r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tilestored-att.s b/llvm/test/MC/X86/apx/tilestored-att.s
new file mode 100644
index 00000000000000..c832db3c8c8bd1
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tilestored-att.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: tilestored	%tmm6, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tilestored	%tmm6, 291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/tilestored-intel.s b/llvm/test/MC/X86/apx/tilestored-intel.s
new file mode 100644
index 00000000000000..c9f6a8ccc04923
--- /dev/null
+++ b/llvm/test/MC/X86/apx/tilestored-intel.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: tilestored	[r28 + 4*r29 + 291], tmm6
+# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tilestored	[r28 + 4*r29 + 291], tmm6

>From 95f81930206040b9f6d0ead65bba81fd1b17fe5f Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Sun, 24 Dec 2023 19:13:24 -0800
Subject: [PATCH 2/2] resolve comments

---
 llvm/lib/Target/X86/X86InstrAMX.td            | 75 +++++++------------
 .../test/MC/Disassembler/X86/apx/amx-tile.txt | 22 ++++++
 .../MC/Disassembler/X86/apx/ldtilecfg.txt     |  6 --
 .../MC/Disassembler/X86/apx/sttilecfg.txt     |  6 --
 .../MC/Disassembler/X86/apx/tileloadd.txt     |  6 --
 .../MC/Disassembler/X86/apx/tileloaddt1.txt   |  6 --
 .../MC/Disassembler/X86/apx/tilestored.txt    |  6 --
 llvm/test/MC/X86/apx/amx-tile-att.s           | 24 ++++++
 llvm/test/MC/X86/apx/amx-tile-intel.s         | 21 ++++++
 llvm/test/MC/X86/apx/ldtilecfg-att.s          |  5 --
 llvm/test/MC/X86/apx/ldtilecfg-intel.s        |  5 --
 llvm/test/MC/X86/apx/sttilecfg-att.s          |  5 --
 llvm/test/MC/X86/apx/sttilecfg-intel.s        |  5 --
 llvm/test/MC/X86/apx/tileloadd-att.s          |  5 --
 llvm/test/MC/X86/apx/tileloadd-intel.s        |  5 --
 llvm/test/MC/X86/apx/tileloaddt1-att.s        |  5 --
 llvm/test/MC/X86/apx/tileloaddt1-intel.s      |  5 --
 llvm/test/MC/X86/apx/tilestored-att.s         |  5 --
 llvm/test/MC/X86/apx/tilestored-intel.s       |  5 --
 19 files changed, 93 insertions(+), 129 deletions(-)
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/amx-tile.txt
 delete mode 100644 llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
 delete mode 100644 llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
 delete mode 100644 llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
 delete mode 100644 llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
 delete mode 100644 llvm/test/MC/Disassembler/X86/apx/tilestored.txt
 create mode 100644 llvm/test/MC/X86/apx/amx-tile-att.s
 create mode 100644 llvm/test/MC/X86/apx/amx-tile-intel.s
 delete mode 100644 llvm/test/MC/X86/apx/ldtilecfg-att.s
 delete mode 100644 llvm/test/MC/X86/apx/ldtilecfg-intel.s
 delete mode 100644 llvm/test/MC/X86/apx/sttilecfg-att.s
 delete mode 100644 llvm/test/MC/X86/apx/sttilecfg-intel.s
 delete mode 100644 llvm/test/MC/X86/apx/tileloadd-att.s
 delete mode 100644 llvm/test/MC/X86/apx/tileloadd-intel.s
 delete mode 100644 llvm/test/MC/X86/apx/tileloaddt1-att.s
 delete mode 100644 llvm/test/MC/X86/apx/tileloaddt1-intel.s
 delete mode 100644 llvm/test/MC/X86/apx/tilestored-att.s
 delete mode 100644 llvm/test/MC/X86/apx/tilestored-intel.s

diff --git a/llvm/lib/Target/X86/X86InstrAMX.td b/llvm/lib/Target/X86/X86InstrAMX.td
index 8319e99216f4f6..4601bc8eab69c1 100644
--- a/llvm/lib/Target/X86/X86InstrAMX.td
+++ b/llvm/lib/Target/X86/X86InstrAMX.td
@@ -14,68 +14,45 @@
 //===----------------------------------------------------------------------===//
 // AMX instructions
 
-let SchedRW = [WriteSystem] in {
-  let Predicates = [HasAMXTILE, NoEGPR, In64BitMode] in {
-    let hasSideEffects = 1,
-        Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
-    def LDTILECFG : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
-                      "ldtilecfg\t$src",
-                      [(int_x86_ldtilecfg addr:$src)]>,
-                    VEX, T8, PS;
-    let hasSideEffects = 1 in
-    def STTILECFG : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
-                      "sttilecfg\t$src",
-                      [(int_x86_sttilecfg addr:$src)]>,
-                    VEX, T8, PD;
-    let mayLoad = 1 in
-    def TILELOADD : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
-                      (ins sibmem:$src),
-                      "tileloadd\t{$src, $dst|$dst, $src}", []>,
-                    VEX, T8, XD;
-    let mayLoad = 1 in
-    def TILELOADDT1 : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
-                        (ins sibmem:$src),
-                        "tileloaddt1\t{$src, $dst|$dst, $src}", []>,
-                      VEX, T8, PD;
-    let mayStore = 1 in
-    def TILESTORED : I<0x4b, MRMDestMemFSIB, (outs),
-                       (ins sibmem:$dst, TILE:$src),
-                       "tilestored\t{$src, $dst|$dst, $src}", []>,
-                      VEX, T8, XS;
-  } // HasAMXTILE, NoEGPR
-  let Predicates = [HasAMXTILE, HasEGPR, In64BitMode] in {
-    let hasSideEffects = 1,
-        Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
-    def LDTILECFG_EVEX : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+multiclass AMX_TILE_COMMON<string Suffix>{
+  let hasSideEffects = 1,
+      Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
+  def LDTILECFG#Suffix : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
                            "ldtilecfg\t$src",
                            [(int_x86_ldtilecfg addr:$src)]>,
-                         EVEX, NoCD8, T8, PS;
-    let hasSideEffects = 1 in
-    def STTILECFG_EVEX : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
+                         VEX, T8, PS;
+  let hasSideEffects = 1 in
+  def STTILECFG#Suffix : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
                            "sttilecfg\t$src",
                            [(int_x86_sttilecfg addr:$src)]>,
-                         EVEX, NoCD8, T8, PD;
-    let mayLoad = 1 in
-    def TILELOADD_EVEX : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
+                         VEX, T8, PD;
+  let mayLoad = 1 in
+  def TILELOADD#Suffix : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
                            (ins sibmem:$src),
                            "tileloadd\t{$src, $dst|$dst, $src}", []>,
-                         EVEX, NoCD8, T8, XD;
-    let mayLoad = 1 in
-    def TILELOADDT1_EVEX : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
+                         VEX, T8, XD;
+  let mayLoad = 1 in
+  def TILELOADDT1#Suffix : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
                              (ins sibmem:$src),
                              "tileloaddt1\t{$src, $dst|$dst, $src}", []>,
-                           EVEX, NoCD8, T8, PD;
-    let mayStore = 1 in
-    def TILESTORED_EVEX : I<0x4b, MRMDestMemFSIB, (outs),
+                           VEX, T8, PD;
+  let mayStore = 1 in
+  def TILESTORED#Suffix : I<0x4b, MRMDestMemFSIB, (outs),
                             (ins sibmem:$dst, TILE:$src),
                             "tilestored\t{$src, $dst|$dst, $src}", []>,
-                          EVEX, NoCD8, T8, XS;
-  } // HasAMXTILE, HasEGPR
+                          VEX, T8, XS;
+}
+
+let SchedRW = [WriteSystem] in {
+  let Predicates = [HasAMXTILE, NoEGPR, In64BitMode] in
+  defm "" : AMX_TILE_COMMON<"">;
+  let Predicates = [HasAMXTILE, HasEGPR, In64BitMode] in
+  defm "" : AMX_TILE_COMMON<"_EVEX">, EVEX, NoCD8;
+
   let Predicates = [HasAMXTILE, In64BitMode] in {
     let Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
     def TILERELEASE : I<0x49, MRM_C0, (outs), (ins),
-                        "tilerelease", [(int_x86_tilerelease)]>,
-                      VEX, T8, PS;
+                        "tilerelease", [(int_x86_tilerelease)]>, VEX, T8, PS;
     def TILEZERO : I<0x49, MRMr0, (outs TILE:$dst), (ins),
                      "tilezero\t$dst", []>,
                      VEX, T8, XD;
diff --git a/llvm/test/MC/Disassembler/X86/apx/amx-tile.txt b/llvm/test/MC/Disassembler/X86/apx/amx-tile.txt
new file mode 100644
index 00000000000000..960c40cfc4b156
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/amx-tile.txt
@@ -0,0 +1,22 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   ldtilecfg	291(%r28,%r29,4)
+# INTEL: ldtilecfg	[r28 + 4*r29 + 291]
+0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
+
+# ATT:   sttilecfg	291(%r28,%r29,4)
+# INTEL: sttilecfg	[r28 + 4*r29 + 291]
+0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
+
+# ATT:   tileloadd	291(%r28,%r29,4), %tmm6
+# INTEL: tileloadd	tmm6, [r28 + 4*r29 + 291]
+0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT:   tileloaddt1	291(%r28,%r29,4), %tmm6
+# INTEL: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
+0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT:   tilestored	%tmm6, 291(%r28,%r29,4)
+# INTEL: tilestored	[r28 + 4*r29 + 291], tmm6
+0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt b/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
deleted file mode 100644
index f5313b4026cbae..00000000000000
--- a/llvm/test/MC/Disassembler/X86/apx/ldtilecfg.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-
-# ATT:   ldtilecfg	291(%r28,%r29,4)
-# INTEL: ldtilecfg	[r28 + 4*r29 + 291]
-0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt b/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
deleted file mode 100644
index 75afe12a907ef7..00000000000000
--- a/llvm/test/MC/Disassembler/X86/apx/sttilecfg.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-
-# ATT:   sttilecfg	291(%r28,%r29,4)
-# INTEL: sttilecfg	[r28 + 4*r29 + 291]
-0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt b/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
deleted file mode 100644
index 029e0d30d3b835..00000000000000
--- a/llvm/test/MC/Disassembler/X86/apx/tileloadd.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-
-# ATT:   tileloadd	291(%r28,%r29,4), %tmm6
-# INTEL: tileloadd	tmm6, [r28 + 4*r29 + 291]
-0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt b/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
deleted file mode 100644
index a5ba5bb630e46f..00000000000000
--- a/llvm/test/MC/Disassembler/X86/apx/tileloaddt1.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-
-# ATT:   tileloaddt1	291(%r28,%r29,4), %tmm6
-# INTEL: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
-0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/tilestored.txt b/llvm/test/MC/Disassembler/X86/apx/tilestored.txt
deleted file mode 100644
index 344dec34ef6015..00000000000000
--- a/llvm/test/MC/Disassembler/X86/apx/tilestored.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-
-# ATT:   tilestored	%tmm6, 291(%r28,%r29,4)
-# INTEL: tilestored	[r28 + 4*r29 + 291], tmm6
-0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/X86/apx/amx-tile-att.s b/llvm/test/MC/X86/apx/amx-tile-att.s
new file mode 100644
index 00000000000000..f4a47c16d1939d
--- /dev/null
+++ b/llvm/test/MC/X86/apx/amx-tile-att.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-5: error:
+# ERROR-NOT: error:
+# CHECK: ldtilecfg	291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         ldtilecfg	291(%r28,%r29,4)
+
+# CHECK: sttilecfg	291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         sttilecfg	291(%r28,%r29,4)
+
+# CHECK: tileloadd	291(%r28,%r29,4), %tmm6
+# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloadd	291(%r28,%r29,4), %tmm6
+
+# CHECK: tileloaddt1	291(%r28,%r29,4), %tmm6
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloaddt1	291(%r28,%r29,4), %tmm6
+
+# CHECK: tilestored	%tmm6, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tilestored	%tmm6, 291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/amx-tile-intel.s b/llvm/test/MC/X86/apx/amx-tile-intel.s
new file mode 100644
index 00000000000000..dd7b87b1806c2f
--- /dev/null
+++ b/llvm/test/MC/X86/apx/amx-tile-intel.s
@@ -0,0 +1,21 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: ldtilecfg	[r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         ldtilecfg	[r28 + 4*r29 + 291]
+
+# CHECK: sttilecfg	[r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
+         sttilecfg	[r28 + 4*r29 + 291]
+
+# CHECK: tileloadd	tmm6, [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloadd	tmm6, [r28 + 4*r29 + 291]
+
+# CHECK: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tileloaddt1	tmm6, [r28 + 4*r29 + 291]
+
+# CHECK: tilestored	[r28 + 4*r29 + 291], tmm6
+# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
+         tilestored	[r28 + 4*r29 + 291], tmm6
diff --git a/llvm/test/MC/X86/apx/ldtilecfg-att.s b/llvm/test/MC/X86/apx/ldtilecfg-att.s
deleted file mode 100644
index a7e5991b5f9bea..00000000000000
--- a/llvm/test/MC/X86/apx/ldtilecfg-att.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-
-# CHECK: ldtilecfg	291(%r28,%r29,4)
-# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
-         ldtilecfg	291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/ldtilecfg-intel.s b/llvm/test/MC/X86/apx/ldtilecfg-intel.s
deleted file mode 100644
index 861af446f693af..00000000000000
--- a/llvm/test/MC/X86/apx/ldtilecfg-intel.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-# CHECK: ldtilecfg	[r28 + 4*r29 + 291]
-# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
-         ldtilecfg	[r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/sttilecfg-att.s b/llvm/test/MC/X86/apx/sttilecfg-att.s
deleted file mode 100644
index 27253966b5af34..00000000000000
--- a/llvm/test/MC/X86/apx/sttilecfg-att.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-
-# CHECK: sttilecfg	291(%r28,%r29,4)
-# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
-         sttilecfg	291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/sttilecfg-intel.s b/llvm/test/MC/X86/apx/sttilecfg-intel.s
deleted file mode 100644
index 27f47348107226..00000000000000
--- a/llvm/test/MC/X86/apx/sttilecfg-intel.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-# CHECK: sttilecfg	[r28 + 4*r29 + 291]
-# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
-         sttilecfg	[r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tileloadd-att.s b/llvm/test/MC/X86/apx/tileloadd-att.s
deleted file mode 100644
index a31f2b7f3fd41e..00000000000000
--- a/llvm/test/MC/X86/apx/tileloadd-att.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-
-# CHECK: tileloadd	291(%r28,%r29,4), %tmm6
-# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tileloadd	291(%r28,%r29,4), %tmm6
diff --git a/llvm/test/MC/X86/apx/tileloadd-intel.s b/llvm/test/MC/X86/apx/tileloadd-intel.s
deleted file mode 100644
index 48d7f124f8a332..00000000000000
--- a/llvm/test/MC/X86/apx/tileloadd-intel.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-# CHECK: tileloadd	tmm6, [r28 + 4*r29 + 291]
-# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tileloadd	tmm6, [r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tileloaddt1-att.s b/llvm/test/MC/X86/apx/tileloaddt1-att.s
deleted file mode 100644
index 55acafd6c15db4..00000000000000
--- a/llvm/test/MC/X86/apx/tileloaddt1-att.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-
-# CHECK: tileloaddt1	291(%r28,%r29,4), %tmm6
-# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tileloaddt1	291(%r28,%r29,4), %tmm6
diff --git a/llvm/test/MC/X86/apx/tileloaddt1-intel.s b/llvm/test/MC/X86/apx/tileloaddt1-intel.s
deleted file mode 100644
index 953ca49af64fc0..00000000000000
--- a/llvm/test/MC/X86/apx/tileloaddt1-intel.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-# CHECK: tileloaddt1	tmm6, [r28 + 4*r29 + 291]
-# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tileloaddt1	tmm6, [r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/tilestored-att.s b/llvm/test/MC/X86/apx/tilestored-att.s
deleted file mode 100644
index c832db3c8c8bd1..00000000000000
--- a/llvm/test/MC/X86/apx/tilestored-att.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-
-# CHECK: tilestored	%tmm6, 291(%r28,%r29,4)
-# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tilestored	%tmm6, 291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/tilestored-intel.s b/llvm/test/MC/X86/apx/tilestored-intel.s
deleted file mode 100644
index c9f6a8ccc04923..00000000000000
--- a/llvm/test/MC/X86/apx/tilestored-intel.s
+++ /dev/null
@@ -1,5 +0,0 @@
-# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-# CHECK: tilestored	[r28 + 4*r29 + 291], tmm6
-# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
-         tilestored	[r28 + 4*r29 + 291], tmm6



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