[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 21 22:55:56 PST 2023


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@@ -2831,8 +2831,13 @@ SDValue SITargetLowering::LowerFormalArguments(
       RC = &AMDGPU::VGPR_32RegClass;
     else if (AMDGPU::SGPR_32RegClass.contains(Reg))
       RC = &AMDGPU::SGPR_32RegClass;
-    else
-      llvm_unreachable("Unexpected register class in LowerFormalArguments!");
+    else {
+      if (VT == MVT::i1 && Subtarget->isWave64())
----------------
arsenm wrote:

You don't need to make this conditional on wave64, it's essentially checking the same thing twice 

https://github.com/llvm/llvm-project/pull/72461


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