[llvm] [TargetParser] Define AEK_FCMA and AEK_JSCVT for tsv110 (PR #75516)
Qi Hu via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 21 12:36:40 PST 2023
https://github.com/Qi-Hu updated https://github.com/llvm/llvm-project/pull/75516
>From c7e20ef54a01fb8fd72ad0e5e8ed9bd6967f46a5 Mon Sep 17 00:00:00 2001
From: Qi Hu <qi.hu at huawei.com>
Date: Thu, 14 Dec 2023 13:35:52 -0500
Subject: [PATCH] [TargetParser] Define AEK_FCMA and AEK_JSCVT for tsv110
We define AEK_JSCVT and AEK_FCMA for CPU features FEAT_JSCVT and FEAT_FCMA
respectively, and add them to the CpuInfo of tsv110.
---
llvm/include/llvm/TargetParser/AArch64TargetParser.h | 9 ++++++---
llvm/lib/Target/AArch64/AArch64.td | 3 ++-
llvm/unittests/TargetParser/TargetParserTest.cpp | 9 +++++++--
3 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 6c7410a8b8f792..68d7b1d631af38 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -175,6 +175,8 @@ enum ArchExtKind : unsigned {
AEK_SMEFA64 = 71, // FEAT_SME_FA64
AEK_CPA = 72, // FEAT_CPA
AEK_PAUTHLR = 73, // FEAT_PAuth_LR
+ AEK_JSCVT = 74, // FEAT_JSCVT
+ AEK_FCMA = 75, // FEAT_FCMA
AEK_NUM_EXTENSIONS
};
using ExtensionBitset = Bitset<AEK_NUM_EXTENSIONS>;
@@ -220,7 +222,7 @@ inline constexpr ExtensionInfo Extensions[] = {
{"ebf16", AArch64::AEK_NONE, {}, {}, FEAT_EBF16, "+bf16", 290},
{"f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm", FEAT_SVE_F32MM, "+sve,+f32mm,+fullfp16,+fp-armv8,+neon", 350},
{"f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm", FEAT_SVE_F64MM, "+sve,+f64mm,+fullfp16,+fp-armv8,+neon", 360},
- {"fcma", AArch64::AEK_NONE, {}, {}, FEAT_FCMA, "+fp-armv8,+neon,+complxnum", 220},
+ {"fcma", AArch64::AEK_FCMA, "+complxnum", "-complxnum", FEAT_FCMA, "+fp-armv8,+neon,+complxnum", 220},
{"flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm", FEAT_FLAGM, "+flagm", 20},
{"flagm2", AArch64::AEK_NONE, {}, {}, FEAT_FLAGM2, "+flagm,+altnzcv", 30},
{"fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8", FEAT_FP, "+fp-armv8,+neon", 90},
@@ -230,7 +232,7 @@ inline constexpr ExtensionInfo Extensions[] = {
{"hbc", AArch64::AEK_HBC, "+hbc", "-hbc", FEAT_INIT, "", 0},
{"i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm", FEAT_I8MM, "+i8mm", 270},
{"ite", AArch64::AEK_ITE, "+ite", "-ite", FEAT_INIT, "", 0},
- {"jscvt", AArch64::AEK_NONE, {}, {}, FEAT_JSCVT, "+fp-armv8,+neon,+jsconv", 210},
+ {"jscvt", AArch64::AEK_JSCVT, "+jsconv", "-jsconv", FEAT_JSCVT, "+fp-armv8,+neon,+jsconv", 210},
{"ls64_accdata", AArch64::AEK_NONE, {}, {}, FEAT_LS64_ACCDATA, "+ls64", 540},
{"ls64_v", AArch64::AEK_NONE, {}, {}, FEAT_LS64_V, "", 530},
{"ls64", AArch64::AEK_LS64, "+ls64", "-ls64", FEAT_LS64, "", 520},
@@ -671,7 +673,8 @@ inline constexpr CpuInfo CpuInfos[] = {
{"tsv110", ARMV8_2A,
(AArch64::ExtensionBitset(
{AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_DOTPROD,
- AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE}))},
+ AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE,
+ AArch64::AEK_JSCVT, AArch64::AEK_FCMA}))},
{"a64fx", ARMV8_2A,
(AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
AArch64::AEK_FP16,
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 97e92a57a7ff4b..a8572ef4926488 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -1517,7 +1517,8 @@ def ProcessorFeatures {
FeaturePAuth, FeaturePerfMon];
list<SubtargetFeature> TSV110 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeaturePerfMon, FeatureSPE,
- FeatureFullFP16, FeatureFP16FML, FeatureDotProd];
+ FeatureFullFP16, FeatureFP16FML, FeatureDotProd,
+ FeatureJS, FeatureComplxNum];
list<SubtargetFeature> Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon,
FeatureSSBS, FeatureRandGen, FeatureSB,
FeatureSHA2, FeatureSHA3, FeatureAES];
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 866176ab098360..041368573ce562 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1610,8 +1610,8 @@ INSTANTIATE_TEST_SUITE_P(
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_RAS,
AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_PROFILE,
- AArch64::AEK_FP16, AArch64::AEK_FP16FML,
- AArch64::AEK_DOTPROD})),
+ AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_FP16,
+ AArch64::AEK_FP16FML, AArch64::AEK_DOTPROD})),
"8.2-A"),
ARMCPUTestParams<AArch64::ExtensionBitset>(
"a64fx", "armv8.2-a", "crypto-neon-fp-armv8",
@@ -1757,6 +1757,8 @@ TEST(TargetParserTest, testAArch64Extension) {
EXPECT_TRUE(testAArch64Extension("tsv110", "fp16"));
EXPECT_TRUE(testAArch64Extension("tsv110", "fp16fml"));
EXPECT_TRUE(testAArch64Extension("tsv110", "dotprod"));
+ EXPECT_TRUE(testAArch64Extension("tsv110", "jscvt"));
+ EXPECT_TRUE(testAArch64Extension("tsv110", "fcma"));
EXPECT_TRUE(testAArch64Extension("a64fx", "fp16"));
EXPECT_TRUE(testAArch64Extension("a64fx", "sve"));
EXPECT_FALSE(testAArch64Extension("a64fx", "sve2"));
@@ -1813,6 +1815,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_SME_LUTv2, AArch64::AEK_SMEF8F16,
AArch64::AEK_SMEF8F32, AArch64::AEK_SMEFA64,
AArch64::AEK_CPA, AArch64::AEK_PAUTHLR,
+ AArch64::AEK_JSCVT, AArch64::AEK_FCMA,
};
std::vector<StringRef> Features;
@@ -1901,6 +1904,8 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+sme-fa64"));
EXPECT_TRUE(llvm::is_contained(Features, "+cpa"));
EXPECT_TRUE(llvm::is_contained(Features, "+pauth-lr"));
+ EXPECT_TRUE(llvm::is_contained(Features, "+jsconv"));
+ EXPECT_TRUE(llvm::is_contained(Features, "+complxnum"));
// Assuming we listed every extension above, this should produce the same
// result. (note that AEK_NONE doesn't have a name so it won't be in the
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