[llvm] [TLI][NFC] Autogenerate vectorized libcall tests for SLEEF/ArmPL. (PR #76146)
Alexandros Lamprineas via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 21 04:58:26 PST 2023
https://github.com/labrinea created https://github.com/llvm/llvm-project/pull/76146
This patch prepares the ground for #76060.
* Replaces deprecated float* and double* types with ptr
* Adds `noalias` attribute to pointer arguments
* Adds some cmd-line options to the RUN lines for simplified output
* Removes datalayout since target triple is provided
* Removes checks for return statements
* Makes the pattern-matching for autogenerated checks more explicit
* Removes redundant test file suffix (already under the AArch64 dir)
>From dc02360693c52d150cee674428d4dd3a6284499b Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: Thu, 21 Dec 2023 12:39:35 +0000
Subject: [PATCH] [TLI][NFC] Autogenerate vectorized libcall tests for
SLEEF/ArmPL.
This patch prepares the ground for #76060.
* Replaces deprecated float* and double* types with ptr
* Adds `noalias` attribute to pointer arguments
* Adds some cmd-line options to the RUN lines for simplified output
* Removes datalayout since target triple is provided
* Removes checks for return statements
* Makes the pattern-matching for autogenerated checks more explicit
* Removes redundant test file suffix (already under the AArch64 dir)
---
.../LoopVectorize/AArch64/armpl-calls.ll | 943 +++++++++++-------
...{sleef-calls-aarch64.ll => sleef-calls.ll} | 730 ++++++--------
2 files changed, 888 insertions(+), 785 deletions(-)
rename llvm/test/Transforms/LoopVectorize/AArch64/{sleef-calls-aarch64.ll => sleef-calls.ll} (59%)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/armpl-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/armpl-calls.ll
index aa5fdf59e14c02..ea8581cc862d1c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/armpl-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/armpl-calls.ll
@@ -1,21 +1,23 @@
-; RUN: opt -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s --check-prefixes=CHECK,NEON
-; RUN: opt -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s --check-prefixes=CHECK,SVE
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(cos|sin|tan|cbrt|erf|^exp|gamma|log|sqrt|copysign|dim|min|mod|hypot|nextafter|pow|fma|mod)" --version 4
+; RUN: opt -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -prefer-predicate-over-epilogue=predicate-dont-vectorize -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=NEON
+; RUN: opt -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -prefer-predicate-over-epilogue=predicate-dont-vectorize -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SVE
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"
-
; Tests are checking if LV can vectorize loops with function calls
; using mappings from TLI for scalable and fixed width vectorization.
declare double @acos(double)
declare float @acosf(float)
-define void @acos_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @acos_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vacosq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svacos_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @acos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @acos_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vacosq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @acos_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svacos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -35,11 +37,14 @@ define void @acos_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @acos_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @acos_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vacosq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svacos_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @acos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @acos_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vacosq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @acos_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svacos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -62,11 +67,14 @@ define void @acos_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @acosh(double)
declare float @acoshf(float)
-define void @acosh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @acosh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vacoshq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svacosh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @acosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @acosh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vacoshq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @acosh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svacosh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -86,11 +94,14 @@ define void @acosh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @acosh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @acosh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vacoshq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svacosh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @acosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @acosh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vacoshq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @acosh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svacosh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -113,11 +124,14 @@ define void @acosh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @asin(double)
declare float @asinf(float)
-define void @asin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @asin_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vasinq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svasin_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @asin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @asin_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vasinq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @asin_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svasin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -137,11 +151,14 @@ define void @asin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @asin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @asin_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vasinq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svasin_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @asin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @asin_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vasinq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @asin_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svasin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -164,11 +181,14 @@ define void @asin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @asinh(double)
declare float @asinhf(float)
-define void @asinh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @asinh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vasinhq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svasinh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @asinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @asinh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vasinhq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @asinh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svasinh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -188,11 +208,14 @@ define void @asinh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @asinh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @asinh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vasinhq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svasinh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @asinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @asinh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vasinhq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @asinh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svasinh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -215,11 +238,14 @@ define void @asinh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @atan(double)
declare float @atanf(float)
-define void @atan_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atan_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vatanq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svatan_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @atan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atan_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatanq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @atan_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svatan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -239,11 +265,14 @@ define void @atan_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @atan_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atan_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vatanq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svatan_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @atan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atan_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatanq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @atan_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svatan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -266,11 +295,14 @@ define void @atan_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @atanh(double)
declare float @atanhf(float)
-define void @atanh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atanh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vatanhq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svatanh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @atanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atanh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatanhq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @atanh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svatanh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -290,11 +322,14 @@ define void @atanh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @atanh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atanh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vatanhq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svatanh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @atanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atanh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatanhq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @atanh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svatanh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -317,11 +352,14 @@ define void @atanh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @cbrt(double)
declare float @cbrtf(float)
-define void @cbrt_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cbrt_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vcbrtq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svcbrt_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @cbrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cbrt_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcbrtq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cbrt_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svcbrt_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -341,11 +379,14 @@ define void @cbrt_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @cbrt_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cbrt_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vcbrtq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svcbrt_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @cbrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cbrt_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcbrtq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cbrt_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svcbrt_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -368,11 +409,14 @@ define void @cbrt_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @cos(double)
declare float @cosf(float)
-define void @cos_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cos_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vcosq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svcos_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @cos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cos_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcosq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cos_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svcos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -392,11 +436,14 @@ define void @cos_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @cos_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cos_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vcosq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svcos_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @cos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cos_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcosq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cos_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svcos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -419,11 +466,14 @@ define void @cos_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @cosh(double)
declare float @coshf(float)
-define void @cosh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cosh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vcoshq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svcosh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @cosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cosh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcoshq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cosh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svcosh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -443,11 +493,14 @@ define void @cosh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @cosh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @cosh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vcoshq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svcosh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @cosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @cosh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcoshq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @cosh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svcosh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -470,11 +523,14 @@ define void @cosh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @erf(double)
declare float @erff(float)
-define void @erf_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @erf_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_verfq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_sverf_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @erf_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @erf_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_verfq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @erf_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_sverf_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -494,11 +550,14 @@ define void @erf_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @erf_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @erf_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_verfq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_sverf_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @erf_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @erf_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_verfq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @erf_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_sverf_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -521,11 +580,14 @@ define void @erf_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @erfc(double)
declare float @erfcf(float)
-define void @erfc_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @erfc_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_verfcq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_sverfc_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @erfc_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @erfc_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_verfcq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @erfc_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_sverfc_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -545,11 +607,14 @@ define void @erfc_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @erfc_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @erfc_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_verfcq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_sverfc_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @erfc_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @erfc_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_verfcq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @erfc_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_sverfc_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -572,11 +637,14 @@ define void @erfc_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @exp(double)
declare float @expf(float)
-define void @exp_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vexpq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svexp_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @exp_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexpq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svexp_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -596,11 +664,14 @@ define void @exp_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @exp_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vexpq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svexp_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @exp_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexpq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svexp_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -623,11 +694,14 @@ define void @exp_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @exp2(double)
declare float @exp2f(float)
-define void @exp2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp2_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vexp2q_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svexp2_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @exp2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp2_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexp2q_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp2_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svexp2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -647,11 +721,14 @@ define void @exp2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @exp2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp2_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vexp2q_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svexp2_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @exp2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp2_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexp2q_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp2_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svexp2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -674,11 +751,14 @@ define void @exp2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @exp10(double)
declare float @exp10f(float)
-define void @exp10_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp10_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vexp10q_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svexp10_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @exp10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp10_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexp10q_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp10_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svexp10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -698,11 +778,14 @@ define void @exp10_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @exp10_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @exp10_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vexp10q_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svexp10_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @exp10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @exp10_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexp10q_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @exp10_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svexp10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -725,11 +808,14 @@ define void @exp10_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @expm1(double)
declare float @expm1f(float)
-define void @expm1_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @expm1_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vexpm1q_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svexpm1_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @expm1_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @expm1_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexpm1q_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @expm1_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svexpm1_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -749,11 +835,14 @@ define void @expm1_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @expm1_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @expm1_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vexpm1q_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svexpm1_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @expm1_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @expm1_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexpm1q_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @expm1_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svexpm1_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -776,11 +865,14 @@ define void @expm1_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @lgamma(double)
declare float @lgammaf(float)
-define void @lgamma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @lgamma_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vlgammaq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svlgamma_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @lgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @lgamma_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlgammaq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @lgamma_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svlgamma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -800,11 +892,14 @@ define void @lgamma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @lgamma_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @lgamma_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vlgammaq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svlgamma_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @lgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @lgamma_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlgammaq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @lgamma_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svlgamma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -827,11 +922,14 @@ define void @lgamma_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @log(double)
declare float @logf(float)
-define void @log_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vlogq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svlog_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @log_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlogq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svlog_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -851,11 +949,14 @@ define void @log_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @log_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vlogq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svlog_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @log_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlogq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svlog_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -878,11 +979,14 @@ define void @log_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @log1p(double)
declare float @log1pf(float)
-define void @log1p_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log1p_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vlog1pq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svlog1p_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @log1p_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log1p_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog1pq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log1p_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svlog1p_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -902,11 +1006,14 @@ define void @log1p_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @log1p_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log1p_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vlog1pq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svlog1p_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @log1p_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log1p_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog1pq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log1p_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svlog1p_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -929,11 +1036,14 @@ define void @log1p_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @log2(double)
declare float @log2f(float)
-define void @log2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log2_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vlog2q_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svlog2_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @log2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log2_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog2q_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log2_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svlog2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -953,11 +1063,14 @@ define void @log2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @log2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log2_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vlog2q_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svlog2_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @log2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log2_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog2q_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log2_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svlog2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -980,11 +1093,14 @@ define void @log2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @log10(double)
declare float @log10f(float)
-define void @log10_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log10_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vlog10q_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svlog10_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @log10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log10_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog10q_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log10_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svlog10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1004,11 +1120,14 @@ define void @log10_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @log10_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @log10_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vlog10q_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svlog10_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @log10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @log10_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog10q_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @log10_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svlog10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1031,11 +1150,14 @@ define void @log10_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @sin(double)
declare float @sinf(float)
-define void @sin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sin_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vsinq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svsin_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @sin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sin_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sin_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svsin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1055,11 +1177,14 @@ define void @sin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @sin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sin_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vsinq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svsin_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @sin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sin_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sin_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svsin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1082,11 +1207,14 @@ define void @sin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @sinh(double)
declare float @sinhf(float)
-define void @sinh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sinh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vsinhq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svsinh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @sinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sinh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinhq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sinh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svsinh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1106,11 +1234,14 @@ define void @sinh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @sinh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sinh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vsinhq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svsinh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @sinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sinh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinhq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sinh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svsinh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1133,11 +1264,14 @@ define void @sinh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @sinpi(double)
declare float @sinpif(float)
-define void @sinpi_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sinpi_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vsinpiq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svsinpi_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @sinpi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sinpi_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinpiq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sinpi_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svsinpi_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1157,11 +1291,14 @@ define void @sinpi_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @sinpi_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sinpi_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vsinpiq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svsinpi_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @sinpi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sinpi_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinpiq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sinpi_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svsinpi_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1184,11 +1321,14 @@ define void @sinpi_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @sqrt(double)
declare float @sqrtf(float)
-define void @sqrt_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sqrt_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vsqrtq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svsqrt_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @sqrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sqrt_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsqrtq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sqrt_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svsqrt_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1208,11 +1348,14 @@ define void @sqrt_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @sqrt_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @sqrt_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vsqrtq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svsqrt_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @sqrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @sqrt_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsqrtq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @sqrt_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svsqrt_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1235,11 +1378,14 @@ define void @sqrt_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @tan(double)
declare float @tanf(float)
-define void @tan_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tan_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vtanq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svtan_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @tan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tan_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtanq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tan_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svtan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1259,11 +1405,14 @@ define void @tan_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @tan_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tan_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vtanq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svtan_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @tan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tan_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtanq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tan_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svtan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1286,11 +1435,14 @@ define void @tan_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @tanh(double)
declare float @tanhf(float)
-define void @tanh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tanh_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vtanhq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svtanh_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @tanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tanh_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtanhq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tanh_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svtanh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1310,11 +1462,14 @@ define void @tanh_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @tanh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tanh_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vtanhq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svtanh_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @tanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tanh_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtanhq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tanh_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svtanh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1337,11 +1492,14 @@ define void @tanh_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @tgamma(double)
declare float @tgammaf(float)
-define void @tgamma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tgamma_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vtgammaq_f64(<2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svtgamma_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @tgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tgamma_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtgammaq_f64(<2 x double> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tgamma_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svtgamma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1361,11 +1519,14 @@ define void @tgamma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @tgamma_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @tgamma_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vtgammaq_f32(<4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svtgamma_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @tgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @tgamma_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtgammaq_f32(<4 x float> [[WIDE_LOAD:%.*]])
+;
+; SVE-LABEL: define void @tgamma_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svtgamma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1388,11 +1549,14 @@ define void @tgamma_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @atan2(double, double)
declare float @atan2f(float, float)
-define void @atan2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atan2_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vatan2q_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svatan2_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @atan2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atan2_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatan2q_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @atan2_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svatan2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1412,11 +1576,14 @@ define void @atan2_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @atan2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @atan2_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vatan2q_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svatan2_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @atan2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @atan2_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatan2q_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @atan2_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svatan2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1439,11 +1606,14 @@ define void @atan2_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @copysign(double, double)
declare float @copysignf(float, float)
-define void @copysign_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @copysign_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vcopysignq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svcopysign_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @copysign_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @copysign_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcopysignq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @copysign_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svcopysign_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1463,11 +1633,14 @@ define void @copysign_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @copysign_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @copysign_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vcopysignq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svcopysign_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @copysign_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @copysign_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcopysignq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @copysign_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svcopysign_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1490,11 +1663,14 @@ define void @copysign_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @fdim(double, double)
declare float @fdimf(float, float)
-define void @fdim_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fdim_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vfdimq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svfdim_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @fdim_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fdim_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfdimq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fdim_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svfdim_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1514,11 +1690,14 @@ define void @fdim_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @fdim_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fdim_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vfdimq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svfdim_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @fdim_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fdim_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfdimq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fdim_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svfdim_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1541,11 +1720,14 @@ define void @fdim_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @fmin(double, double)
declare float @fminf(float, float)
-define void @fmin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fmin_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vfminq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svfmin_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @fmin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fmin_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfminq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fmin_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svfmin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1565,11 +1747,14 @@ define void @fmin_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @fmin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fmin_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vfminq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svfmin_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @fmin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fmin_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfminq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fmin_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svfmin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1592,11 +1777,14 @@ define void @fmin_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @fmod(double, double)
declare float @fmodf(float, float)
-define void @fmod_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fmod_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vfmodq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @fmod_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fmod_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfmodq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fmod_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1616,11 +1804,14 @@ define void @fmod_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @fmod_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fmod_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vfmodq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @fmod_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fmod_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfmodq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fmod_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1643,11 +1834,14 @@ define void @fmod_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @hypot(double, double)
declare float @hypotf(float, float)
-define void @hypot_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @hypot_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vhypotq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svhypot_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @hypot_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @hypot_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vhypotq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @hypot_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svhypot_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1667,11 +1861,14 @@ define void @hypot_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @hypot_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @hypot_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vhypotq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svhypot_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @hypot_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @hypot_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vhypotq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @hypot_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svhypot_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1694,11 +1891,14 @@ define void @hypot_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @nextafter(double, double)
declare float @nextafterf(float, float)
-define void @nextafter_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @nextafter_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vnextafterq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svnextafter_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @nextafter_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @nextafter_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vnextafterq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @nextafter_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svnextafter_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1718,11 +1918,14 @@ define void @nextafter_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @nextafter_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @nextafter_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vnextafterq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svnextafter_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @nextafter_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @nextafter_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vnextafterq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @nextafter_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svnextafter_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1745,11 +1948,14 @@ define void @nextafter_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @pow(double, double)
declare float @powf(float, float)
-define void @pow_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @pow_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vpowq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svpow_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @pow_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @pow_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vpowq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @pow_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svpow_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1769,11 +1975,14 @@ define void @pow_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @pow_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @pow_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vpowq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svpow_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @pow_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @pow_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vpowq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @pow_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svpow_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1796,11 +2005,14 @@ define void @pow_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
declare double @fma(double, double, double)
declare float @fmaf(float, float, float)
-define void @fma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fma_f64(
-; NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vfmaq_f64(<2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]], <2 x double> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 2 x double> @armpl_svfma_f64_x(<vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x double> [[TMP4:%.*]], <vscale x 2 x i1> {{.*}})
-; CHECK: ret void
+define void @fma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fma_f64(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfmaq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fma_f64(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svfma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
@@ -1820,11 +2032,14 @@ define void @fma_f64(ptr nocapture %in.ptr, ptr %out.ptr) {
ret void
}
-define void @fma_f32(ptr nocapture %in.ptr, ptr %out.ptr) {
-; CHECK-LABEL: @fma_f32(
-; NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vfmaq_f32(<4 x float> [[TMP4:%.*]], <4 x float> [[TMP4:%.*]])
-; SVE: [[TMP5:%.*]] = call <vscale x 4 x float> @armpl_svfma_f32_x(<vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x float> [[TMP4:%.*]], <vscale x 4 x i1> {{.*}})
-; CHECK: ret void
+define void @fma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) {
+; NEON-LABEL: define void @fma_f32(
+; NEON-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) {
+; NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfmaq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]])
+;
+; SVE-LABEL: define void @fma_f32(
+; SVE-SAME: ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] {
+; SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svfma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
;
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls.ll
similarity index 59%
rename from llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
rename to llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls.ll
index bd39dcb3371a92..e8fd7ba9b68183 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "(_)|(cos|expf?\(|exp2|exp10|fmod|gamma|log|pow|sin|sqrt|tan)|(ret)" --version 2
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(cos|^exp|mod|gamma|log|pow|sin|sqrt|tan)" --version 4
; RUN: opt -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -prefer-predicate-over-epilogue=predicate-dont-vectorize -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=NEON
; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -prefer-predicate-over-epilogue=predicate-dont-vectorize -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SVE
@@ -7,16 +7,14 @@ target triple = "aarch64-unknown-linux-gnu"
declare double @acos(double)
declare float @acosf(float)
-define void @acos_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @acos_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @acos_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @acos_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_acos(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @acos_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0:[0-9]+]] {
+; SVE-LABEL: define void @acos_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0:[0-9]+]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -26,8 +24,8 @@ define void @acos_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @acos(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -36,16 +34,14 @@ define void @acos_f64(double* nocapture %varray) {
ret void
}
-define void @acos_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @acos_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @acos_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @acos_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_acosf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @acos_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @acos_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -55,8 +51,8 @@ define void @acos_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @acosf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -68,16 +64,14 @@ define void @acos_f32(float* nocapture %varray) {
declare double @asin(double)
declare float @asinf(float)
-define void @asin_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @asin_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @asin_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @asin_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_asin(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @asin_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @asin_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -87,8 +81,8 @@ define void @asin_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @asin(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -97,16 +91,14 @@ define void @asin_f64(double* nocapture %varray) {
ret void
}
-define void @asin_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @asin_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @asin_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @asin_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_asinf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @asin_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @asin_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -116,8 +108,8 @@ define void @asin_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @asinf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -129,16 +121,14 @@ define void @asin_f32(float* nocapture %varray) {
declare double @atan(double)
declare float @atanf(float)
-define void @atan_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @atan_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atan_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @atan_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_atan(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atan_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atan_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -148,8 +138,8 @@ define void @atan_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @atan(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -158,16 +148,14 @@ define void @atan_f64(double* nocapture %varray) {
ret void
}
-define void @atan_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @atan_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atan_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @atan_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_atanf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atan_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atan_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -177,8 +165,8 @@ define void @atan_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @atanf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -190,16 +178,14 @@ define void @atan_f32(float* nocapture %varray) {
declare double @atan2(double, double)
declare float @atan2f(float, float)
-define void @atan2_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @atan2_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atan2_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @atan2_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2vv_atan2(<2 x double> [[TMP1:%.*]], <2 x double> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atan2_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atan2_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x double> [[TMP19]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -209,8 +195,8 @@ define void @atan2_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @atan2(double %conv, double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -219,16 +205,14 @@ define void @atan2_f64(double* nocapture %varray) {
ret void
}
-define void @atan2_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @atan2_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atan2_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @atan2_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4vv_atan2f(<4 x float> [[TMP1:%.*]], <4 x float> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atan2_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atan2_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x float> [[TMP19]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -238,8 +222,8 @@ define void @atan2_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @atan2f(float %conv, float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -251,16 +235,14 @@ define void @atan2_f32(float* nocapture %varray) {
declare double @atanh(double)
declare float @atanhf(float)
-define void @atanh_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @atanh_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atanh_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @atanh_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_atanh(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atanh_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atanh_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atanh(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -270,8 +252,8 @@ define void @atanh_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @atanh(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -280,16 +262,14 @@ define void @atanh_f64(double* nocapture %varray) {
ret void
}
-define void @atanh_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @atanh_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @atanh_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @atanh_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_atanhf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @atanh_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @atanh_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanhf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -299,8 +279,8 @@ define void @atanh_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @atanhf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -312,16 +292,14 @@ define void @atanh_f32(float* nocapture %varray) {
declare double @cos(double)
declare float @cosf(float)
-define void @cos_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @cos_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @cos_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @cos_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_cos(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @cos_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @cos_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -331,8 +309,8 @@ define void @cos_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @cos(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -341,16 +319,14 @@ define void @cos_f64(double* nocapture %varray) {
ret void
}
-define void @cos_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @cos_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @cos_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @cos_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_cosf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @cos_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @cos_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -360,8 +336,8 @@ define void @cos_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @cosf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -373,16 +349,14 @@ define void @cos_f32(float* nocapture %varray) {
declare double @cosh(double)
declare float @coshf(float)
-define void @cosh_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @cosh_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @cosh_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @cosh_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_cosh(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @cosh_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @cosh_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -392,8 +366,8 @@ define void @cosh_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @cosh(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -402,16 +376,14 @@ define void @cosh_f64(double* nocapture %varray) {
ret void
}
-define void @cosh_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @cosh_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @cosh_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @cosh_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_coshf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @cosh_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @cosh_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -421,8 +393,8 @@ define void @cosh_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @coshf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -434,17 +406,11 @@ define void @cosh_f32(float* nocapture %varray) {
declare double @exp(double)
declare float @expf(float)
-define void @exp_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @exp_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -453,8 +419,8 @@ define void @exp_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @exp(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -463,17 +429,11 @@ define void @exp_f64(double* nocapture %varray) {
ret void
}
-define void @exp_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @exp_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_expf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -482,8 +442,8 @@ define void @exp_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @expf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -495,17 +455,11 @@ define void @exp_f32(float* nocapture %varray) {
declare double @exp2(double)
declare float @exp2f(float)
-define void @exp2_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @exp2_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp2(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp2_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp2_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp2_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp2_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -514,8 +468,8 @@ define void @exp2_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @exp2(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -524,17 +478,11 @@ define void @exp2_f64(double* nocapture %varray) {
ret void
}
-define void @exp2_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @exp2_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_exp2f(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp2_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp2_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp2_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp2_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -543,8 +491,8 @@ define void @exp2_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @exp2f(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -556,17 +504,11 @@ define void @exp2_f32(float* nocapture %varray) {
declare double @exp10(double)
declare float @exp10f(float)
-define void @exp10_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @exp10_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_exp10(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp10_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp10_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp10_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp10_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -575,8 +517,8 @@ define void @exp10_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @exp10(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -585,17 +527,11 @@ define void @exp10_f64(double* nocapture %varray) {
ret void
}
-define void @exp10_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @exp10_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
-; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_exp10f(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
-;
-; SVE-LABEL: define void @exp10_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
-; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
-;
+define void @exp10_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @exp10_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
+; SVE-LABEL: define void @exp10_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
entry:
br label %for.body
@@ -604,8 +540,8 @@ define void @exp10_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @exp10f(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -617,16 +553,14 @@ define void @exp10_f32(float* nocapture %varray) {
declare double @fmod(double, double)
declare float @fmodf(float, float)
-define void @fmod_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @fmod_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @fmod_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @fmod_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2vv_fmod(<2 x double> [[TMP1:%.*]], <2 x double> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @fmod_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @fmod_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmod(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x double> [[TMP19]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -636,8 +570,8 @@ define void @fmod_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @fmod(double %conv, double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -646,16 +580,14 @@ define void @fmod_f64(double* nocapture %varray) {
ret void
}
-define void @fmod_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @fmod_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @fmod_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @fmod_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4vv_fmodf(<4 x float> [[TMP1:%.*]], <4 x float> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @fmod_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @fmod_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmodf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x float> [[TMP19]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -665,8 +597,8 @@ define void @fmod_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @fmodf(float %conv, float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -678,16 +610,14 @@ define void @fmod_f32(float* nocapture %varray) {
declare double @lgamma(double)
declare float @lgammaf(float)
-define void @lgamma_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @lgamma_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @lgamma_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @lgamma_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_lgamma(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @lgamma_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @lgamma_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_lgamma(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -697,8 +627,8 @@ define void @lgamma_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @lgamma(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -707,16 +637,14 @@ define void @lgamma_f64(double* nocapture %varray) {
ret void
}
-define void @lgamma_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @lgamma_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @lgamma_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @lgamma_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_lgammaf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @lgamma_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @lgamma_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_lgammaf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -726,8 +654,8 @@ define void @lgamma_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @lgammaf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -739,16 +667,14 @@ define void @lgamma_f32(float* nocapture %varray) {
declare double @log10(double)
declare float @log10f(float)
-define void @log10_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @log10_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log10_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @log10_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log10(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log10_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log10_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -758,8 +684,8 @@ define void @log10_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @log10(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -768,16 +694,14 @@ define void @log10_f64(double* nocapture %varray) {
ret void
}
-define void @log10_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @log10_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log10_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @log10_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_log10f(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log10_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log10_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -787,8 +711,8 @@ define void @log10_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @log10f(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -800,16 +724,14 @@ define void @log10_f32(float* nocapture %varray) {
declare double @log2(double)
declare float @log2f(float)
-define void @log2_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @log2_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log2_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @log2_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log2_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log2_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -819,8 +741,8 @@ define void @log2_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @log2(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -829,16 +751,14 @@ define void @log2_f64(double* nocapture %varray) {
ret void
}
-define void @log2_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @log2_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log2_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @log2_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log2_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log2_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -848,8 +768,8 @@ define void @log2_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @log2f(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -861,16 +781,14 @@ define void @log2_f32(float* nocapture %varray) {
declare double @log(double)
declare float @logf(float)
-define void @log_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @log_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @log_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_log(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -880,8 +798,8 @@ define void @log_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @log(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -890,16 +808,14 @@ define void @log_f64(double* nocapture %varray) {
ret void
}
-define void @log_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @log_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @log_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @log_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_logf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @log_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @log_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -909,8 +825,8 @@ define void @log_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @logf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -922,16 +838,14 @@ define void @log_f32(float* nocapture %varray) {
declare double @pow(double, double)
declare float @powf(float, float)
-define void @pow_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @pow_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @pow_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @pow_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2vv_pow(<2 x double> [[TMP1:%.*]], <2 x double> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @pow_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @pow_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x double> [[TMP19]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -941,8 +855,8 @@ define void @pow_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @pow(double %conv, double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -951,16 +865,14 @@ define void @pow_f64(double* nocapture %varray) {
ret void
}
-define void @pow_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @pow_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @pow_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @pow_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4vv_powf(<4 x float> [[TMP1:%.*]], <4 x float> [[TMP1]])
-; NEON: ret void
;
-; SVE-LABEL: define void @pow_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @pow_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x float> [[TMP19]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -970,8 +882,8 @@ define void @pow_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @powf(float %conv, float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -983,16 +895,14 @@ define void @pow_f32(float* nocapture %varray) {
declare double @sin(double)
declare float @sinf(float)
-define void @sin_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @sin_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sin_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @sin_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_sin(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sin_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sin_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1002,8 +912,8 @@ define void @sin_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @sin(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1012,16 +922,14 @@ define void @sin_f64(double* nocapture %varray) {
ret void
}
-define void @sin_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @sin_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sin_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @sin_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_sinf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sin_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sin_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1031,8 +939,8 @@ define void @sin_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @sinf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1044,16 +952,14 @@ define void @sin_f32(float* nocapture %varray) {
declare double @sinh(double)
declare float @sinhf(float)
-define void @sinh_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @sinh_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sinh_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @sinh_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_sinh(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sinh_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sinh_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1063,8 +969,8 @@ define void @sinh_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @sinh(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1073,16 +979,14 @@ define void @sinh_f64(double* nocapture %varray) {
ret void
}
-define void @sinh_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @sinh_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sinh_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @sinh_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_sinhf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sinh_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sinh_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1092,8 +996,8 @@ define void @sinh_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @sinhf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1105,16 +1009,14 @@ define void @sinh_f32(float* nocapture %varray) {
declare double @sqrt(double)
declare float @sqrtf(float)
-define void @sqrt_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @sqrt_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sqrt_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @sqrt_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_sqrt(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sqrt_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sqrt_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sqrt(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1124,8 +1026,8 @@ define void @sqrt_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @sqrt(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1134,16 +1036,14 @@ define void @sqrt_f64(double* nocapture %varray) {
ret void
}
-define void @sqrt_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @sqrt_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @sqrt_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @sqrt_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_sqrtf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @sqrt_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @sqrt_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sqrtf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1153,8 +1053,8 @@ define void @sqrt_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @sqrtf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1166,16 +1066,14 @@ define void @sqrt_f32(float* nocapture %varray) {
declare double @tan(double)
declare float @tanf(float)
-define void @tan_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @tan_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tan_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @tan_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_tan(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tan_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tan_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1185,8 +1083,8 @@ define void @tan_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @tan(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1195,16 +1093,14 @@ define void @tan_f64(double* nocapture %varray) {
ret void
}
-define void @tan_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @tan_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tan_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @tan_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_tanf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tan_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tan_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1214,8 +1110,8 @@ define void @tan_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @tanf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1227,16 +1123,14 @@ define void @tan_f32(float* nocapture %varray) {
declare double @tanh(double)
declare float @tanhf(float)
-define void @tanh_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @tanh_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tanh_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @tanh_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_tanh(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tanh_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tanh_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1246,8 +1140,8 @@ define void @tanh_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @tanh(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1256,16 +1150,14 @@ define void @tanh_f64(double* nocapture %varray) {
ret void
}
-define void @tanh_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @tanh_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tanh_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @tanh_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_tanhf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tanh_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tanh_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1275,8 +1167,8 @@ define void @tanh_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @tanhf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1288,16 +1180,14 @@ define void @tanh_f32(float* nocapture %varray) {
declare double @tgamma(double)
declare float @tgammaf(float)
-define void @tgamma_f64(double* nocapture %varray) {
-; NEON-LABEL: define void @tgamma_f64
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tgamma_f64(ptr nocapture %varray) {
+; NEON-LABEL: define void @tgamma_f64(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <2 x double> @_ZGVnN2v_tgamma(<2 x double> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tgamma_f64
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tgamma_f64(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tgamma(<vscale x 2 x double> [[TMP19:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1307,8 +1197,8 @@ define void @tgamma_f64(double* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to double
%call = tail call double @tgamma(double %conv)
- %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
- store double %call, double* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1317,16 +1207,14 @@ define void @tgamma_f64(double* nocapture %varray) {
ret void
}
-define void @tgamma_f32(float* nocapture %varray) {
-; NEON-LABEL: define void @tgamma_f32
-; NEON-SAME: (ptr nocapture [[VARRAY:%.*]]) {
+define void @tgamma_f32(ptr nocapture %varray) {
+; NEON-LABEL: define void @tgamma_f32(
+; NEON-SAME: ptr nocapture [[VARRAY:%.*]]) {
; NEON: [[TMP2:%.*]] = call <4 x float> @_ZGVnN4v_tgammaf(<4 x float> [[TMP1:%.*]])
-; NEON: ret void
;
-; SVE-LABEL: define void @tgamma_f32
-; SVE-SAME: (ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
+; SVE-LABEL: define void @tgamma_f32(
+; SVE-SAME: ptr nocapture [[VARRAY:%.*]]) #[[ATTR0]] {
; SVE: [[TMP20:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tgammaf(<vscale x 4 x float> [[TMP19:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]])
-; SVE: ret void
;
entry:
br label %for.body
@@ -1336,8 +1224,8 @@ define void @tgamma_f32(float* nocapture %varray) {
%tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
%call = tail call float @tgammaf(float %conv)
- %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
- store float %call, float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
More information about the llvm-commits
mailing list