[llvm] [X86][MC] Support Enc/Dec for EGPR for promoted CMPCCXADD instruction (PR #76125)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 20 22:21:05 PST 2023
https://github.com/XinWang10 created https://github.com/llvm/llvm-project/pull/76125
R16-R31 was added into GPRs in https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted CMPCCXADD instruction in EVEX space.
RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
>From 59ee54c7fe6a5c70bf8060e4021c69d7d9ca6d11 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Wed, 20 Dec 2023 22:15:33 -0800
Subject: [PATCH] [X86][MC] Support Enc/Dec for EGPR for promoted CMPCCXADD
instruction
---
.../X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 +-
llvm/lib/Target/X86/X86InstrAsmAlias.td | 5 +
llvm/lib/Target/X86/X86InstrMisc.td | 21 ++-
.../MC/Disassembler/X86/apx/cmpccxadd.txt | 122 +++++++++++++++++
.../MC/Disassembler/X86/apx/evex-format.txt | 6 +
llvm/test/MC/X86/apx/cmpccxadd-att.s | 124 ++++++++++++++++++
llvm/test/MC/X86/apx/cmpccxadd-intel.s | 121 +++++++++++++++++
llvm/test/MC/X86/apx/evex-format-att.s | 6 +
llvm/test/MC/X86/apx/evex-format-intel.s | 6 +
9 files changed, 410 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
create mode 100644 llvm/test/MC/X86/apx/cmpccxadd-att.s
create mode 100644 llvm/test/MC/X86/apx/cmpccxadd-intel.s
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index b6ebbcf56aef73..9e1f1eb97e7032 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1060,7 +1060,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
Prefix.setBB2(MI, MemOperand + X86::AddrBaseReg);
Prefix.setXX2(MI, MemOperand + X86::AddrIndexReg);
CurOp += X86::AddrNumOperands;
- Prefix.set4V(MI, CurOp++);
+ Prefix.set4VV2(MI, CurOp++);
break;
}
case X86II::MRM_C0:
diff --git a/llvm/lib/Target/X86/X86InstrAsmAlias.td b/llvm/lib/Target/X86/X86InstrAsmAlias.td
index f1a90d9c59c3d3..2590be8651d517 100644
--- a/llvm/lib/Target/X86/X86InstrAsmAlias.td
+++ b/llvm/lib/Target/X86/X86InstrAsmAlias.td
@@ -55,6 +55,11 @@ multiclass CMPCCXADD_Aliases<string Cond, int CC> {
(CMPCCXADDmr32 GR32:$dst, i32mem:$dstsrc2, GR32:$src3, CC), 0>;
def : InstAlias<"cmp"#Cond#"xadd"#"\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
(CMPCCXADDmr64 GR64:$dst, i64mem:$dstsrc2, GR64:$src3, CC), 0>;
+
+ def : InstAlias<"cmp"#Cond#"xadd"#"\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+ (CMPCCXADDmr32_EVEX GR32:$dst, i32mem:$dstsrc2, GR32:$src3, CC), 0>;
+ def : InstAlias<"cmp"#Cond#"xadd"#"\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+ (CMPCCXADDmr64_EVEX GR64:$dst, i64mem:$dstsrc2, GR64:$src3, CC), 0>;
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86InstrMisc.td b/llvm/lib/Target/X86/X86InstrMisc.td
index 3006969b76d670..0ca3ba7c546a38 100644
--- a/llvm/lib/Target/X86/X86InstrMisc.td
+++ b/llvm/lib/Target/X86/X86InstrMisc.td
@@ -1663,8 +1663,8 @@ let Predicates = [HasPREFETCHI, In64BitMode], SchedRW = [WriteLoad] in {
// CMPCCXADD Instructions
//
let isCodeGenOnly = 1, ForceDisassemble = 1, mayLoad = 1, mayStore = 1,
- Predicates = [HasCMPCCXADD, In64BitMode], Defs = [EFLAGS],
- Constraints = "$dstsrc1 = $dst" in {
+ Defs = [EFLAGS], Constraints = "$dstsrc1 = $dst" in {
+let Predicates = [HasCMPCCXADD, NoEGPR, In64BitMode] in {
def CMPCCXADDmr32 : I<0xe0, MRMDestMem4VOp3CC, (outs GR32:$dst),
(ins GR32:$dstsrc1, i32mem:$dstsrc2, GR32:$src3, ccode:$cond),
"cmp${cond}xadd\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
@@ -1680,6 +1680,23 @@ def CMPCCXADDmr64 : I<0xe0, MRMDestMem4VOp3CC, (outs GR64:$dst),
VEX_4V, REX_W, T8PD, Sched<[WriteXCHG]>;
}
+let Predicates = [HasCMPCCXADD, HasEGPR, In64BitMode] in {
+def CMPCCXADDmr32_EVEX : I<0xe0, MRMDestMem4VOp3CC, (outs GR32:$dst),
+ (ins GR32:$dstsrc1, i32mem:$dstsrc2, GR32:$src3, ccode:$cond),
+ "cmp${cond}xadd\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+ [(set GR32:$dst, (X86cmpccxadd addr:$dstsrc2,
+ GR32:$dstsrc1, GR32:$src3, timm:$cond))]>,
+ EVEX_4V, NoCD8, T8PD, Sched<[WriteXCHG]>;
+
+def CMPCCXADDmr64_EVEX : I<0xe0, MRMDestMem4VOp3CC, (outs GR64:$dst),
+ (ins GR64:$dstsrc1, i64mem:$dstsrc2, GR64:$src3, ccode:$cond),
+ "cmp${cond}xadd\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+ [(set GR64:$dst, (X86cmpccxadd addr:$dstsrc2,
+ GR64:$dstsrc1, GR64:$src3, timm:$cond))]>,
+ EVEX_4V, NoCD8, REX_W, T8PD, Sched<[WriteXCHG]>;
+}
+}
+
//===----------------------------------------------------------------------===//
// Memory Instructions
//
diff --git a/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt b/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
new file mode 100644
index 00000000000000..9f65d4c8d25ce0
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
@@ -0,0 +1,122 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpbexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe6,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpbxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpbxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe2,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpbxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpbxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmplexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmplexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xee,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmplexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmplexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xee,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmplxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmplxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xec,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmplxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmplxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpaxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpgxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpgexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnoxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe1,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnoxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe1,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnpxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnpxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xeb,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnpxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnpxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xeb,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnsxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe9,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnsxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe9,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpnexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpoxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe0,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpoxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe0,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmppxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmppxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xea,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmppxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmppxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xea,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpsxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe8,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpsxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe8,0xbc,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00
+
+# ATT: cmpexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/evex-format.txt b/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
index 389b22cb4a223d..01676fe0569258 100644
--- a/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
@@ -62,6 +62,12 @@
# INTEL: vpslldq zmm0, zmmword ptr [r16 + r17], 0
0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00
+## MRMDestMem4VOp3CC
+
+# ATT: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00
+
## MRMSrcMem4VOp3
# ATT: bzhiq %r19, 291(%r28,%r29,4), %r23
diff --git a/llvm/test/MC/X86/apx/cmpccxadd-att.s b/llvm/test/MC/X86/apx/cmpccxadd-att.s
new file mode 100644
index 00000000000000..ce23588a184993
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cmpccxadd-att.s
@@ -0,0 +1,124 @@
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-30: error:
+# ERROR-NOT: error:
+# CHECK: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpbexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe6,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpbxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe2,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpbxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpbxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmplexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xee,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmplexadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmplexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xee,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmplexadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmplxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xec,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmplxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmplxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmplxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpaxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpaxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpgxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpgxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpgexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpgexadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpnoxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe1,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnoxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpnoxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe1,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnoxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpnpxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xeb,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnpxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpnpxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xeb,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnpxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpnsxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe9,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnsxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpnsxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe9,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnsxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpnexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnexadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpoxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe0,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpoxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpoxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe0,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpoxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmppxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xea,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmppxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmppxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xea,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmppxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpsxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe8,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpsxadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpsxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe8,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpsxadd %r19, %r23, 291(%r28,%r29,4)
+
+# CHECK: cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
+
+# CHECK: cmpexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpexadd %r19, %r23, 291(%r28,%r29,4)
diff --git a/llvm/test/MC/X86/apx/cmpccxadd-intel.s b/llvm/test/MC/X86/apx/cmpccxadd-intel.s
new file mode 100644
index 00000000000000..c2630d3d9273b9
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cmpccxadd-intel.s
@@ -0,0 +1,121 @@
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe6,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpbxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe2,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpbxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpbxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmplexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xee,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmplexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmplexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xee,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmplexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmplxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xec,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmplxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmplxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmplxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpnoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe1,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpnoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe1,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpnpxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xeb,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnpxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpnpxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xeb,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnpxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpnsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe9,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpnsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe9,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe0,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpoxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe0,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpoxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmppxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xea,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmppxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmppxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xea,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmppxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe8,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpsxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe8,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpsxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+
+# CHECK: cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
+# CHECK: cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00]
+ cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
diff --git a/llvm/test/MC/X86/apx/evex-format-att.s b/llvm/test/MC/X86/apx/evex-format-att.s
index 0b2e860d6ba090..33ad8e3abe75f2 100644
--- a/llvm/test/MC/X86/apx/evex-format-att.s
+++ b/llvm/test/MC/X86/apx/evex-format-att.s
@@ -60,6 +60,12 @@
# CHECK: encoding: [0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00]
vpslldq $0, (%r16,%r17), %zmm0
+## MRMDestMem4VOp3CC
+
+# CHECK: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
+
## MRMSrcMem4VOp3
# CHECK: bzhiq %r19, 291(%r28,%r29,4), %r23
diff --git a/llvm/test/MC/X86/apx/evex-format-intel.s b/llvm/test/MC/X86/apx/evex-format-intel.s
index ececb7137b1101..1b8f761cdfd3aa 100644
--- a/llvm/test/MC/X86/apx/evex-format-intel.s
+++ b/llvm/test/MC/X86/apx/evex-format-intel.s
@@ -60,6 +60,12 @@
# CHECK: encoding: [0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00]
vpslldq zmm0, zmmword ptr [r16 + r17], 0
+## MRMDestMem4VOp3CC
+
+# CHECK: cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe6,0xb4,0xac,0x23,0x01,0x00,0x00]
+ cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+
## MRMSrcMem4VOp3
# CHECK: bzhi r23, qword ptr [r28 + 4*r29 + 291], r19
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