[llvm] [AMDGPU] Disallow negative offset when addressing constant memory (PR #76009)

[via llvm-commits]

https://github.com/vangthao95 created https://github.com/llvm/llvm-project/pull/76009

When loading from scalar memory, the load instruction is illegal and undefined if the immediate offset is negative and is less than M0 or SGPR[offset] according to SPG. This patch is a workaround that makes negative offset illegal for GFX9+ when addressing constant memory. It is not a full fix as we must also check if there is use of M0 or soffset present. I believe there also needs to be a fix during instruction selection regarding this issue but would like to open this to discussion as how to address this.

>From 7f0abb3dbb889bb08e815fef13b4a536eada72a3 Mon Sep 17 00:00:00 2001
From: Vang Thao <Vang.Thao at amd.com>
Date: Wed, 20 Dec 2023 04:14:28 +0000
Subject: [PATCH] [AMDGPU] Disallow negative offset when addressing constant
 memory

When loading from scalar memory, the load instruction is illegal and undefined
if the immediate offset is negative and is less than M0 or SGPR[offset].
Therefore disallow any negative offset for now as a workaround until this issue
is fixed.
---
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp     |  7 ++++
 .../AMDGPU/cgp-addressing-modes-smem.ll       | 41 ++++++++-----------
 2 files changed, 23 insertions(+), 25 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 4f4bc45e49b43e..f4dbb852cf9487 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1462,6 +1462,13 @@ bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
       // for S_BUFFER_* instructions).
       if (!isInt<21>(AM.BaseOffs))
         return false;
+
+      // FIXME: When addressing scalar memory, it is illegal and undefined for
+      // IOFFSET + (M0 or soffset) to be negative. This also need to
+      // verify that M0 or soffset is present. For now it is only rejecting
+      // all negative offsets.
+      if (AM.BaseOffs < 0)
+        return false;
     } else {
       // On GFX12, all offsets are signed 24-bit in bytes.
       if (!isInt<24>(AM.BaseOffs))
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
index f5846c3d6db737..add148c2f43064 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
@@ -279,31 +279,19 @@ end:
 }
 
 define amdgpu_cs void @test_sink_smem_offset_neg400(ptr addrspace(4) inreg %ptr, i32 inreg %val) {
-; GFX678-LABEL: test_sink_smem_offset_neg400:
-; GFX678:       ; %bb.0: ; %entry
-; GFX678-NEXT:    s_add_u32 s0, s0, 0xfffffe70
-; GFX678-NEXT:    s_addc_u32 s1, s1, -1
-; GFX678-NEXT:  .LBB5_1: ; %loop
-; GFX678-NEXT:    ; =>This Inner Loop Header: Depth=1
-; GFX678-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX678-NEXT:    s_load_dword s3, s[0:1], 0x0
-; GFX678-NEXT:    s_add_i32 s2, s2, -1
-; GFX678-NEXT:    s_cmp_lg_u32 s2, 0
-; GFX678-NEXT:    s_cbranch_scc1 .LBB5_1
-; GFX678-NEXT:  ; %bb.2: ; %end
-; GFX678-NEXT:    s_endpgm
-;
-; GFX9-LABEL: test_sink_smem_offset_neg400:
-; GFX9:       ; %bb.0: ; %entry
-; GFX9-NEXT:  .LBB5_1: ; %loop
-; GFX9-NEXT:    ; =>This Inner Loop Header: Depth=1
-; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX9-NEXT:    s_load_dword s3, s[0:1], -0x190
-; GFX9-NEXT:    s_add_i32 s2, s2, -1
-; GFX9-NEXT:    s_cmp_lg_u32 s2, 0
-; GFX9-NEXT:    s_cbranch_scc1 .LBB5_1
-; GFX9-NEXT:  ; %bb.2: ; %end
-; GFX9-NEXT:    s_endpgm
+; GFX6789-LABEL: test_sink_smem_offset_neg400:
+; GFX6789:       ; %bb.0: ; %entry
+; GFX6789-NEXT:    s_add_u32 s0, s0, 0xfffffe70
+; GFX6789-NEXT:    s_addc_u32 s1, s1, -1
+; GFX6789-NEXT:  .LBB5_1: ; %loop
+; GFX6789-NEXT:    ; =>This Inner Loop Header: Depth=1
+; GFX6789-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX6789-NEXT:    s_load_dword s3, s[0:1], 0x0
+; GFX6789-NEXT:    s_add_i32 s2, s2, -1
+; GFX6789-NEXT:    s_cmp_lg_u32 s2, 0
+; GFX6789-NEXT:    s_cbranch_scc1 .LBB5_1
+; GFX6789-NEXT:  ; %bb.2: ; %end
+; GFX6789-NEXT:    s_endpgm
 ;
 ; GFX12-LABEL: test_sink_smem_offset_neg400:
 ; GFX12:       ; %bb.0: ; %entry
@@ -331,3 +319,6 @@ loop:
 end:
   ret void
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX678: {{.*}}
+; GFX9: {{.*}}