[llvm] [LLVM][AArch64][tblgen]: Match clamp pattern (PR #75529)
Hassnaa Hamdi via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 19 07:02:57 PST 2023
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@@ -316,6 +316,32 @@ def AArch64ssra : PatFrags<(ops node:$op1, node:$op2, node:$op3),
[(int_aarch64_sve_ssra node:$op1, node:$op2, node:$op3),
(add node:$op1, (AArch64asr_p (SVEAnyPredicate), node:$op2, (SVEShiftSplatImmR (i32 node:$op3))))]>;
+// Replace pattern min(max(v1,v2),v3) by clamp
+def AArch64sclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm),
+ [(int_aarch64_sve_sclamp node:$Zd, node:$Zn, node:$Zm),
+ (AArch64smin_p (SVEAllActive),
+ (AArch64smax_p (SVEAllActive), node:$Zd, node:$Zn),
+ node:$Zm)
+ ]>;
+def AArch64uclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm),
+ [(int_aarch64_sve_uclamp node:$Zd, node:$Zn, node:$Zm),
+ (AArch64umin_p (SVEAllActive),
+ (AArch64umax_p (SVEAllActive), node:$Zd, node:$Zn),
+ node:$Zm)
+ ]>;
+def AArch64fclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm),
+ [(int_aarch64_sve_fclamp node:$Zd, node:$Zn, node:$Zm),
+ (AArch64fmin_p (SVEAllActive),
+ (AArch64fmax_p (SVEAllActive), node:$Zd, node:$Zn),
+ node:$Zm)
+ ]>;
+def AArch64bfclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm),
+ [(int_aarch64_sve_fclamp node:$Zd, node:$Zn, node:$Zm),
+ (int_aarch64_sve_fmin (nxv8i1 (SVEAllActive)),
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hassnaaHamdi wrote:
Sorry, I can't see the difference between fmin/fmax and fminnm/fmaxnm.
When I look at the documentation (pseudocode of them), I find that both of them handle the Nan values.
https://github.com/llvm/llvm-project/pull/75529
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