[llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)

[James Y Knight via llvm-commits]

jyknight wrote:

I don't know if this patch also works, but why not translate atomic_load_8/etc patterns directly in tablegen to instructions, and skip the generic LOAD entirely, like e.g. X86 does:
```
def : Pat<(i8  (atomic_load_8 addr:$src)),  (MOV8rm addr:$src)>;
def : Pat<(i16 (atomic_load_16 addr:$src)), (MOV16rm addr:$src)>;
def : Pat<(i32 (atomic_load_32 addr:$src)), (MOV32rm addr:$src)>;
def : Pat<(i64 (atomic_load_64 addr:$src)), (MOV64rm addr:$src)>;
[...]
def : Pat<(atomic_store_8 (i8 imm:$src), addr:$dst),
          (MOV8mi addr:$dst, imm:$src)>;
def : Pat<(atomic_store_16 (i16 imm:$src), addr:$dst),
          (MOV16mi addr:$dst, imm:$src)>;
def : Pat<(atomic_store_32 (i32 imm:$src), addr:$dst),
          (MOV32mi addr:$dst, imm:$src)>;
def : Pat<(atomic_store_64 (i64immSExt32:$src), addr:$dst),
          (MOV64mi32 addr:$dst, i64immSExt32:$src)>;
```

You only need to deal with the trailing fence after the store; for that, could have a Custom action which, if the store is SequentiallyConsistent, converts it to a Release atomic_store plus the fence, otherwise passes it along.

https://github.com/llvm/llvm-project/pull/75879