[llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 18 17:03:37 PST 2023
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 629412938b01773fe92cb5fd12f1c434fd80884d 7d9f9b2ee454594b73d9909e19f82355771e335d -- llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp llvm/lib/Target/SystemZ/SystemZISelLowering.cpp llvm/lib/Target/SystemZ/SystemZISelLowering.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index f22a6ae67b..adc868492e 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -1748,9 +1748,9 @@ void SystemZDAGToDAGISel::Select(SDNode *Node) {
case ISD::ATOMIC_LOAD: {
auto *AtomOp = cast<AtomicSDNode>(Node);
SDValue Ld =
- CurDAG->getExtLoad(ISD::EXTLOAD, SDLoc(AtomOp), AtomOp->getValueType(0),
- AtomOp->getChain(), AtomOp->getBasePtr(),
- AtomOp->getMemoryVT(), AtomOp->getMemOperand());
+ CurDAG->getExtLoad(ISD::EXTLOAD, SDLoc(AtomOp), AtomOp->getValueType(0),
+ AtomOp->getChain(), AtomOp->getBasePtr(),
+ AtomOp->getMemoryVT(), AtomOp->getMemOperand());
ReplaceNode(Node, Ld.getNode());
SelectCode(Ld.getNode());
return;
@@ -1758,10 +1758,9 @@ void SystemZDAGToDAGISel::Select(SDNode *Node) {
case ISD::ATOMIC_STORE: {
auto *AtomOp = cast<AtomicSDNode>(Node);
- SDValue St =
- CurDAG->getTruncStore(AtomOp->getChain(), SDLoc(AtomOp), AtomOp->getVal(),
- AtomOp->getBasePtr(), AtomOp->getMemoryVT(),
- AtomOp->getMemOperand());
+ SDValue St = CurDAG->getTruncStore(
+ AtomOp->getChain(), SDLoc(AtomOp), AtomOp->getVal(),
+ AtomOp->getBasePtr(), AtomOp->getMemoryVT(), AtomOp->getMemOperand());
SDNode *Chain = St.getNode();
// We have to enforce sequential consistency by performing a
// serialization operation after the store.
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 46ef7d1f29..f5db010160 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -4507,7 +4507,7 @@ SDValue SystemZTargetLowering::lowerATOMIC_FENCE(SDValue Op,
SDValue SystemZTargetLowering::lowerATOMIC_LOAD(SDValue Op,
SelectionDAG &DAG) const {
auto *Node = cast<AtomicSDNode>(Op.getNode());
- assert (Node->getMemoryVT() == MVT::i128 && "Only custom lowering i128.");
+ assert(Node->getMemoryVT() == MVT::i128 && "Only custom lowering i128.");
// Use same code to handle both legal and non-legal i128 types.
SmallVector<SDValue, 2> Results;
LowerOperationWrapper(Node, Results, DAG);
@@ -4517,7 +4517,7 @@ SDValue SystemZTargetLowering::lowerATOMIC_LOAD(SDValue Op,
SDValue SystemZTargetLowering::lowerATOMIC_STORE(SDValue Op,
SelectionDAG &DAG) const {
auto *Node = cast<AtomicSDNode>(Op.getNode());
- assert (Node->getMemoryVT() == MVT::i128 && "Only custom lowering i128.");
+ assert(Node->getMemoryVT() == MVT::i128 && "Only custom lowering i128.");
// Use same code to handle both legal and non-legal i128 types.
SmallVector<SDValue, 1> Results;
LowerOperationWrapper(Node, Results, DAG);
``````````
</details>
https://github.com/llvm/llvm-project/pull/75879
More information about the llvm-commits
mailing list