[llvm] [AArch64][SME] Enable dynamic shuffle for fixed length types. (PR #72490)

[Dinar Temirbulatov via llvm-commits]

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@@ -26123,26 +26123,48 @@ static SDValue GenerateFixedLengthSVETBL(SDValue Op, SDValue Op1, SDValue Op2,
 
   // Ignore two operands if no SVE2 or all index numbers couldn't
   // be represented.
-  if (!IsSingleOp && (!Subtarget.hasSVE2() || MinSVESize != MaxSVESize))
+  if (!IsSingleOp && !Subtarget.hasSVE2())
     return SDValue();
 
   EVT VTOp1 = Op.getOperand(0).getValueType();
   unsigned BitsPerElt = VTOp1.getVectorElementType().getSizeInBits();
   unsigned IndexLen = MinSVESize / BitsPerElt;
   unsigned ElementsPerVectorReg = VTOp1.getVectorNumElements();
   uint64_t MaxOffset = APInt(BitsPerElt, -1, false).getZExtValue();
+  EVT MaskEltType = EVT::getIntegerVT(*DAG.getContext(), BitsPerElt);
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dtemirbulatov wrote:

Thanks, but no mask element type should be an integer based type, for example ,if our vector type is half/float/double then Intrinsic::aarch64_sve_tbl/Intrinsic::aarch64_sve_tbl2 could not be selected and the mask element could not make any meaning.

https://github.com/llvm/llvm-project/pull/72490