[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

[Valery Pykhtin via llvm-commits]

vpykhtin wrote:

> It is a bit hard to write lit tests for all of these conditions, but I have unit tested the logic and validated the above cases.
Can you please add the unit test to this PR?

This is mostly LGTM. I would like this to be reviewed by other engineers, especially the code that calculated excess of register, I don't really know the details about Arch and AGPR registers.




https://github.com/llvm/llvm-project/pull/71882