[llvm] [X86][MC] Support Enc/Dec for EGPR for promoted SHA instruction (PR #75582)

[Shengchen Kan via llvm-commits]

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@@ -6757,20 +6757,65 @@ let Constraints = "$src1 = $dst", Predicates = [HasSHA] in {
 
   let Uses=[XMM0] in
   defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2", int_x86_sha256rnds2,
-                                SchedWriteVecIMul.XMM, 1>;
+                                SchedWriteVecIMul.XMM, "", 1>;
 
   defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1", int_x86_sha256msg1,
                                SchedWriteVecIMul.XMM>;
   defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2", int_x86_sha256msg2,
                                SchedWriteVecIMul.XMM>;
 }
 
+let Constraints = "$src1 = $dst", Predicates = [HasSHA, HasEGPR, In64BitMode] in {
+  def SHA1RNDS4rri_EVEX: Ii8<0xD4, MRMSrcReg, (outs VR128:$dst),
+                             (ins VR128:$src1, VR128:$src2, u8imm:$src3),
+                             "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
+                             [(set VR128:$dst,
+                               (int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
+                                (i8 timm:$src3)))]>,
+                         EVEX_NoCD8, T_MAP4PS, Sched<[SchedWriteVecIMul.XMM]>;
+  def SHA1RNDS4rmi_EVEX: Ii8<0xD4, MRMSrcMem, (outs VR128:$dst),
+                             (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
+                             "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
+                             [(set VR128:$dst,
+                               (int_x86_sha1rnds4 VR128:$src1,
+                                (memop addr:$src2),
+                                (i8 timm:$src3)))]>,
+                         EVEX_NoCD8, T_MAP4PS,
+                         Sched<[SchedWriteVecIMul.XMM.Folded,
+                                SchedWriteVecIMul.XMM.ReadAfterFold]>;
+
+  defm SHA1NEXTE : SHAI_binop<0xD8, "sha1nexte", int_x86_sha1nexte,
+                                   SchedWriteVecIMul.XMM, "_EVEX">,
+                        EVEX_NoCD8, T_MAP4PS;
+  defm SHA1MSG1  : SHAI_binop<0xD9, "sha1msg1", int_x86_sha1msg1,
+                              SchedWriteVecIMul.XMM, "_EVEX">,
+                   EVEX_NoCD8, T_MAP4PS;
+  defm SHA1MSG2  : SHAI_binop<0xDA, "sha1msg2", int_x86_sha1msg2,
+                              SchedWriteVecIMul.XMM, "_EVEX">,
+                   EVEX_NoCD8, T_MAP4PS;
+
+  let Uses=[XMM0] in
+  defm SHA256RNDS2 : SHAI_binop<0xDB, "sha256rnds2", int_x86_sha256rnds2,
+                                SchedWriteVecIMul.XMM, "_EVEX", 1>,
+                     EVEX_NoCD8, T_MAP4PS;
+
+  defm SHA256MSG1 : SHAI_binop<0xDC, "sha256msg1", int_x86_sha256msg1,
+                               SchedWriteVecIMul.XMM, "_EVEX">,
+                    EVEX_NoCD8, T_MAP4PS;
+  defm SHA256MSG2 : SHAI_binop<0xDD, "sha256msg2", int_x86_sha256msg2,
+                               SchedWriteVecIMul.XMM, "_EVEX">,
+                    EVEX_NoCD8, T_MAP4PS;
+}
+
 // Aliases with explicit %xmm0
 def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
                 (SHA256RNDS2rr VR128:$dst, VR128:$src2), 0>;
 def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
                 (SHA256RNDS2rm VR128:$dst, i128mem:$src2), 0>;
 
+def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
+                (SHA256RNDS2rm_EVEX VR128:$dst, i128mem:$src2), 0>;
+
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KanRobert wrote:

Do we need the alias for the rr variant?

https://github.com/llvm/llvm-project/pull/75582