[llvm] fc520f8 - [InstCombine] Precommit tests for PR75745 (NFC)

[Antonio Frighetto via llvm-commits]

Author: Antonio Frighetto
Date: 2023-12-17T21:41:02+01:00
New Revision: fc520f8b29416a3b0738e6c8c3a6d4eee67e42a6

URL: https://github.com/llvm/llvm-project/commit/fc520f8b29416a3b0738e6c8c3a6d4eee67e42a6
DIFF: https://github.com/llvm/llvm-project/commit/fc520f8b29416a3b0738e6c8c3a6d4eee67e42a6.diff

LOG: [InstCombine] Precommit tests for PR75745 (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/insert-const-shuf.ll
    llvm/test/Transforms/InstCombine/vec_shuffle.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
index 68dcc45e4b6c36..d2fa651b394497 100644
--- a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
+++ b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll
@@ -92,6 +92,7 @@ define <3 x float> @twoShufUses(<3 x float> %x) {
 
 ; The inserted scalar constant index is out-of-bounds for the shuffle vector constant.
 
+; FIXME: This is a miscompilation
 define <5 x i8> @longerMask(<3 x i8> %x) {
 ; CHECK-LABEL: @longerMask(
 ; CHECK-NEXT:    [[SHUF:%.*]] = shufflevector <3 x i8> [[X:%.*]], <3 x i8> <i8 poison, i8 1, i8 poison>, <5 x i32> <i32 2, i32 1, i32 4, i32 poison, i32 poison>

diff  --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll
index 0081da2c0aad75..e1174007b0fe0b 100644
--- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll
+++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll
@@ -2332,3 +2332,15 @@ define <2 x float> @uitofp_shuf_narrow(<4 x i32> %x, <4 x i32> %y) {
   %r = shufflevector <4 x float> %nx, <4 x float> %ny, <2 x i32> <i32 3, i32 5>
   ret <2 x float> %r
 }
+
+; FIXME: This is a miscompilation
+define <4 x i16> @blend_elements_from_load(ptr align 8 %_0) {
+; CHECK-LABEL: @blend_elements_from_load(
+; CHECK-NEXT:    [[LOAD:%.*]] = load <3 x i16>, ptr [[_0:%.*]], align 8
+; CHECK-NEXT:    [[RV:%.*]] = shufflevector <3 x i16> <i16 0, i16 poison, i16 poison>, <3 x i16> [[LOAD]], <4 x i32> <i32 0, i32 poison, i32 3, i32 5>
+; CHECK-NEXT:    ret <4 x i16> [[RV]]
+;
+  %load = load <3 x i16>, ptr %_0, align 8
+  %rv = shufflevector <3 x i16> <i16 0, i16 undef, i16 undef>, <3 x i16> %load, <4 x i32> <i32 0, i32 1, i32 3, i32 5>
+  ret <4 x i16> %rv
+}