[llvm] b6cce87 - [RISCV] Fix -Wbraced-scalar-init in RISCVISelLowering.cpp (NFC)

[Jie Fu via llvm-commits]

Author: Jie Fu
Date: 2023-12-17T19:59:42+08:00
New Revision: b6cce87110072a2db19276e042cd40b06285abbc

URL: https://github.com/llvm/llvm-project/commit/b6cce87110072a2db19276e042cd40b06285abbc
DIFF: https://github.com/llvm/llvm-project/commit/b6cce87110072a2db19276e042cd40b06285abbc.diff

LOG: [RISCV] Fix -Wbraced-scalar-init in RISCVISelLowering.cpp (NFC)

llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp:339:24:
 error: braces around scalar initializer [-Werror,-Wbraced-scalar-init]
  339 |     setOperationAction({ISD::ROTL}, XLenVT, Expand);
      |                        ^~~~~~~~~~~
1 error generated.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 782a9e1db569f5..03e994586d0c44 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -336,7 +336,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
       setOperationAction({ISD::ROTL, ISD::ROTR}, MVT::i32, Custom);
     setOperationAction({ISD::ROTL, ISD::ROTR}, XLenVT, Custom);
   } else if (Subtarget.hasVendorXCVbitmanip()) {
-    setOperationAction({ISD::ROTL}, XLenVT, Expand);
+    setOperationAction(ISD::ROTL, XLenVT, Expand);
   } else {
     setOperationAction({ISD::ROTL, ISD::ROTR}, XLenVT, Expand);
     if (RV64LegalI32 && Subtarget.is64Bit())