[llvm] [CodeGen][MachinePipeliner] Limit register pressure when scheduling (PR #74807)

Carlos Eduardo Seo via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 15 06:01:50 PST 2023

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ceseo wrote:

@kasuga-fj could you please check the failing check? It seems to be crashing the MLIR tests on Windows.

https://github.com/llvm/llvm-project/pull/74807

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