[llvm] [X86][MC] Support Enc/Dec for EGPR for promoted SHA instruction (PR #75582)

[Phoebe Wang via llvm-commits]

================
@@ -1632,12 +1632,19 @@ static const X86FoldTableEntry Table2[] = {
   {X86::SBB64rr, X86::SBB64rm, 0},
   {X86::SBB8rr, X86::SBB8rm, 0},
   {X86::SHA1MSG1rr, X86::SHA1MSG1rm, TB_ALIGN_16},
+  {X86::SHA1MSG1rr_EVEX, X86::SHA1MSG1rm_EVEX, 0},
----------------
phoebewang wrote:

This needs to be the same as SHA1MSG1rr, i.e., setting `TB_ALIGN_16`. See "4.2.18 EXCEPTION CLASS APX-EVEX-SHA"

General Protection #GP(0)

- X If the memory address is in a non-canonical form.
- X If the memory address is not 16-byte aligned












































https://github.com/llvm/llvm-project/pull/75582