[llvm] [LLVM][AArch64][tblgen]: Match clamp pattern (PR #75529)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

> Because I believe the loop vectoriser uses the sve intrinsics and not the llvm ones.

@CarolineConcatto: I'm pretty sure the loop vectoriser will emit the stock llvm intrinsics. Have you a test case that shows otherwise?

https://github.com/llvm/llvm-project/pull/75529