[llvm] [AMDGPU] CodeGen for SMEM instructions (PR #75579)

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github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff d63f54f91f49aa01ef3af490775ab8cf869cad0f ec90aab833550d677129c671b47cff0c8b668ca4 -- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp llvm/lib/Target/AMDGPU/GCNSubtarget.h llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index b9fc2617e6..f4d2c695e3 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8192,7 +8192,7 @@ SDValue SITargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
         Op.getOperand(4),                                        // voffset
         SOffset,                                                 // soffset
         Op.getOperand(6),                                        // offset
-      DAG.getTargetConstant(Dfmt | (Nfmt << 4), DL, MVT::i32), // format
+        DAG.getTargetConstant(Dfmt | (Nfmt << 4), DL, MVT::i32), // format
         DAG.getTargetConstant(Glc | (Slc << 1), DL, MVT::i32),   // cachepolicy
         DAG.getTargetConstant(IdxEn, DL, MVT::i1)                // idxen
     };

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https://github.com/llvm/llvm-project/pull/75579