[llvm] Add out-of-line-atomics support to GlobalISel (PR #74588)
Pavel Iliin via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 14 10:32:08 PST 2023
================
@@ -765,6 +765,175 @@ llvm::createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
return LegalizerHelper::Legalized;
}
+static RTLIB::Libcall
+getOutlineAtomicLibcall(unsigned Opc, AtomicOrdering Order, uint64_t MemSize) {
+ unsigned ModeN, ModelN;
+ switch (MemSize) {
+ case 1:
+ ModeN = 0;
+ break;
+ case 2:
+ ModeN = 1;
+ break;
+ case 4:
+ ModeN = 2;
+ break;
+ case 8:
+ ModeN = 3;
+ break;
+ case 16:
+ ModeN = 4;
+ break;
+ default:
+ return RTLIB::UNKNOWN_LIBCALL;
+ }
+
+ switch (Order) {
+ case AtomicOrdering::Monotonic:
+ ModelN = 0;
+ break;
+ case AtomicOrdering::Acquire:
+ ModelN = 1;
+ break;
+ case AtomicOrdering::Release:
+ ModelN = 2;
+ break;
+ case AtomicOrdering::AcquireRelease:
+ case AtomicOrdering::SequentiallyConsistent:
+ ModelN = 3;
+ break;
+ default:
+ return RTLIB::UNKNOWN_LIBCALL;
+ }
+
+#define LCALLS(A, B) \
+ { A##B##_RELAX, A##B##_ACQ, A##B##_REL, A##B##_ACQ_REL }
+#define LCALL5(A) \
+ LCALLS(A, 1), LCALLS(A, 2), LCALLS(A, 4), LCALLS(A, 8), LCALLS(A, 16)
+ switch (Opc) {
+ case TargetOpcode::G_ATOMIC_CMPXCHG:
+ case TargetOpcode::G_ATOMIC_CMPXCHG_WITH_SUCCESS: {
+ const RTLIB::Libcall LC[5][4] = {LCALL5(RTLIB::OUTLINE_ATOMIC_CAS)};
+ return LC[ModeN][ModelN];
+ }
+ case TargetOpcode::G_ATOMICRMW_XCHG: {
+ const RTLIB::Libcall LC[5][4] = {LCALL5(RTLIB::OUTLINE_ATOMIC_SWP)};
+ return LC[ModeN][ModelN];
+ }
+ case TargetOpcode::G_ATOMICRMW_ADD: {
+ const RTLIB::Libcall LC[5][4] = {LCALL5(RTLIB::OUTLINE_ATOMIC_LDADD)};
+ return LC[ModeN][ModelN];
+ }
+ case TargetOpcode::G_ATOMICRMW_SUB: {
+ const RTLIB::Libcall LC[5][4] = {LCALL5(RTLIB::OUTLINE_ATOMIC_LDADD)};
----------------
ilinpv wrote:
The same outline atomic as for G_ATOMICRMW_ADD, join these cases would be nice
https://github.com/llvm/llvm-project/pull/74588
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