[llvm] [RISCV] Rework subvec handling in insert_vector_elt lowering (PR #75513)

via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 14 10:28:13 PST 2023


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 7537c3c452df36447719291bebc5589bdd5d1501 629d602e05901e3caf7fa0c570ab4c028de6c434 -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 4029c374e9..24e813a9af 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -7798,8 +7798,7 @@ SDValue RISCVTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op,
     if (AlignedIdx) {
       Vec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ContainerVT, Vec,
                         AlignedIdx);
-      Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ContainerVT, Vec,
-                        Val, Idx);
+      Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ContainerVT, Vec, Val, Idx);
       Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, OrigContainerVT, OrigVec,
                         Vec, AlignedIdx);
       if (!VecVT.isFixedLengthVector())

``````````

</details>


https://github.com/llvm/llvm-project/pull/75513


More information about the llvm-commits mailing list