[llvm] c6351b4 - [AMDGPU][NFC] Regenerate .mir test

[Mirko Brkusanin via llvm-commits]

Author: Mirko Brkusanin
Date: 2023-12-14T18:58:43+01:00
New Revision: c6351b4cc90d115336a3f94c3a98953ebee460ff

URL: https://github.com/llvm/llvm-project/commit/c6351b4cc90d115336a3f94c3a98953ebee460ff
DIFF: https://github.com/llvm/llvm-project/commit/c6351b4cc90d115336a3f94c3a98953ebee460ff.diff

LOG: [AMDGPU][NFC] Regenerate .mir test

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll b/llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
index b03d705b43e97e..ceaba61da6fbba 100644
--- a/llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
+++ b/llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
@@ -56,22 +56,22 @@ define amdgpu_kernel void @extract_w_offset_vgpr(ptr addrspace(1) %out) {
   ; GCN-NEXT:   [[COPY14:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr2
   ; GCN-NEXT:   [[COPY15:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr1
   ; GCN-NEXT:   [[COPY16:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr0
-  ; GCN-NEXT:   undef %35.sub0:vreg_512 = COPY [[COPY1]]
-  ; GCN-NEXT:   %35.sub1:vreg_512 = COPY [[COPY2]]
-  ; GCN-NEXT:   %35.sub2:vreg_512 = COPY [[COPY3]]
-  ; GCN-NEXT:   %35.sub3:vreg_512 = COPY [[COPY4]]
-  ; GCN-NEXT:   %35.sub4:vreg_512 = COPY [[COPY5]]
-  ; GCN-NEXT:   %35.sub5:vreg_512 = COPY [[COPY6]]
-  ; GCN-NEXT:   %35.sub6:vreg_512 = COPY [[COPY7]]
-  ; GCN-NEXT:   %35.sub7:vreg_512 = COPY [[COPY8]]
-  ; GCN-NEXT:   %35.sub8:vreg_512 = COPY [[COPY9]]
-  ; GCN-NEXT:   %35.sub9:vreg_512 = COPY [[COPY10]]
-  ; GCN-NEXT:   %35.sub10:vreg_512 = COPY [[COPY11]]
-  ; GCN-NEXT:   %35.sub11:vreg_512 = COPY [[COPY12]]
-  ; GCN-NEXT:   %35.sub12:vreg_512 = COPY [[COPY13]]
-  ; GCN-NEXT:   %35.sub13:vreg_512 = COPY [[COPY14]]
-  ; GCN-NEXT:   %35.sub14:vreg_512 = COPY [[COPY15]]
-  ; GCN-NEXT:   %35.sub15:vreg_512 = COPY [[COPY16]]
+  ; GCN-NEXT:   undef [[COPY17:%[0-9]+]].sub0:vreg_512 = COPY [[COPY1]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub1:vreg_512 = COPY [[COPY2]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub2:vreg_512 = COPY [[COPY3]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub3:vreg_512 = COPY [[COPY4]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub4:vreg_512 = COPY [[COPY5]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub5:vreg_512 = COPY [[COPY6]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub6:vreg_512 = COPY [[COPY7]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub7:vreg_512 = COPY [[COPY8]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub8:vreg_512 = COPY [[COPY9]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub9:vreg_512 = COPY [[COPY10]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub10:vreg_512 = COPY [[COPY11]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub11:vreg_512 = COPY [[COPY12]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub12:vreg_512 = COPY [[COPY13]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub13:vreg_512 = COPY [[COPY14]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub14:vreg_512 = COPY [[COPY15]]
+  ; GCN-NEXT:   [[COPY17:%[0-9]+]].sub15:vreg_512 = COPY [[COPY16]]
   ; GCN-NEXT:   renamable $sgpr0_sgpr1 = S_MOV_B64 $exec
   ; GCN-NEXT:   SI_SPILL_S64_SAVE killed $sgpr0_sgpr1, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.0, align 4, addrspace 5)
   ; GCN-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
@@ -81,12 +81,12 @@ define amdgpu_kernel void @extract_w_offset_vgpr(ptr addrspace(1) %out) {
   ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.3(0x40000000)
   ; GCN-NEXT: {{  $}}
   ; GCN-NEXT:   $sgpr0_sgpr1 = SI_SPILL_S64_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.2, align 4, addrspace 5)
-  ; GCN-NEXT:   dead [[COPY17:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
+  ; GCN-NEXT:   dead [[COPY18:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
   ; GCN-NEXT:   renamable $sgpr2 = V_READFIRSTLANE_B32 [[COPY]](s32), implicit $exec
   ; GCN-NEXT:   renamable $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 $sgpr2, [[COPY]](s32), implicit $exec
   ; GCN-NEXT:   renamable $sgpr0_sgpr1 = S_AND_SAVEEXEC_B64 killed renamable $sgpr0_sgpr1, implicit-def $exec, implicit-def dead $scc, implicit $exec
-  ; GCN-NEXT:   [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V16 %35, killed $sgpr2, 11, implicit-def $m0, implicit $m0, implicit $exec
-  ; GCN-NEXT:   [[COPY18:%[0-9]+]]:vgpr_32 = COPY [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_]]
+  ; GCN-NEXT:   [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V16 [[COPY17]], killed $sgpr2, 11, implicit-def $m0, implicit $m0, implicit $exec
+  ; GCN-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = COPY [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_]]
   ; GCN-NEXT:   renamable $sgpr2_sgpr3 = COPY renamable $sgpr0_sgpr1
   ; GCN-NEXT:   SI_SPILL_S64_SAVE killed $sgpr2_sgpr3, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.2, align 4, addrspace 5)
   ; GCN-NEXT:   $exec = S_XOR_B64_term $exec, killed renamable $sgpr0_sgpr1, implicit-def dead $scc