[llvm] [AMDGPU] CodeGen for GFX12 VBUFFER instructions (PR #75492)

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git-clang-format --diff 1df373af1e810914a0339cd49e83bba0c0077e73 df9a07c1c53d0ed0f690a904815b16a6bb187636 -- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp llvm/lib/Target/AMDGPU/GCNSubtarget.h llvm/lib/Target/AMDGPU/SIFrameLowering.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 133d71d662..07fb2bcb95 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8188,7 +8188,7 @@ SDValue SITargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
         Op.getOperand(4),                                        // voffset
         SOffset,                                                 // soffset
         Op.getOperand(6),                                        // offset
-      DAG.getTargetConstant(Dfmt | (Nfmt << 4), DL, MVT::i32), // format
+        DAG.getTargetConstant(Dfmt | (Nfmt << 4), DL, MVT::i32), // format
         DAG.getTargetConstant(Glc | (Slc << 1), DL, MVT::i32),   // cachepolicy
         DAG.getTargetConstant(IdxEn, DL, MVT::i1)                // idxen
     };
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index d6092c004d..778d10f6f7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -8602,11 +8602,11 @@ bool SIInstrInfo::splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset,
   }
 
   if (Overflow > 0) {
-  // There is a hardware bug in SI and CI which prevents address clamping in
-  // MUBUF instructions from working correctly with SOffsets. The immediate
-  // offset is unaffected.
+    // There is a hardware bug in SI and CI which prevents address clamping in
+    // MUBUF instructions from working correctly with SOffsets. The immediate
+    // offset is unaffected.
     if (ST.getGeneration() <= AMDGPUSubtarget::SEA_ISLANDS)
-    return false;
+      return false;
 
     // It is not possible to set immediate in SOffset field on some targets.
     if (ST.hasRestrictedSOffset())

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https://github.com/llvm/llvm-project/pull/75492