[llvm] [AArch64] merge index address with large offset into base address (PR #75343)

[David Sherwood via llvm-commits]

================
@@ -481,6 +505,16 @@ static unsigned getPreIndexedOpcode(unsigned Opc) {
   }
 }
 
+static unsigned getBaseAddressOpcode(unsigned Opc) {
+  // TODO: Add more index address loads/stores.
+  switch (Opc) {
+  default:
+    llvm_unreachable("Opcode has no base address equivalent!");
----------------
david-arm wrote:

I guess the point I'm trying to make here is that usually we add a llvm_unreachable because we actually expect the code to be unreachable. However, I can't see anything that prevents us hitting the default case. For example, I'd expect code to be written in this way:

```
void foo(MI) {
  if (opcode == my_expected_opcode)
    foo2(MI);
}

void foo2() {
  switch (MI.getOpcode()) {
  default:
    llvm_unreachable("Unexpected opcode");
  case my_expected_opcode:
    do_something();
    break;
  }
}
```

My question was - do you have anything to explicitly prevent us from calling the function with an unexpected opcode?

https://github.com/llvm/llvm-project/pull/75343