[llvm] 1f3d13c - [riscv] Fix build due to missing test update
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 13 18:18:53 PST 2023
Author: Philip Reames
Date: 2023-12-13T18:18:41-08:00
New Revision: 1f3d13c415a2a92e5a3811740ed55c4bcff3f539
URL: https://github.com/llvm/llvm-project/commit/1f3d13c415a2a92e5a3811740ed55c4bcff3f539
DIFF: https://github.com/llvm/llvm-project/commit/1f3d13c415a2a92e5a3811740ed55c4bcff3f539.diff
LOG: [riscv] Fix build due to missing test update
My 632f1c appears to have missed a test update, sorry for the breakage.
Added:
Modified:
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
index 1ea8925ba415bd..a79180ed45b42b 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
@@ -598,8 +598,7 @@ bb:
define void @add_v128i8(ptr %x, ptr %y) vscale_range(2,2) {
; CHECK-LABEL: add_v128i8:
; CHECK: # %bb.0:
-; CHECK-NEXT: li a2, 128
-; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-NEXT: vsetvli a2, zero, e8, m8, ta, ma
; CHECK-NEXT: vle8.v v8, (a0)
; CHECK-NEXT: vle8.v v16, (a1)
; CHECK-NEXT: vadd.vv v8, v8, v16
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