[llvm] [LoongArch] Allow delayed decision for ADD/SUB relocations (PR #72960)

Lu Weining via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 13 18:05:08 PST 2023


================
@@ -190,6 +218,56 @@ bool LoongArchAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
   return true;
 }
 
+bool LoongArchAsmBackend::handleAddSubRelocations(const MCAsmLayout &Layout,
+                                                  const MCFragment &F,
+                                                  const MCFixup &Fixup,
+                                                  const MCValue &Target,
+                                                  uint64_t &FixedValue) const {
+  std::pair<MCFixupKind, MCFixupKind> FK;
+  uint64_t FixedValueA, FixedValueB;
+  const MCSection &SecA = Target.getSymA()->getSymbol().getSection();
+  const MCSection &SecB = Target.getSymB()->getSymbol().getSection();
+
+  // We need record relocation if SecA != SecB. Usually SecB is same as the
+  // section of Fixup, which will be record the relocation as PCRel. If SecB
+  // is not same as the section of Fixup, it will report error. Just return
+  // false and then this work can be finished by handleFixup.
+  if (&SecA != &SecB)
----------------
SixWeining wrote:

How about remove this? Then we can use ADD/SUB relocation pair to represent a difference across sections which match gcc/binutils behaviour.

For example:
```
.section sx,"a"
x:
nop

.data
.8byte x-y 

.section sy,"a"
y:
nop
```

```
Relocation section '.rela.data' at offset 0x178 contains 8 entries:
    Offset             Info             Type               Symbol's Value  Symbol's Name + Addend
0000000000000000  0000000500000033 R_LARCH_ADD64          0000000000000000 x + 0
0000000000000000  0000000600000038 R_LARCH_SUB64          0000000000000000 y + 0
```


https://github.com/llvm/llvm-project/pull/72960


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