[llvm] [AArch64] merge index address with large offset into base address (PR #75343)

[via llvm-commits]

================
@@ -4089,6 +4089,11 @@ AArch64InstrInfo::getLdStOffsetOp(const MachineInstr &MI) {
   return MI.getOperand(Idx);
 }
 
+const MachineOperand &
+AArch64InstrInfo::getLdStAmountOp(const MachineInstr &MI) {
+  return MI.getOperand(4);
----------------
vfdff wrote:

yes, it need extend with a `switch case ` when we add more supported instrunction. 
The first version I only supported the `LDRBBroX `,  and it is **operand 4**.
I only add one instrunction in the first version to make sure if it is reasonable for the optimization direction itself.
If it is adopted, I will add other memory access instructions in the subsequent patch.

https://github.com/llvm/llvm-project/pull/75343