[llvm] [X86][FastISel] Support medium code model in more places (PR #75375)
Arthur Eubanks via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 13 12:23:46 PST 2023
https://github.com/aeubanks created https://github.com/llvm/llvm-project/pull/75375
The medium code model is basically identical to the small code model
except that large objects cannot be referenced with 32-bit offsets.
>From 97d991bbc71ecb28a9d78a6348f53120591621f6 Mon Sep 17 00:00:00 2001
From: Arthur Eubanks <aeubanks at google.com>
Date: Wed, 13 Dec 2023 12:18:07 -0800
Subject: [PATCH] [X86][FastISel] Support medium code model in more places
The medium code model is basically identical to the small code model
except that large objects cannot be referenced with 32-bit offsets.
---
llvm/lib/Target/X86/X86FastISel.cpp | 18 +++++---
llvm/test/CodeGen/X86/fast-isel-constpool.ll | 1 +
.../X86/fast-isel-medium-code-model.ll | 44 +++++++++++++++++++
3 files changed, 57 insertions(+), 6 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index bdc9d1d42dd160..425c52dbe7b104 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -711,7 +711,8 @@ bool X86FastISel::handleConstantAddresses(const Value *V, X86AddressMode &AM) {
// Handle constant address.
if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// Can't handle alternate code models yet.
- if (TM.getCodeModel() != CodeModel::Small)
+ if (TM.getCodeModel() != CodeModel::Small &&
+ TM.getCodeModel() != CodeModel::Medium)
return false;
// Can't handle large objects yet.
@@ -1050,7 +1051,8 @@ bool X86FastISel::X86SelectCallAddress(const Value *V, X86AddressMode &AM) {
// Handle constant address.
if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// Can't handle alternate code models yet.
- if (TM.getCodeModel() != CodeModel::Small)
+ if (TM.getCodeModel() != CodeModel::Small &&
+ TM.getCodeModel() != CodeModel::Medium)
return false;
// RIP-relative addresses can't have additional register operands.
@@ -3774,7 +3776,8 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
// Can't handle alternate code models yet.
CodeModel::Model CM = TM.getCodeModel();
- if (CM != CodeModel::Small && CM != CodeModel::Large)
+ if (CM != CodeModel::Small && CM != CodeModel::Medium &&
+ CM != CodeModel::Large)
return 0;
// Get opcode and regclass of the output for the given load instruction.
@@ -3812,7 +3815,7 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
PICBase = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
else if (OpFlag == X86II::MO_GOTOFF)
PICBase = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
- else if (Subtarget->is64Bit() && TM.getCodeModel() == CodeModel::Small)
+ else if (Subtarget->is64Bit() && TM.getCodeModel() != CodeModel::Large)
PICBase = X86::RIP;
// Create the load from the constant pool.
@@ -3842,8 +3845,11 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
}
unsigned X86FastISel::X86MaterializeGV(const GlobalValue *GV, MVT VT) {
- // Can't handle alternate code models yet.
- if (TM.getCodeModel() != CodeModel::Small)
+ // Can't handle large GlobalValues yet.
+ if (TM.getCodeModel() != CodeModel::Small &&
+ TM.getCodeModel() != CodeModel::Medium)
+ return 0;
+ if (!isa<GlobalObject>(GV) || TM.isLargeGlobalObject(cast<GlobalObject>(GV)))
return 0;
// Materialize addresses with LEA/MOV instructions.
diff --git a/llvm/test/CodeGen/X86/fast-isel-constpool.ll b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
index 9f70fd55907377..9e4cbb61308eaa 100644
--- a/llvm/test/CodeGen/X86/fast-isel-constpool.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=medium < %s | FileCheck %s
; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
; RUN: llc -mtriple=x86_64 -fast-isel -code-model=large -relocation-model=pic < %s | FileCheck %s --check-prefix=LARGE_PIC
; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx < %s | FileCheck %s --check-prefix=AVX
diff --git a/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll b/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
new file mode 100644
index 00000000000000..4aa230a209e285
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=3 -code-model=medium -large-data-threshold=5 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -code-model=medium -large-data-threshold=3 < %s -o /dev/null \
+; RUN: -pass-remarks-output=- -pass-remarks-filter=sdagisel | FileCheck %s --check-prefix=FALLBACK --implicit-check-not=missed
+
+declare void @foo()
+
+define void @call_foo() {
+; CHECK-LABEL: call_foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: callq foo at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: retq
+ call void @foo()
+ ret void
+}
+
+ at g = internal global i32 42
+
+; FALLBACK: FastISel missed terminator
+; FALLBACK: in function: g_addr
+
+define ptr @g_addr() {
+; CHECK-LABEL: g_addr:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movabsq $g, %rax
+; CHECK-NEXT: retq
+ ret ptr @g
+}
+
+; FALLBACK: FastISel missed
+; FALLBACK: in function: load_g
+
+define i32 @load_g() {
+; CHECK-LABEL: load_g:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl g, %eax
+; CHECK-NEXT: retq
+ %i = load i32, ptr @g
+ ret i32 %i
+}
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