[llvm] 2fd7657 - [XCOFF] Display branch-absolute targets in hex. (#72532)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 13 10:55:51 PST 2023
Author: stephenpeckham
Date: 2023-12-13T12:55:47-06:00
New Revision: 2fd7657b6609454af7adb75765d164ec7d1bb80b
URL: https://github.com/llvm/llvm-project/commit/2fd7657b6609454af7adb75765d164ec7d1bb80b
DIFF: https://github.com/llvm/llvm-project/commit/2fd7657b6609454af7adb75765d164ec7d1bb80b.diff
LOG: [XCOFF] Display branch-absolute targets in hex. (#72532)
Branch-absolute instructions are currently printed in decimal, and
negative addresses are printed as positive numbers.
With this change, addresses are printed in hex and negative addresses
are converted to an unsigned 32- or 64-bit address.
Added:
llvm/test/tools/llvm-objdump/XCOFF/disassemble-abs.test
Modified:
lld/test/ELF/ppc32-reloc-addr.s
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.td
llvm/test/MC/Disassembler/PowerPC/ppc64-operands.txt
llvm/test/MC/PowerPC/ppc32-ba.s
llvm/test/MC/PowerPC/ppc64-operands.s
Removed:
################################################################################
diff --git a/lld/test/ELF/ppc32-reloc-addr.s b/lld/test/ELF/ppc32-reloc-addr.s
index 78865b82ccbf1d..9b40bce77aec48 100644
--- a/lld/test/ELF/ppc32-reloc-addr.s
+++ b/lld/test/ELF/ppc32-reloc-addr.s
@@ -22,7 +22,7 @@
.section .R_PPC_ADDR24,"ax", at progbits
ba a
# CHECK-LABEL: section .R_PPC_ADDR24:
-# CHECK: ba 4660
+# CHECK: ba 0x1234
.section .R_PPC_ADDR32,"a", at progbits
.long a
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index ccbb650c65365b..5e2106e9184f84 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -484,7 +484,10 @@ void PPCInstPrinter::printAbsBranchOperand(const MCInst *MI, unsigned OpNo,
if (!MI->getOperand(OpNo).isImm())
return printOperand(MI, OpNo, STI, O);
- O << SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2);
+ uint64_t Imm = MI->getOperand(OpNo).getImm() << 2;
+ if (!TT.isPPC64())
+ Imm = static_cast<uint32_t>(Imm);
+ O << formatHex(Imm);
}
void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
index 6151faf403aaaf..375e63654db118 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -798,6 +798,7 @@ def directbrtarget : Operand<OtherVT> {
def absdirectbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";
let EncoderMethod = "getAbsDirectBrEncoding";
+ let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
}
def PPCCondBrAsmOperand : AsmOperandClass {
@@ -814,6 +815,7 @@ def condbrtarget : Operand<OtherVT> {
def abscondbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";
let EncoderMethod = "getAbsCondBrEncoding";
+ let DecoderMethod = "decodeCondBrTarget";
let ParserMatchClass = PPCCondBrAsmOperand;
}
def calltarget : Operand<iPTR> {
@@ -826,6 +828,7 @@ def calltarget : Operand<iPTR> {
def abscalltarget : Operand<iPTR> {
let PrintMethod = "printAbsBranchOperand";
let EncoderMethod = "getAbsDirectBrEncoding";
+ let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
}
def PPCCRBitMaskOperand : AsmOperandClass {
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-operands.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-operands.txt
index 3fcba735584b93..8d63b153b2d5ef 100644
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-operands.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-operands.txt
@@ -81,7 +81,7 @@
# CHECK: b .+1024
0x48 0x00 0x04 0x00
-# CHECK: ba 1024
+# CHECK: ba 0x400
0x48 0x00 0x04 0x02
# FIXME: decode as beq 0, .+1024
@@ -89,6 +89,6 @@
0x41 0x82 0x04 0x00
# FIXME: decode as beqa 0, 1024
-# CHECK: bta 2, 1024
+# CHECK: bta 2, 0x400
0x41 0x82 0x04 0x02
diff --git a/llvm/test/MC/PowerPC/ppc32-ba.s b/llvm/test/MC/PowerPC/ppc32-ba.s
index 133423b4e8c312..3b781481553479 100644
--- a/llvm/test/MC/PowerPC/ppc32-ba.s
+++ b/llvm/test/MC/PowerPC/ppc32-ba.s
@@ -1,6 +1,10 @@
# RUN: llvm-mc -triple powerpc-unknown-unknown --show-encoding %s | FileCheck %s
-# Check that large immediates in 32bit mode are accepted.
+# Check that large and/or negative immediates in 32-bit mode are accepted.
-# CHECK: ba -33554432 # encoding: [0x4a,0x00,0x00,0x02]
+# CHECK: ba 0xfe000000 # encoding: [0x4a,0x00,0x00,0x02]
+# CHECK-NEXT: ba 0xfe000000 # encoding: [0x4a,0x00,0x00,0x02]
+# CHECK-NEXT: ba 0xfffffc00 # encoding: [0x4b,0xff,0xfc,0x02]
ba 0xfe000000
+ ba (-33554432)
+ ba (-1024)
diff --git a/llvm/test/MC/PowerPC/ppc64-operands.s b/llvm/test/MC/PowerPC/ppc64-operands.s
index 9cd94bea6f815c..366e1faf31357c 100644
--- a/llvm/test/MC/PowerPC/ppc64-operands.s
+++ b/llvm/test/MC/PowerPC/ppc64-operands.s
@@ -128,16 +128,16 @@
# CHECK-LE: b .+1024 # encoding: [0x00,0x04,0x00,0x48]
b 1024
-# CHECK-BE: ba 1024 # encoding: [0x48,0x00,0x04,0x02]
-# CHECK-LE: ba 1024 # encoding: [0x02,0x04,0x00,0x48]
+# CHECK-BE: ba 0x400 # encoding: [0x48,0x00,0x04,0x02]
+# CHECK-LE: ba 0x400 # encoding: [0x02,0x04,0x00,0x48]
ba 1024
# CHECK-BE: beq 0, .+1024 # encoding: [0x41,0x82,0x04,0x00]
# CHECK-LE: beq 0, .+1024 # encoding: [0x00,0x04,0x82,0x41]
beq 1024
-# CHECK-BE: beqa 0, 1024 # encoding: [0x41,0x82,0x04,0x02]
-# CHECK-LE: beqa 0, 1024 # encoding: [0x02,0x04,0x82,0x41]
+# CHECK-BE: beqa 0, 0x400 # encoding: [0x41,0x82,0x04,0x02]
+# CHECK-LE: beqa 0, 0x400 # encoding: [0x02,0x04,0x82,0x41]
beqa 1024
# CHECK-BE: # encoding: [0x42,0x9f,A,0bAAAAAA01]
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-abs.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-abs.test
new file mode 100644
index 00000000000000..c1b76e15528473
--- /dev/null
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-abs.test
@@ -0,0 +1,158 @@
+## Object files assembled on AIX from the following source:
+## .csect [PR]
+##.main:
+## .globl .main
+## .extern .function
+## bla .function
+## btla .function
+## ba 0x1234
+## ba -32
+## bta 0x2348
+## bta -256
+#
+# RUN: yaml2obj %s --docnum=1 -o %t32.o
+# RUN: llvm-objdump -d %t32.o | FileCheck %s
+#
+# CHECK: : file format aixcoff-rs6000
+# CHECK: Disassembly of section .text:
+# CHECK: 00000000 <.main>:
+# CHECK: 0: 48 00 00 03 bla 0x0
+# CHECK-NEXT: 4: 41 80 00 03 btla 0, 0x0
+# CHECK-NEXT: 8: 48 00 12 36 ba 0x1234
+# CHECK-NEXT: c: 4b ff ff e2 ba 0xffffffe0
+# CHECK-NEXT: 10: 41 80 23 4a bta 0, 0x2348
+# CHECK-NEXT: 14: 41 80 ff 02 bta 0, 0xffffff00
+
+--- !XCOFF
+FileHeader:
+ MagicNumber: 0x1DF
+ NumberOfSections: 1
+ CreationTime: 1700148622
+ OffsetToSymbolTable: 0x68
+ EntriesInSymbolTable: 8
+ AuxiliaryHeaderSize: 0
+ Flags: 0x0
+Sections:
+ - Name: .text
+ Address: 0x0
+ Size: 0x18
+ FileOffsetToData: 0x3C
+ FileOffsetToRelocations: 0x54
+ FileOffsetToLineNumbers: 0x0
+ NumberOfRelocations: 0x2
+ NumberOfLineNumbers: 0x0
+ Flags: [ STYP_TEXT ]
+ SectionData: 4800000341800003480012364BFFFFE24180234A4180FF02
+ Relocations:
+ - Address: 0x0
+ Symbol: 0x2
+ Info: 0x99
+ Type: 0x18
+ - Address: 0x6
+ Symbol: 0x2
+ Info: 0x8F
+ Type: 0x18
+Symbols:
+ - Name: .file
+ Value: 0x0
+ Section: N_DEBUG
+ Type: 0xC03
+ StorageClass: C_FILE
+ NumberOfAuxEntries: 1
+ - Name: .function
+ Value: 0x0
+ Section: N_UNDEF
+ Type: 0x0
+ StorageClass: C_EXT
+ NumberOfAuxEntries: 1
+ - Name: ''
+ Value: 0x0
+ Section: .text
+ Type: 0x0
+ StorageClass: C_HIDEXT
+ NumberOfAuxEntries: 1
+ - Name: .main
+ Value: 0x0
+ Section: .text
+ Type: 0x0
+ StorageClass: C_EXT
+ NumberOfAuxEntries: 1
+StringTable: {}
+...
+
+# RUN: yaml2obj %s --docnum=2 -o %t64.o
+# RUN: llvm-objdump -d %t64.o | FileCheck --check-prefixes=CHECK64 %s
+#
+
+# CHECK64: : file format aix5coff64-rs6000
+# CHECK64: Disassembly of section .text:
+# CHECK64: 0000000000000000 <.main>:
+# CHECK64-NEXT: 0: 48 00 00 03 bla 0x0
+# CHECK64-NEXT: 4: 41 80 00 03 btla 0, 0x0
+# CHECK64-NEXT: 8: 48 00 12 36 ba 0x1234
+# CHECK64-NEXT: c: 4b ff ff e2 ba 0xffffffffffffffe0
+# CHECK64-NEXT: 10: 41 80 23 4a bta 0, 0x2348
+# CHECK64-NEXT: 14: 41 80 ff 02 bta 0, 0xffffffffffffff00
+#
+--- !XCOFF
+FileHeader:
+ MagicNumber: 0x1F7
+ NumberOfSections: 1
+ CreationTime: 1701859282
+ AuxiliaryHeaderSize: 0
+ Flags: 0x0
+Sections:
+ - Name: .text
+ Address: 0x0
+ Size: 0x18
+ FileOffsetToData: 0x60
+ FileOffsetToRelocations: 0x78
+ FileOffsetToLineNumbers: 0x0
+ NumberOfRelocations: 0x2
+ NumberOfLineNumbers: 0x0
+ Flags: [ STYP_TEXT ]
+ SectionData: 4800000341800003480012364BFFFFE24180234A4180FF02
+ Relocations:
+ - Address: 0x0
+ Symbol: 0x1
+ Info: 0x99
+ Type: 0x18
+ - Address: 0x6
+ Symbol: 0x1
+ Info: 0x8F
+ Type: 0x18
+Symbols:
+ - Name: .file
+ Section: N_DEBUG
+ StorageClass: C_FILE
+ NumberOfAuxEntries: 0
+ - Name: .function
+ Section: N_UNDEF
+ StorageClass: C_EXT
+ NumberOfAuxEntries: 1
+ AuxEntries:
+ - Type: AUX_CSECT
+ StorageMappingClass: XMC_PR
+ SymbolAlignmentAndType: 0
+ - Name: ''
+ Section: .text
+ StorageClass: C_HIDEXT
+ NumberOfAuxEntries: 1
+ AuxEntries:
+ - Type: AUX_CSECT
+ StorageMappingClass: XMC_PR
+ SymbolAlignmentAndType: 1
+ - Name: .main
+ Section: .text
+ StorageClass: C_EXT
+ NumberOfAuxEntries: 1
+ AuxEntries:
+ - Type: AUX_CSECT
+ StorageMappingClass: XMC_PR
+ SymbolAlignmentAndType: 2
+StringTable:
+ Strings:
+ - .file
+ - .function
+ - .text
+ - .main
More information about the llvm-commits
mailing list