[llvm] 65dea5c - [X86][test] Merge the decoding tests for avx512_bf16 and unify the names

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 13 01:40:46 PST 2023


Author: Shengchen Kan
Date: 2023-12-13T17:40:31+08:00
New Revision: 65dea5cc7208c42a803acbd125933b61cefc6f6e

URL: https://github.com/llvm/llvm-project/commit/65dea5cc7208c42a803acbd125933b61cefc6f6e
DIFF: https://github.com/llvm/llvm-project/commit/65dea5cc7208c42a803acbd125933b61cefc6f6e.diff

LOG:  [X86][test] Merge the decoding tests for avx512_bf16 and unify the names

Added: 
    llvm/test/MC/Disassembler/X86/avx512_bf16-32.txt
    llvm/test/MC/Disassembler/X86/avx512_bf16-64.txt
    llvm/test/MC/X86/avx512_bf16-32-att.s
    llvm/test/MC/X86/avx512_bf16-32-intel.s
    llvm/test/MC/X86/avx512_bf16-64-att.s
    llvm/test/MC/X86/avx512_bf16-64-intel.s

Modified: 
    

Removed: 
    llvm/test/MC/Disassembler/X86/avx512_bf16.txt
    llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
    llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
    llvm/test/MC/X86/avx512_bf16-att.s
    llvm/test/MC/X86/avx512_bf16-intel.s
    llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s
    llvm/test/MC/X86/x86-64-avx512_bf16-encoding.s


################################################################################
diff  --git a/llvm/test/MC/Disassembler/X86/avx512_bf16.txt b/llvm/test/MC/Disassembler/X86/avx512_bf16-32.txt
similarity index 73%
rename from llvm/test/MC/Disassembler/X86/avx512_bf16.txt
rename to llvm/test/MC/Disassembler/X86/avx512_bf16-32.txt
index daa700348499a7..42f0c75fe367d4 100644
--- a/llvm/test/MC/Disassembler/X86/avx512_bf16.txt
+++ b/llvm/test/MC/Disassembler/X86/avx512_bf16-32.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
-# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+# RUN: llvm-mc -triple i686-unknown-unknown -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple i686-unknown-unknown -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
 
 # ATT:   vcvtne2ps2bf16	%zmm4, %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmm4
@@ -15,39 +15,39 @@
 
 # ATT:   vcvtne2ps2bf16	(%ecx), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [ecx]
-0x67,0x62,0xf2,0x57,0x48,0x72,0x31
+0x62,0xf2,0x57,0x48,0x72,0x31
 
 # ATT:   vcvtne2ps2bf16	291(%esp,%esi,8), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp + 8*esi + 291]
-0x67,0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00
+0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00
 
 # ATT:   vcvtne2ps2bf16	268435456(%esp,%esi,8), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp + 8*esi + 268435456]
-0x67,0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
 
 # ATT:   vcvtne2ps2bf16	-64(%esp), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp - 64]
-0x67,0x62,0xf2,0x57,0x48,0x72,0x74,0x24,0xff
+0x62,0xf2,0x57,0x48,0x72,0x74,0x24,0xff
 
 # ATT:   vcvtne2ps2bf16	(%eax){1to16}, %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [eax]{1to16}
-0x67,0x62,0xf2,0x57,0x58,0x72,0x30
+0x62,0xf2,0x57,0x58,0x72,0x30
 
 # ATT:   vcvtne2ps2bf16	8128(%edx), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [edx + 8128]
-0x67,0x62,0xf2,0x57,0x48,0x72,0x72,0x7f
+0x62,0xf2,0x57,0x48,0x72,0x72,0x7f
 
 # ATT:   vcvtne2ps2bf16	-8192(%edx), %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [edx - 8192]
-0x67,0x62,0xf2,0x57,0x48,0x72,0x72,0x80
+0x62,0xf2,0x57,0x48,0x72,0x72,0x80
 
 # ATT:   vcvtne2ps2bf16	508(%edx){1to16}, %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [edx + 508]{1to16}
-0x67,0x62,0xf2,0x57,0x58,0x72,0x72,0x7f
+0x62,0xf2,0x57,0x58,0x72,0x72,0x7f
 
 # ATT:   vcvtne2ps2bf16	-512(%edx){1to16}, %zmm5, %zmm6
 # INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [edx - 512]{1to16}
-0x67,0x62,0xf2,0x57,0x58,0x72,0x72,0x80
+0x62,0xf2,0x57,0x58,0x72,0x72,0x80
 
 # ATT:   vcvtneps2bf16	%zmm5, %ymm6
 # INTEL: vcvtneps2bf16	ymm6, zmm5
@@ -55,19 +55,19 @@
 
 # ATT:   vcvtneps2bf16	268435456(%esp,%esi,8), %ymm6 {%k7}
 # INTEL: vcvtneps2bf16	ymm6 {k7}, zmmword ptr [esp + 8*esi + 268435456]
-0x67,0x62,0xf2,0x7e,0x4f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+0x62,0xf2,0x7e,0x4f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
 
 # ATT:   vcvtneps2bf16	(%ecx){1to16}, %ymm6
 # INTEL: vcvtneps2bf16	ymm6, dword ptr [ecx]{1to16}
-0x67,0x62,0xf2,0x7e,0x58,0x72,0x31
+0x62,0xf2,0x7e,0x58,0x72,0x31
 
 # ATT:   vcvtneps2bf16	8128(%ecx), %ymm6
 # INTEL: vcvtneps2bf16	ymm6, zmmword ptr [ecx + 8128]
-0x67,0x62,0xf2,0x7e,0x48,0x72,0x71,0x7f
+0x62,0xf2,0x7e,0x48,0x72,0x71,0x7f
 
 # ATT:   vcvtneps2bf16	-512(%edx){1to16}, %ymm6 {%k7} {z}
 # INTEL: vcvtneps2bf16	ymm6 {k7} {z}, dword ptr [edx - 512]{1to16}
-0x67,0x62,0xf2,0x7e,0xdf,0x72,0x72,0x80
+0x62,0xf2,0x7e,0xdf,0x72,0x72,0x80
 
 # ATT:   vdpbf16ps	%zmm4, %zmm5, %zmm6
 # INTEL: vdpbf16ps	zmm6, zmm5, zmm4
@@ -75,16 +75,16 @@
 
 # ATT:   vdpbf16ps	268435456(%esp,%esi,8), %zmm5, %zmm6 {%k7}
 # INTEL: vdpbf16ps	zmm6 {k7}, zmm5, zmmword ptr [esp + 8*esi + 268435456]
-0x67,0x62,0xf2,0x56,0x4f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10
+0x62,0xf2,0x56,0x4f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10
 
 # ATT:   vdpbf16ps	(%ecx){1to16}, %zmm5, %zmm6
 # INTEL: vdpbf16ps	zmm6, zmm5, dword ptr [ecx]{1to16}
-0x67,0x62,0xf2,0x56,0x58,0x52,0x31
+0x62,0xf2,0x56,0x58,0x52,0x31
 
 # ATT:   vdpbf16ps	8128(%ecx), %zmm5, %zmm6
 # INTEL: vdpbf16ps	zmm6, zmm5, zmmword ptr [ecx + 8128]
-0x67,0x62,0xf2,0x56,0x48,0x52,0x71,0x7f
+0x62,0xf2,0x56,0x48,0x52,0x71,0x7f
 
 # ATT:   vdpbf16ps	-512(%edx){1to16}, %zmm5, %zmm6 {%k7} {z}
 # INTEL: vdpbf16ps	zmm6 {k7} {z}, zmm5, dword ptr [edx - 512]{1to16}
-0x67,0x62,0xf2,0x56,0xdf,0x52,0x72,0x80
+0x62,0xf2,0x56,0xdf,0x52,0x72,0x80

diff  --git a/llvm/test/MC/Disassembler/X86/avx512_bf16-64.txt b/llvm/test/MC/Disassembler/X86/avx512_bf16-64.txt
new file mode 100644
index 00000000000000..7296bd4ed3d971
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx512_bf16-64.txt
@@ -0,0 +1,90 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   vcvtne2ps2bf16	%zmm28, %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmm28
+0x62,0x02,0x17,0x40,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	%zmm28, %zmm29, %zmm30 {%k7}
+# INTEL: vcvtne2ps2bf16	zmm30 {k7}, zmm29, zmm28
+0x62,0x02,0x17,0x47,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	%zmm28, %zmm29, %zmm30 {%k7} {z}
+# INTEL: vcvtne2ps2bf16	zmm30 {k7} {z}, zmm29, zmm28
+0x62,0x02,0x17,0xc7,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	(%rcx), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rcx]
+0x62,0x62,0x17,0x40,0x72,0x31
+
+# ATT:   vcvtne2ps2bf16	291(%rax,%r14,8), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rax + 8*r14 + 291]
+0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00
+
+# ATT:   vcvtne2ps2bf16	268435456(%rax,%r14,8), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rax + 8*r14 + 268435456]
+0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10
+
+# ATT:   vcvtne2ps2bf16	-64(%rsp), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rsp - 64]
+0x62,0x62,0x17,0x40,0x72,0x74,0x24,0xff
+
+# ATT:   vcvtne2ps2bf16	(%rcx){1to16}, %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, dword ptr [rcx]{1to16}
+0x62,0x62,0x17,0x50,0x72,0x31
+
+# ATT:   vcvtne2ps2bf16	8128(%rdx), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rdx + 8128]
+0x62,0x62,0x17,0x40,0x72,0x72,0x7f
+
+# ATT:   vcvtne2ps2bf16	-8192(%rdx), %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, zmmword ptr [rdx - 8192]
+0x62,0x62,0x17,0x40,0x72,0x72,0x80
+
+# ATT:   vcvtne2ps2bf16	508(%rdx){1to16}, %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, dword ptr [rdx + 508]{1to16}
+0x62,0x62,0x17,0x50,0x72,0x72,0x7f
+
+# ATT:   vcvtne2ps2bf16	-512(%rdx){1to16}, %zmm29, %zmm30
+# INTEL: vcvtne2ps2bf16	zmm30, zmm29, dword ptr [rdx - 512]{1to16}
+0x62,0x62,0x17,0x50,0x72,0x72,0x80
+
+# ATT:   vcvtneps2bf16	%zmm29, %ymm30
+# INTEL: vcvtneps2bf16	ymm30, zmm29
+0x62,0x02,0x7e,0x48,0x72,0xf5
+
+# ATT:   vcvtneps2bf16	268435456(%rbp,%r14,8), %ymm30 {%k7}
+# INTEL: vcvtneps2bf16	ymm30 {k7}, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x7e,0x4f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   vcvtneps2bf16	(%r9){1to16}, %ymm30
+# INTEL: vcvtneps2bf16	ymm30, dword ptr [r9]{1to16}
+0x62,0x42,0x7e,0x58,0x72,0x31
+
+# ATT:   vcvtneps2bf16	8128(%rcx), %ymm30
+# INTEL: vcvtneps2bf16	ymm30, zmmword ptr [rcx + 8128]
+0x62,0x62,0x7e,0x48,0x72,0x71,0x7f
+
+# ATT:   vcvtneps2bf16	-512(%rdx){1to16}, %ymm30 {%k7} {z}
+# INTEL: vcvtneps2bf16	ymm30 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0x62,0x7e,0xdf,0x72,0x72,0x80
+
+# ATT:   vdpbf16ps	%zmm28, %zmm29, %zmm30
+# INTEL: vdpbf16ps	zmm30, zmm29, zmm28
+0x62,0x02,0x16,0x40,0x52,0xf4
+
+# ATT:   vdpbf16ps	268435456(%rbp,%r14,8), %zmm29, %zmm30 {%k7}
+# INTEL: vdpbf16ps	zmm30 {k7}, zmm29, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x16,0x47,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   vdpbf16ps	(%r9){1to16}, %zmm29, %zmm30
+# INTEL: vdpbf16ps	zmm30, zmm29, dword ptr [r9]{1to16}
+0x62,0x42,0x16,0x50,0x52,0x31
+
+# ATT:   vdpbf16ps	8128(%rcx), %zmm29, %zmm30
+# INTEL: vdpbf16ps	zmm30, zmm29, zmmword ptr [rcx + 8128]
+0x62,0x62,0x16,0x40,0x52,0x71,0x7f
+
+# ATT:   vdpbf16ps	-512(%rdx){1to16}, %zmm29, %zmm30 {%k7} {z}
+# INTEL: vdpbf16ps	zmm30 {k7} {z}, zmm29, dword ptr [rdx - 512]{1to16}
+0x62,0x62,0x16,0xd7,0x52,0x72,0x80

diff  --git a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
deleted file mode 100644
index 2b633a9a7cf859..00000000000000
--- a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
+++ /dev/null
@@ -1,82 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22
-0x62,0x82,0x47,0x40,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22 {%k7}
-0x62,0x82,0x47,0x47,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22 {%k7} {z}
-0x62,0x82,0x47,0xc7,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16  268435456(%rbp,%r14,8), %zmm23, %zmm22
-0x62,0xa2,0x47,0x40,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16  291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
-0x62,0xc2,0x47,0x47,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16  (%rip){1to16}, %zmm23, %zmm22
-0x62,0xe2,0x47,0x50,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16  -2048(,%rbp,2), %zmm23, %zmm22
-0x62,0xe2,0x47,0x40,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16  8128(%rcx), %zmm23, %zmm22 {%k7} {z}
-0x62,0xe2,0x47,0xc7,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16  -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
-0x62,0xe2,0x47,0xd7,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 %zmm23, %ymm22
-0x62,0xa2,0x7e,0x48,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %zmm23, %ymm22 {%k7}
-0x62,0xa2,0x7e,0x4f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %zmm23, %ymm22 {%k7} {z}
-0x62,0xa2,0x7e,0xcf,0x72,0xf7
-
-# CHECK: vcvtneps2bf16  268435456(%rbp,%r14,8), %ymm22
-0x62,0xa2,0x7e,0x48,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16  291(%r8,%rax,4), %ymm22 {%k7}
-0x62,0xc2,0x7e,0x4f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16  (%rip){1to16}, %ymm22
-0x62,0xe2,0x7e,0x58,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16  -2048(,%rbp,2), %ymm22
-0x62,0xe2,0x7e,0x48,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vcvtneps2bf16  8128(%rcx), %ymm22 {%k7} {z}
-0x62,0xe2,0x7e,0xcf,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16  -512(%rdx){1to16}, %ymm22 {%k7} {z}
-0x62,0xe2,0x7e,0xdf,0x72,0x72,0x80
-
-# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22
-0x62,0x82,0x46,0x40,0x52,0xf0
-
-# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22 {%k7}
-0x62,0x82,0x46,0x47,0x52,0xf0
-
-# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22 {%k7} {z}
-0x62,0x82,0x46,0xc7,0x52,0xf0
-
-# CHECK: vdpbf16ps  268435456(%rbp,%r14,8), %zmm23, %zmm22
-0x62,0xa2,0x46,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps  291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
-0x62,0xc2,0x46,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps  (%rip){1to16}, %zmm23, %zmm22
-0x62,0xe2,0x46,0x50,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps  -2048(,%rbp,2), %zmm23, %zmm22
-0x62,0xe2,0x46,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vdpbf16ps  8128(%rcx), %zmm23, %zmm22 {%k7} {z}
-0x62,0xe2,0x46,0xc7,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps  -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
-0x62,0xe2,0x46,0xd7,0x52,0x72,0x80

diff  --git a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
deleted file mode 100644
index 8bb3be91aed2ae..00000000000000
--- a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
+++ /dev/null
@@ -1,83 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmm24
-0x62,0x82,0x47,0x40,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 zmm22 {k7}, zmm23, zmm24
-0x62,0x82,0x47,0x47,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, zmm24
-0x62,0x82,0x47,0xc7,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x47,0x40,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x47,0x47,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 zmm22, zmm23, dword ptr [rip]{1to16}
-0x62,0xe2,0x47,0x50,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
-0x62,0xe2,0x47,0x40,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
-0x62,0xe2,0x47,0xc7,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
-0x62,0xe2,0x47,0xd7,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 ymm22, zmm23
-0x62,0xa2,0x7e,0x48,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 ymm22 {k7}, zmm23
-0x62,0xa2,0x7e,0x4f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, zmm23
-0x62,0xa2,0x7e,0xcf,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x7e,0x48,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x7e,0x4f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16 ymm22, dword ptr [rip]{1to16}
-0x62,0xe2,0x7e,0x58,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16 ymm22, zmmword ptr [2*rbp - 2048]
-0x62,0xe2,0x7e,0x48,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
-0x62,0xe2,0x7e,0xcf,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
-0x62,0xe2,0x7e,0xdf,0x72,0x72,0x80
-
-# CHECK: vdpbf16ps zmm22, zmm23, zmm24
-0x62,0x82,0x46,0x40,0x52,0xf0
-
-# CHECK: vdpbf16ps zmm22 {k7}, zmm23, zmm24
-0x62,0x82,0x46,0x47,0x52,0xf0
-
-# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, zmm24
-0x62,0x82,0x46,0xc7,0x52,0xf0
-
-# CHECK: vdpbf16ps zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x46,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x46,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps zmm22, zmm23, dword ptr [rip]{1to16}
-0x62,0xe2,0x46,0x50,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps zmm22, zmm23, zmmword ptr [2*rbp - 2048]
-0x62,0xe2,0x46,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff
-
-# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
-0x62,0xe2,0x46,0xc7,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
-0x62,0xe2,0x46,0xd7,0x52,0x72,0x80
-

diff  --git a/llvm/test/MC/X86/avx512_bf16-att.s b/llvm/test/MC/X86/avx512_bf16-32-att.s
similarity index 100%
rename from llvm/test/MC/X86/avx512_bf16-att.s
rename to llvm/test/MC/X86/avx512_bf16-32-att.s

diff  --git a/llvm/test/MC/X86/avx512_bf16-intel.s b/llvm/test/MC/X86/avx512_bf16-32-intel.s
similarity index 100%
rename from llvm/test/MC/X86/avx512_bf16-intel.s
rename to llvm/test/MC/X86/avx512_bf16-32-intel.s

diff  --git a/llvm/test/MC/X86/x86-64-avx512_bf16-encoding.s b/llvm/test/MC/X86/avx512_bf16-64-att.s
similarity index 100%
rename from llvm/test/MC/X86/x86-64-avx512_bf16-encoding.s
rename to llvm/test/MC/X86/avx512_bf16-64-att.s

diff  --git a/llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s b/llvm/test/MC/X86/avx512_bf16-64-intel.s
similarity index 100%
rename from llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s
rename to llvm/test/MC/X86/avx512_bf16-64-intel.s


        


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